st/cw1200/cw1200_spi.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Mac80211 SPI driver for ST-Ericsson CW1200 device
0004  *
0005  * Copyright (c) 2011, Sagrad Inc.
0006  * Author:  Solomon Peachy <speachy@sagrad.com>
0007  *
0008  * Based on cw1200_sdio.c
0009  * Copyright (c) 2010, ST-Ericsson
0010  * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
0011  */
0012
0013 #include <linux/module.h>
0014 #include <linux/gpio.h>
0015 #include <linux/delay.h>
0016 #include <linux/spinlock.h>
0017 #include <linux/interrupt.h>
0018 #include <net/mac80211.h>
0019
0020 #include <linux/spi/spi.h>
0021 #include <linux/device.h>
0022
0023 #include "cw1200.h"
0024 #include "hwbus.h"
0025 #include <linux/platform_data/net-cw1200.h>
0026 #include "hwio.h"
0027
0028 MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
0029 MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
0030 MODULE_LICENSE("GPL");
0031 MODULE_ALIAS("spi:cw1200_wlan_spi");
0032
0033 /* #define SPI_DEBUG */
0034
0035 struct hwbus_priv {
0036     struct spi_device   *func;
0037     struct cw1200_common    *core;
0038     const struct cw1200_platform_data_spi *pdata;
0039     spinlock_t      lock; /* Serialize all bus operations */
0040     wait_queue_head_t       wq;
0041     int claimed;
0042 };
0043
0044 #define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
0045 #define SET_WRITE 0x7FFF /* usage: and operation */
0046 #define SET_READ 0x8000  /* usage: or operation */
0047
0048 /* Notes on byte ordering:
0049    LE:  B0 B1 B2 B3
0050    BE:  B3 B2 B1 B0
0051
0052    Hardware expects 32-bit data to be written as 16-bit BE words:
0053
0054    B1 B0 B3 B2
0055 */
0056
0057 static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
0058                      unsigned int addr,
0059                      void *dst, int count)
0060 {
0061     int ret, i;
0062     u16 regaddr;
0063     struct spi_message      m;
0064
0065     struct spi_transfer     t_addr = {
0066         .tx_buf         = &regaddr,
0067         .len            = sizeof(regaddr),
0068     };
0069     struct spi_transfer     t_msg = {
0070         .rx_buf         = dst,
0071         .len            = count,
0072     };
0073
0074     regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
0075     regaddr |= SET_READ;
0076     regaddr |= (count>>1);
0077
0078 #ifdef SPI_DEBUG
0079     pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
0080 #endif
0081
0082     /* Header is LE16 */
0083     regaddr = cpu_to_le16(regaddr);
0084
0085     /* We have to byteswap if the SPI bus is limited to 8b operation
0086        or we are running on a Big Endian system
0087     */
0088 #if defined(__LITTLE_ENDIAN)
0089     if (self->func->bits_per_word == 8)
0090 #endif
0091         regaddr = swab16(regaddr);
0092
0093     spi_message_init(&m);
0094     spi_message_add_tail(&t_addr, &m);
0095     spi_message_add_tail(&t_msg, &m);
0096     ret = spi_sync(self->func, &m);
0097
0098 #ifdef SPI_DEBUG
0099     pr_info("READ : ");
0100     for (i = 0; i < t_addr.len; i++)
0101         printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
0102     printk(" : ");
0103     for (i = 0; i < t_msg.len; i++)
0104         printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
0105     printk("\n");
0106 #endif
0107
0108     /* We have to byteswap if the SPI bus is limited to 8b operation
0109        or we are running on a Big Endian system
0110     */
0111 #if defined(__LITTLE_ENDIAN)
0112     if (self->func->bits_per_word == 8)
0113 #endif
0114     {
0115         uint16_t *buf = (uint16_t *)dst;
0116         for (i = 0; i < ((count + 1) >> 1); i++)
0117             buf[i] = swab16(buf[i]);
0118     }
0119
0120     return ret;
0121 }
0122
0123 static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
0124                    unsigned int addr,
0125                    const void *src, int count)
0126 {
0127     int rval, i;
0128     u16 regaddr;
0129     struct spi_transfer     t_addr = {
0130         .tx_buf         = &regaddr,
0131         .len            = sizeof(regaddr),
0132     };
0133     struct spi_transfer     t_msg = {
0134         .tx_buf         = src,
0135         .len            = count,
0136     };
0137     struct spi_message      m;
0138
0139     regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
0140     regaddr &= SET_WRITE;
0141     regaddr |= (count>>1);
0142
0143 #ifdef SPI_DEBUG
0144     pr_info("WRITE: %04d  to  0x%02x (%04x)\n", count, addr, regaddr);
0145 #endif
0146
0147     /* Header is LE16 */
0148     regaddr = cpu_to_le16(regaddr);
0149
0150     /* We have to byteswap if the SPI bus is limited to 8b operation
0151        or we are running on a Big Endian system
0152     */
0153 #if defined(__LITTLE_ENDIAN)
0154     if (self->func->bits_per_word == 8)
0155 #endif
0156     {
0157         uint16_t *buf = (uint16_t *)src;
0158             regaddr = swab16(regaddr);
0159         for (i = 0; i < ((count + 1) >> 1); i++)
0160             buf[i] = swab16(buf[i]);
0161     }
0162
0163 #ifdef SPI_DEBUG
0164     pr_info("WRITE: ");
0165     for (i = 0; i < t_addr.len; i++)
0166         printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
0167     printk(" : ");
0168     for (i = 0; i < t_msg.len; i++)
0169         printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
0170     printk("\n");
0171 #endif
0172
0173     spi_message_init(&m);
0174     spi_message_add_tail(&t_addr, &m);
0175     spi_message_add_tail(&t_msg, &m);
0176     rval = spi_sync(self->func, &m);
0177
0178 #ifdef SPI_DEBUG
0179     pr_info("WROTE: %d\n", m.actual_length);
0180 #endif
0181
0182 #if defined(__LITTLE_ENDIAN)
0183     /* We have to byteswap if the SPI bus is limited to 8b operation */
0184     if (self->func->bits_per_word == 8)
0185 #endif
0186     {
0187         uint16_t *buf = (uint16_t *)src;
0188         for (i = 0; i < ((count + 1) >> 1); i++)
0189             buf[i] = swab16(buf[i]);
0190     }
0191     return rval;
0192 }
0193
0194 static void cw1200_spi_lock(struct hwbus_priv *self)
0195 {
0196     unsigned long flags;
0197
0198     DECLARE_WAITQUEUE(wait, current);
0199
0200     might_sleep();
0201
0202     add_wait_queue(&self->wq, &wait);
0203     spin_lock_irqsave(&self->lock, flags);
0204     while (1) {
0205         set_current_state(TASK_UNINTERRUPTIBLE);
0206         if (!self->claimed)
0207             break;
0208         spin_unlock_irqrestore(&self->lock, flags);
0209         schedule();
0210         spin_lock_irqsave(&self->lock, flags);
0211     }
0212     set_current_state(TASK_RUNNING);
0213     self->claimed = 1;
0214     spin_unlock_irqrestore(&self->lock, flags);
0215     remove_wait_queue(&self->wq, &wait);
0216
0217     return;
0218 }
0219
0220 static void cw1200_spi_unlock(struct hwbus_priv *self)
0221 {
0222     unsigned long flags;
0223
0224     spin_lock_irqsave(&self->lock, flags);
0225     self->claimed = 0;
0226     spin_unlock_irqrestore(&self->lock, flags);
0227     wake_up(&self->wq);
0228
0229     return;
0230 }
0231
0232 static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
0233 {
0234     struct hwbus_priv *self = dev_id;
0235
0236     if (self->core) {
0237         cw1200_spi_lock(self);
0238         cw1200_irq_handler(self->core);
0239         cw1200_spi_unlock(self);
0240         return IRQ_HANDLED;
0241     } else {
0242         return IRQ_NONE;
0243     }
0244 }
0245
0246 static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
0247 {
0248     int ret;
0249
0250     pr_debug("SW IRQ subscribe\n");
0251
0252     ret = request_threaded_irq(self->func->irq, NULL,
0253                    cw1200_spi_irq_handler,
0254                    IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
0255                    "cw1200_wlan_irq", self);
0256     if (WARN_ON(ret < 0))
0257         goto exit;
0258
0259     ret = enable_irq_wake(self->func->irq);
0260     if (WARN_ON(ret))
0261         goto free_irq;
0262
0263     return 0;
0264
0265 free_irq:
0266     free_irq(self->func->irq, self);
0267 exit:
0268     return ret;
0269 }
0270
0271 static void cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
0272 {
0273     pr_debug("SW IRQ unsubscribe\n");
0274     disable_irq_wake(self->func->irq);
0275     free_irq(self->func->irq, self);
0276 }
0277
0278 static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
0279 {
0280     if (pdata->reset) {
0281         gpio_set_value(pdata->reset, 0);
0282         msleep(30); /* Min is 2 * CLK32K cycles */
0283         gpio_free(pdata->reset);
0284     }
0285
0286     if (pdata->power_ctrl)
0287         pdata->power_ctrl(pdata, false);
0288     if (pdata->clk_ctrl)
0289         pdata->clk_ctrl(pdata, false);
0290
0291     return 0;
0292 }
0293
0294 static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
0295 {
0296     /* Ensure I/Os are pulled low */
0297     if (pdata->reset) {
0298         gpio_request(pdata->reset, "cw1200_wlan_reset");
0299         gpio_direction_output(pdata->reset, 0);
0300     }
0301     if (pdata->powerup) {
0302         gpio_request(pdata->powerup, "cw1200_wlan_powerup");
0303         gpio_direction_output(pdata->powerup, 0);
0304     }
0305     if (pdata->reset || pdata->powerup)
0306         msleep(10); /* Settle time? */
0307
0308     /* Enable 3v3 and 1v8 to hardware */
0309     if (pdata->power_ctrl) {
0310         if (pdata->power_ctrl(pdata, true)) {
0311             pr_err("power_ctrl() failed!\n");
0312             return -1;
0313         }
0314     }
0315
0316     /* Enable CLK32K */
0317     if (pdata->clk_ctrl) {
0318         if (pdata->clk_ctrl(pdata, true)) {
0319             pr_err("clk_ctrl() failed!\n");
0320             return -1;
0321         }
0322         msleep(10); /* Delay until clock is stable for 2 cycles */
0323     }
0324
0325     /* Enable POWERUP signal */
0326     if (pdata->powerup) {
0327         gpio_set_value(pdata->powerup, 1);
0328         msleep(250); /* or more..? */
0329     }
0330     /* Enable RSTn signal */
0331     if (pdata->reset) {
0332         gpio_set_value(pdata->reset, 1);
0333         msleep(50); /* Or more..? */
0334     }
0335     return 0;
0336 }
0337
0338 static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
0339 {
0340     return size & 1 ? size + 1 : size;
0341 }
0342
0343 static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
0344 {
0345     return irq_set_irq_wake(self->func->irq, suspend);
0346 }
0347
0348 static const struct hwbus_ops cw1200_spi_hwbus_ops = {
0349     .hwbus_memcpy_fromio    = cw1200_spi_memcpy_fromio,
0350     .hwbus_memcpy_toio  = cw1200_spi_memcpy_toio,
0351     .lock           = cw1200_spi_lock,
0352     .unlock         = cw1200_spi_unlock,
0353     .align_size     = cw1200_spi_align_size,
0354     .power_mgmt     = cw1200_spi_pm,
0355 };
0356
0357 /* Probe Function to be called by SPI stack when device is discovered */
0358 static int cw1200_spi_probe(struct spi_device *func)
0359 {
0360     const struct cw1200_platform_data_spi *plat_data =
0361         dev_get_platdata(&func->dev);
0362     struct hwbus_priv *self;
0363     int status;
0364
0365     /* Sanity check speed */
0366     if (func->max_speed_hz > 52000000)
0367         func->max_speed_hz = 52000000;
0368     if (func->max_speed_hz < 1000000)
0369         func->max_speed_hz = 1000000;
0370
0371     /* Fix up transfer size */
0372     if (plat_data->spi_bits_per_word)
0373         func->bits_per_word = plat_data->spi_bits_per_word;
0374     if (!func->bits_per_word)
0375         func->bits_per_word = 16;
0376
0377     /* And finally.. */
0378     func->mode = SPI_MODE_0;
0379
0380     pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
0381         func->chip_select, func->mode, func->bits_per_word,
0382         func->max_speed_hz);
0383
0384     if (cw1200_spi_on(plat_data)) {
0385         pr_err("spi_on() failed!\n");
0386         return -1;
0387     }
0388
0389     if (spi_setup(func)) {
0390         pr_err("spi_setup() failed!\n");
0391         return -1;
0392     }
0393
0394     self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
0395     if (!self) {
0396         pr_err("Can't allocate SPI hwbus_priv.");
0397         return -ENOMEM;
0398     }
0399
0400     self->pdata = plat_data;
0401     self->func = func;
0402     spin_lock_init(&self->lock);
0403
0404     spi_set_drvdata(func, self);
0405
0406     init_waitqueue_head(&self->wq);
0407
0408     status = cw1200_spi_irq_subscribe(self);
0409
0410     status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
0411                    self, &func->dev, &self->core,
0412                    self->pdata->ref_clk,
0413                    self->pdata->macaddr,
0414                    self->pdata->sdd_file,
0415                    self->pdata->have_5ghz);
0416
0417     if (status) {
0418         cw1200_spi_irq_unsubscribe(self);
0419         cw1200_spi_off(plat_data);
0420     }
0421
0422     return status;
0423 }
0424
0425 /* Disconnect Function to be called by SPI stack when device is disconnected */
0426 static void cw1200_spi_disconnect(struct spi_device *func)
0427 {
0428     struct hwbus_priv *self = spi_get_drvdata(func);
0429
0430     if (self) {
0431         cw1200_spi_irq_unsubscribe(self);
0432         if (self->core) {
0433             cw1200_core_release(self->core);
0434             self->core = NULL;
0435         }
0436     }
0437     cw1200_spi_off(dev_get_platdata(&func->dev));
0438 }
0439
0440 static int __maybe_unused cw1200_spi_suspend(struct device *dev)
0441 {
0442     struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
0443
0444     if (!cw1200_can_suspend(self->core))
0445         return -EAGAIN;
0446
0447     /* XXX notify host that we have to keep CW1200 powered on? */
0448     return 0;
0449 }
0450
0451 static SIMPLE_DEV_PM_OPS(cw1200_pm_ops, cw1200_spi_suspend, NULL);
0452
0453 static struct spi_driver spi_driver = {
0454     .probe      = cw1200_spi_probe,
0455     .remove     = cw1200_spi_disconnect,
0456     .driver = {
0457         .name       = "cw1200_wlan_spi",
0458         .pm     = IS_ENABLED(CONFIG_PM) ? &cw1200_pm_ops : NULL,
0459     },
0460 };
0461
0462 module_spi_driver(spi_driver);