realtek/rtw88/util.c

0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /* Copyright(c) 2018-2019  Realtek Corporation
0003  */
0004
0005 #include "main.h"
0006 #include "util.h"
0007 #include "reg.h"
0008
0009 bool check_hw_ready(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 target)
0010 {
0011     u32 cnt;
0012
0013     for (cnt = 0; cnt < 1000; cnt++) {
0014         if (rtw_read32_mask(rtwdev, addr, mask) == target)
0015             return true;
0016
0017         udelay(10);
0018     }
0019
0020     return false;
0021 }
0022 EXPORT_SYMBOL(check_hw_ready);
0023
0024 bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val)
0025 {
0026     struct rtw_chip_info *chip = rtwdev->chip;
0027     const struct rtw_ltecoex_addr *ltecoex = chip->ltecoex_addr;
0028
0029     if (!check_hw_ready(rtwdev, ltecoex->ctrl, LTECOEX_READY, 1))
0030         return false;
0031
0032     rtw_write32(rtwdev, ltecoex->ctrl, 0x800F0000 | offset);
0033     *val = rtw_read32(rtwdev, ltecoex->rdata);
0034
0035     return true;
0036 }
0037
0038 bool ltecoex_reg_write(struct rtw_dev *rtwdev, u16 offset, u32 value)
0039 {
0040     struct rtw_chip_info *chip = rtwdev->chip;
0041     const struct rtw_ltecoex_addr *ltecoex = chip->ltecoex_addr;
0042
0043     if (!check_hw_ready(rtwdev, ltecoex->ctrl, LTECOEX_READY, 1))
0044         return false;
0045
0046     rtw_write32(rtwdev, ltecoex->wdata, value);
0047     rtw_write32(rtwdev, ltecoex->ctrl, 0xC00F0000 | offset);
0048
0049     return true;
0050 }
0051
0052 void rtw_restore_reg(struct rtw_dev *rtwdev,
0053              struct rtw_backup_info *bckp, u32 num)
0054 {
0055     u8 len;
0056     u32 reg;
0057     u32 val;
0058     int i;
0059
0060     for (i = 0; i < num; i++, bckp++) {
0061         len = bckp->len;
0062         reg = bckp->reg;
0063         val = bckp->val;
0064
0065         switch (len) {
0066         case 1:
0067             rtw_write8(rtwdev, reg, (u8)val);
0068             break;
0069         case 2:
0070             rtw_write16(rtwdev, reg, (u16)val);
0071             break;
0072         case 4:
0073             rtw_write32(rtwdev, reg, (u32)val);
0074             break;
0075         default:
0076             break;
0077         }
0078     }
0079 }
0080 EXPORT_SYMBOL(rtw_restore_reg);
0081
0082 void rtw_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss)
0083 {
0084     if (rate <= DESC_RATE54M)
0085         return;
0086
0087     if (rate >= DESC_RATEVHT1SS_MCS0 &&
0088         rate <= DESC_RATEVHT1SS_MCS9) {
0089         *nss = 1;
0090         *mcs = rate - DESC_RATEVHT1SS_MCS0;
0091     } else if (rate >= DESC_RATEVHT2SS_MCS0 &&
0092            rate <= DESC_RATEVHT2SS_MCS9) {
0093         *nss = 2;
0094         *mcs = rate - DESC_RATEVHT2SS_MCS0;
0095     } else if (rate >= DESC_RATEVHT3SS_MCS0 &&
0096            rate <= DESC_RATEVHT3SS_MCS9) {
0097         *nss = 3;
0098         *mcs = rate - DESC_RATEVHT3SS_MCS0;
0099     } else if (rate >= DESC_RATEVHT4SS_MCS0 &&
0100            rate <= DESC_RATEVHT4SS_MCS9) {
0101         *nss = 4;
0102         *mcs = rate - DESC_RATEVHT4SS_MCS0;
0103     } else if (rate >= DESC_RATEMCS0 &&
0104            rate <= DESC_RATEMCS15) {
0105         *mcs = rate - DESC_RATEMCS0;
0106     }
0107 }