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0005 #ifndef __RTW_SEC_H_
0006 #define __RTW_SEC_H_
0007
0008 #define RTW_SEC_CMD_REG 0x670
0009 #define RTW_SEC_WRITE_REG 0x674
0010 #define RTW_SEC_READ_REG 0x678
0011 #define RTW_SEC_CONFIG 0x680
0012
0013 #define RTW_SEC_CAM_ENTRY_SHIFT 3
0014 #define RTW_SEC_DEFAULT_KEY_NUM 4
0015 #define RTW_SEC_CMD_WRITE_ENABLE BIT(16)
0016 #define RTW_SEC_CMD_CLEAR BIT(30)
0017 #define RTW_SEC_CMD_POLLING BIT(31)
0018
0019 #define RTW_SEC_TX_UNI_USE_DK BIT(0)
0020 #define RTW_SEC_RX_UNI_USE_DK BIT(1)
0021 #define RTW_SEC_TX_DEC_EN BIT(2)
0022 #define RTW_SEC_RX_DEC_EN BIT(3)
0023 #define RTW_SEC_TX_BC_USE_DK BIT(6)
0024 #define RTW_SEC_RX_BC_USE_DK BIT(7)
0025
0026 #define RTW_SEC_ENGINE_EN BIT(9)
0027
0028 int rtw_sec_get_free_cam(struct rtw_sec_desc *sec);
0029 void rtw_sec_write_cam(struct rtw_dev *rtwdev,
0030 struct rtw_sec_desc *sec,
0031 struct ieee80211_sta *sta,
0032 struct ieee80211_key_conf *key,
0033 u8 hw_key_type, u8 hw_key_idx);
0034 void rtw_sec_clear_cam(struct rtw_dev *rtwdev,
0035 struct rtw_sec_desc *sec,
0036 u8 hw_key_idx);
0037 u8 rtw_sec_cam_pg_backup(struct rtw_dev *rtwdev, u8 *used_cam);
0038 void rtw_sec_enable_sec_engine(struct rtw_dev *rtwdev);
0039
0040 #endif