realtek/rtw88/efuse.c

0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /* Copyright(c) 2018-2019  Realtek Corporation
0003  */
0004
0005 #include <linux/iopoll.h>
0006
0007 #include "main.h"
0008 #include "efuse.h"
0009 #include "reg.h"
0010 #include "debug.h"
0011
0012 #define RTW_EFUSE_BANK_WIFI     0x0
0013
0014 static void switch_efuse_bank(struct rtw_dev *rtwdev)
0015 {
0016     rtw_write32_mask(rtwdev, REG_LDO_EFUSE_CTRL, BIT_MASK_EFUSE_BANK_SEL,
0017              RTW_EFUSE_BANK_WIFI);
0018 }
0019
0020 #define invalid_efuse_header(hdr1, hdr2) \
0021     ((hdr1) == 0xff || (((hdr1) & 0x1f) == 0xf && (hdr2) == 0xff))
0022 #define invalid_efuse_content(word_en, i) \
0023     (((word_en) & BIT(i)) != 0x0)
0024 #define get_efuse_blk_idx_2_byte(hdr1, hdr2) \
0025     ((((hdr2) & 0xf0) >> 1) | (((hdr1) >> 5) & 0x07))
0026 #define get_efuse_blk_idx_1_byte(hdr1) \
0027     (((hdr1) & 0xf0) >> 4)
0028 #define block_idx_to_logical_idx(blk_idx, i) \
0029     (((blk_idx) << 3) + ((i) << 1))
0030
0031 /* efuse header format
0032  *
0033  * | 7        5   4    0 | 7        4   3          0 | 15  8  7   0 |
0034  *   block[2:0]   0 1111   block[6:3]   word_en[3:0]   byte0  byte1
0035  * | header 1 (optional) |          header 2         |    word N    |
0036  *
0037  * word_en: 4 bits each word. 0 -> write; 1 -> not write
0038  * N: 1~4, depends on word_en
0039  */
0040 static int rtw_dump_logical_efuse_map(struct rtw_dev *rtwdev, u8 *phy_map,
0041                       u8 *log_map)
0042 {
0043     u32 physical_size = rtwdev->efuse.physical_size;
0044     u32 protect_size = rtwdev->efuse.protect_size;
0045     u32 logical_size = rtwdev->efuse.logical_size;
0046     u32 phy_idx, log_idx;
0047     u8 hdr1, hdr2;
0048     u8 blk_idx;
0049     u8 word_en;
0050     int i;
0051
0052     for (phy_idx = 0; phy_idx < physical_size - protect_size;) {
0053         hdr1 = phy_map[phy_idx];
0054         hdr2 = phy_map[phy_idx + 1];
0055         if (invalid_efuse_header(hdr1, hdr2))
0056             break;
0057
0058         if ((hdr1 & 0x1f) == 0xf) {
0059             /* 2-byte header format */
0060             blk_idx = get_efuse_blk_idx_2_byte(hdr1, hdr2);
0061             word_en = hdr2 & 0xf;
0062             phy_idx += 2;
0063         } else {
0064             /* 1-byte header format */
0065             blk_idx = get_efuse_blk_idx_1_byte(hdr1);
0066             word_en = hdr1 & 0xf;
0067             phy_idx += 1;
0068         }
0069
0070         for (i = 0; i < 4; i++) {
0071             if (invalid_efuse_content(word_en, i))
0072                 continue;
0073
0074             log_idx = block_idx_to_logical_idx(blk_idx, i);
0075             if (phy_idx + 1 > physical_size - protect_size ||
0076                 log_idx + 1 > logical_size)
0077                 return -EINVAL;
0078
0079             log_map[log_idx] = phy_map[phy_idx];
0080             log_map[log_idx + 1] = phy_map[phy_idx + 1];
0081             phy_idx += 2;
0082         }
0083     }
0084     return 0;
0085 }
0086
0087 static int rtw_dump_physical_efuse_map(struct rtw_dev *rtwdev, u8 *map)
0088 {
0089     struct rtw_chip_info *chip = rtwdev->chip;
0090     u32 size = rtwdev->efuse.physical_size;
0091     u32 efuse_ctl;
0092     u32 addr;
0093     u32 cnt;
0094
0095     rtw_chip_efuse_grant_on(rtwdev);
0096
0097     switch_efuse_bank(rtwdev);
0098
0099     /* disable 2.5V LDO */
0100     chip->ops->cfg_ldo25(rtwdev, false);
0101
0102     efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL);
0103
0104     for (addr = 0; addr < size; addr++) {
0105         efuse_ctl &= ~(BIT_MASK_EF_DATA | BITS_EF_ADDR);
0106         efuse_ctl |= (addr & BIT_MASK_EF_ADDR) << BIT_SHIFT_EF_ADDR;
0107         rtw_write32(rtwdev, REG_EFUSE_CTRL, efuse_ctl & (~BIT_EF_FLAG));
0108
0109         cnt = 1000000;
0110         do {
0111             udelay(1);
0112             efuse_ctl = rtw_read32(rtwdev, REG_EFUSE_CTRL);
0113             if (--cnt == 0)
0114                 return -EBUSY;
0115         } while (!(efuse_ctl & BIT_EF_FLAG));
0116
0117         *(map + addr) = (u8)(efuse_ctl & BIT_MASK_EF_DATA);
0118     }
0119
0120     rtw_chip_efuse_grant_off(rtwdev);
0121
0122     return 0;
0123 }
0124
0125 int rtw_read8_physical_efuse(struct rtw_dev *rtwdev, u16 addr, u8 *data)
0126 {
0127     u32 efuse_ctl;
0128     int ret;
0129
0130     rtw_write32_mask(rtwdev, REG_EFUSE_CTRL, 0x3ff00, addr);
0131     rtw_write32_clr(rtwdev, REG_EFUSE_CTRL, BIT_EF_FLAG);
0132
0133     ret = read_poll_timeout(rtw_read32, efuse_ctl, efuse_ctl & BIT_EF_FLAG,
0134                 1000, 100000, false, rtwdev, REG_EFUSE_CTRL);
0135     if (ret) {
0136         *data = EFUSE_READ_FAIL;
0137         return ret;
0138     }
0139
0140     *data = rtw_read8(rtwdev, REG_EFUSE_CTRL);
0141
0142     return 0;
0143 }
0144 EXPORT_SYMBOL(rtw_read8_physical_efuse);
0145
0146 int rtw_parse_efuse_map(struct rtw_dev *rtwdev)
0147 {
0148     struct rtw_chip_info *chip = rtwdev->chip;
0149     struct rtw_efuse *efuse = &rtwdev->efuse;
0150     u32 phy_size = efuse->physical_size;
0151     u32 log_size = efuse->logical_size;
0152     u8 *phy_map = NULL;
0153     u8 *log_map = NULL;
0154     int ret = 0;
0155
0156     phy_map = kmalloc(phy_size, GFP_KERNEL);
0157     log_map = kmalloc(log_size, GFP_KERNEL);
0158     if (!phy_map || !log_map) {
0159         ret = -ENOMEM;
0160         goto out_free;
0161     }
0162
0163     ret = rtw_dump_physical_efuse_map(rtwdev, phy_map);
0164     if (ret) {
0165         rtw_err(rtwdev, "failed to dump efuse physical map\n");
0166         goto out_free;
0167     }
0168
0169     memset(log_map, 0xff, log_size);
0170     ret = rtw_dump_logical_efuse_map(rtwdev, phy_map, log_map);
0171     if (ret) {
0172         rtw_err(rtwdev, "failed to dump efuse logical map\n");
0173         goto out_free;
0174     }
0175
0176     ret = chip->ops->read_efuse(rtwdev, log_map);
0177     if (ret) {
0178         rtw_err(rtwdev, "failed to read efuse map\n");
0179         goto out_free;
0180     }
0181
0182 out_free:
0183     kfree(log_map);
0184     kfree(phy_map);
0185
0186     return ret;
0187 }