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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 2009-2010  Realtek Corporation.*/
0003 
0004 #include "../wifi.h"
0005 #include "../pci.h"
0006 #include "../base.h"
0007 #include "../stats.h"
0008 #include "reg.h"
0009 #include "def.h"
0010 #include "trx.h"
0011 #include "led.h"
0012 #include "dm.h"
0013 #include "phy.h"
0014 #include "fw.h"
0015 
0016 static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
0017 {
0018     __le16 fc = rtl_get_fc(skb);
0019 
0020     if (unlikely(ieee80211_is_beacon(fc)))
0021         return QSLT_BEACON;
0022     if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
0023         return QSLT_MGNT;
0024 
0025     return skb->priority;
0026 }
0027 
0028 static u16 odm_cfo(s8 value)
0029 {
0030     int ret_val;
0031 
0032     if (value < 0) {
0033         ret_val = 0 - value;
0034         ret_val = (ret_val << 1) + (ret_val >> 1);
0035         /* set bit12 as 1 for negative cfo */
0036         ret_val = ret_val | BIT(12);
0037     } else {
0038         ret_val = value;
0039         ret_val = (ret_val << 1) + (ret_val >> 1);
0040     }
0041     return ret_val;
0042 }
0043 
0044 static u8 _rtl8821ae_evm_dbm_jaguar(s8 value)
0045 {
0046     s8 ret_val = value;
0047 
0048     /* -33dB~0dB to 33dB ~ 0dB*/
0049     if (ret_val == -128)
0050         ret_val = 127;
0051     else if (ret_val < 0)
0052         ret_val = 0 - ret_val;
0053 
0054     ret_val  = ret_val >> 1;
0055     return ret_val;
0056 }
0057 
0058 static void query_rxphystatus(struct ieee80211_hw *hw,
0059                   struct rtl_stats *pstatus, __le32 *pdesc,
0060                   struct rx_fwinfo_8821ae *p_drvinfo,
0061                   bool bpacket_match_bssid,
0062                   bool bpacket_toself, bool packet_beacon)
0063 {
0064     struct rtl_priv *rtlpriv = rtl_priv(hw);
0065     struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
0066     struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
0067     struct rtl_phy *rtlphy = &rtlpriv->phy;
0068     s8 rx_pwr_all = 0, rx_pwr[4];
0069     u8 rf_rx_num = 0, evm, evmdbm, pwdb_all;
0070     u8 i, max_spatial_stream;
0071     u32 rssi, total_rssi = 0;
0072     bool is_cck = pstatus->is_cck;
0073     u8 lan_idx, vga_idx;
0074 
0075     /* Record it for next packet processing */
0076     pstatus->packet_matchbssid = bpacket_match_bssid;
0077     pstatus->packet_toself = bpacket_toself;
0078     pstatus->packet_beacon = packet_beacon;
0079     pstatus->rx_mimo_signalquality[0] = -1;
0080     pstatus->rx_mimo_signalquality[1] = -1;
0081 
0082     if (is_cck) {
0083         u8 cck_highpwr;
0084         u8 cck_agc_rpt;
0085 
0086         cck_agc_rpt = p_phystrpt->cfosho[0];
0087 
0088         /* (1)Hardware does not provide RSSI for CCK
0089          * (2)PWDB, Average PWDB calculated by
0090          * hardware (for rate adaptive)
0091          */
0092         cck_highpwr = (u8)rtlphy->cck_high_power;
0093 
0094         lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
0095         vga_idx = (cck_agc_rpt & 0x1f);
0096         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) {
0097             switch (lan_idx) {
0098             case 7:
0099                 if (vga_idx <= 27)
0100                     /*VGA_idx = 27~2*/
0101                     rx_pwr_all = -100 + 2*(27-vga_idx);
0102                 else
0103                     rx_pwr_all = -100;
0104                 break;
0105             case 6:
0106                 /*VGA_idx = 2~0*/
0107                 rx_pwr_all = -48 + 2*(2-vga_idx);
0108                 break;
0109             case 5:
0110                 /*VGA_idx = 7~5*/
0111                 rx_pwr_all = -42 + 2*(7-vga_idx);
0112                 break;
0113             case 4:
0114                 /*VGA_idx = 7~4*/
0115                 rx_pwr_all = -36 + 2*(7-vga_idx);
0116                 break;
0117             case 3:
0118                 /*VGA_idx = 7~0*/
0119                 rx_pwr_all = -24 + 2*(7-vga_idx);
0120                 break;
0121             case 2:
0122                 if (cck_highpwr)
0123                     /*VGA_idx = 5~0*/
0124                     rx_pwr_all = -12 + 2*(5-vga_idx);
0125                 else
0126                     rx_pwr_all = -6 + 2*(5-vga_idx);
0127                 break;
0128             case 1:
0129                 rx_pwr_all = 8-2*vga_idx;
0130                 break;
0131             case 0:
0132                 rx_pwr_all = 14-2*vga_idx;
0133                 break;
0134             default:
0135                 break;
0136             }
0137             rx_pwr_all += 6;
0138             pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0139             if (!cck_highpwr) {
0140                 if (pwdb_all >= 80)
0141                     pwdb_all =
0142                       ((pwdb_all - 80)<<1) +
0143                      ((pwdb_all - 80)>>1) + 80;
0144                 else if ((pwdb_all <= 78) && (pwdb_all >= 20))
0145                     pwdb_all += 3;
0146                 if (pwdb_all > 100)
0147                     pwdb_all = 100;
0148             }
0149         } else { /* 8821 */
0150             s8 pout = -6;
0151 
0152             switch (lan_idx) {
0153             case 5:
0154                 rx_pwr_all = pout - 32 - (2*vga_idx);
0155                     break;
0156             case 4:
0157                 rx_pwr_all = pout - 24 - (2*vga_idx);
0158                     break;
0159             case 2:
0160                 rx_pwr_all = pout - 11 - (2*vga_idx);
0161                     break;
0162             case 1:
0163                 rx_pwr_all = pout + 5 - (2*vga_idx);
0164                     break;
0165             case 0:
0166                 rx_pwr_all = pout + 21 - (2*vga_idx);
0167                     break;
0168             }
0169             pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0170         }
0171 
0172         pstatus->rx_pwdb_all = pwdb_all;
0173         pstatus->recvsignalpower = rx_pwr_all;
0174 
0175         /* (3) Get Signal Quality (EVM) */
0176         if (bpacket_match_bssid) {
0177             u8 sq;
0178 
0179             if (pstatus->rx_pwdb_all > 40) {
0180                 sq = 100;
0181             } else {
0182                 sq = p_phystrpt->pwdb_all;
0183                 if (sq > 64)
0184                     sq = 0;
0185                 else if (sq < 20)
0186                     sq = 100;
0187                 else
0188                     sq = ((64 - sq) * 100) / 44;
0189             }
0190 
0191             pstatus->signalquality = sq;
0192             pstatus->rx_mimo_signalquality[0] = sq;
0193             pstatus->rx_mimo_signalquality[1] = -1;
0194         }
0195     } else {
0196         /* (1)Get RSSI for HT rate */
0197         for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
0198             /* we will judge RF RX path now. */
0199             if (rtlpriv->dm.rfpath_rxenable[i])
0200                 rf_rx_num++;
0201 
0202             rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110;
0203 
0204             /* Translate DBM to percentage. */
0205             rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
0206             total_rssi += rssi;
0207 
0208             /* Get Rx snr value in DB */
0209             pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2;
0210             rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2;
0211 
0212             pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]);
0213             pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]);
0214             /* Record Signal Strength for next packet */
0215             pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
0216         }
0217 
0218         /* (2)PWDB, Average PWDB calculated by
0219          * hardware (for rate adaptive)
0220          */
0221         rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
0222 
0223         pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0224         pstatus->rx_pwdb_all = pwdb_all;
0225         pstatus->rxpower = rx_pwr_all;
0226         pstatus->recvsignalpower = rx_pwr_all;
0227 
0228         /* (3)EVM of HT rate */
0229         if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 &&
0230              pstatus->rate <= DESC_RATEMCS15) ||
0231             (pstatus->is_vht &&
0232              pstatus->rate >= DESC_RATEVHT2SS_MCS0 &&
0233              pstatus->rate <= DESC_RATEVHT2SS_MCS9))
0234             max_spatial_stream = 2;
0235         else
0236             max_spatial_stream = 1;
0237 
0238         for (i = 0; i < max_spatial_stream; i++) {
0239             evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]);
0240             evmdbm = _rtl8821ae_evm_dbm_jaguar(p_phystrpt->rxevm[i]);
0241 
0242             if (bpacket_match_bssid) {
0243                 /* Fill value in RFD, Get the first
0244                  * spatial stream only
0245                  */
0246                 if (i == 0)
0247                     pstatus->signalquality = evm;
0248                 pstatus->rx_mimo_signalquality[i] = evm;
0249                 pstatus->rx_mimo_evm_dbm[i] = evmdbm;
0250             }
0251         }
0252         if (bpacket_match_bssid) {
0253             for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
0254                 rtl_priv(hw)->dm.cfo_tail[i] =
0255                     (s8)p_phystrpt->cfotail[i];
0256 
0257             rtl_priv(hw)->dm.packet_count++;
0258         }
0259     }
0260 
0261     /* UI BSS List signal strength(in percentage),
0262      * make it good looking, from 0~100.
0263      */
0264     if (is_cck)
0265         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0266             pwdb_all));
0267     else if (rf_rx_num != 0)
0268         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0269             total_rssi /= rf_rx_num));
0270     /*HW antenna diversity*/
0271     rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta;
0272     rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb;
0273 }
0274 
0275 static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
0276                       struct sk_buff *skb,
0277                       struct rtl_stats *pstatus, __le32 *pdesc,
0278                       struct rx_fwinfo_8821ae *p_drvinfo)
0279 {
0280     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0281     struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
0282     struct ieee80211_hdr *hdr;
0283     u8 *tmp_buf;
0284     u8 *praddr;
0285     u8 *psaddr;
0286     __le16 fc;
0287     bool packet_matchbssid, packet_toself, packet_beacon;
0288 
0289     tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
0290 
0291     hdr = (struct ieee80211_hdr *)tmp_buf;
0292     fc = hdr->frame_control;
0293     praddr = hdr->addr1;
0294     psaddr = ieee80211_get_SA(hdr);
0295     ether_addr_copy(pstatus->psaddr, psaddr);
0296 
0297     packet_matchbssid = (!ieee80211_is_ctl(fc) &&
0298                  (ether_addr_equal(mac->bssid,
0299                            ieee80211_has_tods(fc) ?
0300                            hdr->addr1 :
0301                            ieee80211_has_fromds(fc) ?
0302                            hdr->addr2 : hdr->addr3)) &&
0303                   (!pstatus->hwerror) &&
0304                   (!pstatus->crc) && (!pstatus->icv));
0305 
0306     packet_toself = packet_matchbssid &&
0307         (ether_addr_equal(praddr, rtlefuse->dev_addr));
0308 
0309     if (ieee80211_is_beacon(hdr->frame_control))
0310         packet_beacon = true;
0311     else
0312         packet_beacon = false;
0313 
0314     if (packet_beacon && packet_matchbssid)
0315         rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
0316 
0317     if (packet_matchbssid &&
0318         ieee80211_is_data_qos(hdr->frame_control) &&
0319         !is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
0320         struct ieee80211_qos_hdr *hdr_qos =
0321             (struct ieee80211_qos_hdr *)tmp_buf;
0322         u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
0323 
0324         if (tid != 0 && tid != 3)
0325             rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
0326     }
0327 
0328     query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
0329               packet_matchbssid, packet_toself,
0330               packet_beacon);
0331     /*_rtl8821ae_smart_antenna(hw, pstatus); */
0332     rtl_process_phyinfo(hw, tmp_buf, pstatus);
0333 }
0334 
0335 static void rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
0336                        __le32 *virtualaddress)
0337 {
0338     u32 dwtmp = 0;
0339 
0340     memset(virtualaddress, 0, 8);
0341 
0342     set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
0343     if (ptcb_desc->empkt_num == 1) {
0344         dwtmp = ptcb_desc->empkt_len[0];
0345     } else {
0346         dwtmp = ptcb_desc->empkt_len[0];
0347         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
0348         dwtmp += ptcb_desc->empkt_len[1];
0349     }
0350     set_earlymode_len0(virtualaddress, dwtmp);
0351 
0352     if (ptcb_desc->empkt_num <= 3) {
0353         dwtmp = ptcb_desc->empkt_len[2];
0354     } else {
0355         dwtmp = ptcb_desc->empkt_len[2];
0356         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
0357         dwtmp += ptcb_desc->empkt_len[3];
0358     }
0359     set_earlymode_len1(virtualaddress, dwtmp);
0360     if (ptcb_desc->empkt_num <= 5) {
0361         dwtmp = ptcb_desc->empkt_len[4];
0362     } else {
0363         dwtmp = ptcb_desc->empkt_len[4];
0364         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
0365         dwtmp += ptcb_desc->empkt_len[5];
0366     }
0367     set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
0368     set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
0369     if (ptcb_desc->empkt_num <= 7) {
0370         dwtmp = ptcb_desc->empkt_len[6];
0371     } else {
0372         dwtmp = ptcb_desc->empkt_len[6];
0373         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
0374         dwtmp += ptcb_desc->empkt_len[7];
0375     }
0376     set_earlymode_len3(virtualaddress, dwtmp);
0377     if (ptcb_desc->empkt_num <= 9) {
0378         dwtmp = ptcb_desc->empkt_len[8];
0379     } else {
0380         dwtmp = ptcb_desc->empkt_len[8];
0381         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
0382         dwtmp += ptcb_desc->empkt_len[9];
0383     }
0384     set_earlymode_len4(virtualaddress, dwtmp);
0385 }
0386 
0387 static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, __le32 *pdesc)
0388 {
0389     struct rtl_priv *rtlpriv = rtl_priv(hw);
0390     u8 rx_rate = 0;
0391 
0392     rx_rate = get_rx_desc_rxmcs(pdesc);
0393 
0394     rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
0395 
0396     if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15))
0397         return true;
0398     return false;
0399 }
0400 
0401 static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, __le32 *pdesc)
0402 {
0403     struct rtl_priv *rtlpriv = rtl_priv(hw);
0404     u8 rx_rate = 0;
0405 
0406     rx_rate = get_rx_desc_rxmcs(pdesc);
0407 
0408     rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
0409 
0410     if (rx_rate >= DESC_RATEVHT1SS_MCS0)
0411         return true;
0412     return false;
0413 }
0414 
0415 static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, __le32 *pdesc)
0416 {
0417     u8 rx_rate = 0;
0418     u8 vht_nss = 0;
0419 
0420     rx_rate = get_rx_desc_rxmcs(pdesc);
0421     if ((rx_rate >= DESC_RATEVHT1SS_MCS0) &&
0422         (rx_rate <= DESC_RATEVHT1SS_MCS9))
0423         vht_nss = 1;
0424     else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) &&
0425          (rx_rate <= DESC_RATEVHT2SS_MCS9))
0426         vht_nss = 2;
0427 
0428     return vht_nss;
0429 }
0430 
0431 bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
0432                  struct rtl_stats *status,
0433                  struct ieee80211_rx_status *rx_status,
0434                  u8 *pdesc8, struct sk_buff *skb)
0435 {
0436     struct rtl_priv *rtlpriv = rtl_priv(hw);
0437     struct rx_fwinfo_8821ae *p_drvinfo;
0438     struct ieee80211_hdr *hdr;
0439     u8 wake_match;
0440     __le32 *pdesc = (__le32 *)pdesc8;
0441     u32 phystatus = get_rx_desc_physt(pdesc);
0442 
0443     status->length = (u16)get_rx_desc_pkt_len(pdesc);
0444     status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
0445         RX_DRV_INFO_SIZE_UNIT;
0446     status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
0447     status->icv = (u16)get_rx_desc_icv(pdesc);
0448     status->crc = (u16)get_rx_desc_crc32(pdesc);
0449     status->hwerror = (status->crc | status->icv);
0450     status->decrypted = !get_rx_desc_swdec(pdesc);
0451     status->rate = (u8)get_rx_desc_rxmcs(pdesc);
0452     status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
0453     status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
0454     status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
0455     status->timestamp_low = get_rx_desc_tsfl(pdesc);
0456     status->rx_packet_bw = get_rx_desc_bw(pdesc);
0457     status->macid = get_rx_desc_macid(pdesc);
0458     status->is_short_gi = !(bool)get_rx_desc_splcp(pdesc);
0459     status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc);
0460     status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc);
0461     status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc);
0462     status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate);
0463 
0464     rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
0465         "rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n",
0466         (status->rx_packet_bw == 2) ? "80M" :
0467         (status->rx_packet_bw == 1) ? "40M" : "20M",
0468         status->is_ht, status->is_vht, status->vht_nss,
0469         status->is_short_gi);
0470 
0471     if (get_rx_status_desc_rpt_sel(pdesc))
0472         status->packet_report_type = C2H_PACKET;
0473     else
0474         status->packet_report_type = NORMAL_RX;
0475 
0476     if (get_rx_status_desc_pattern_match(pdesc))
0477         wake_match = BIT(2);
0478     else if (get_rx_status_desc_magic_match(pdesc))
0479         wake_match = BIT(1);
0480     else if (get_rx_status_desc_unicast_match(pdesc))
0481         wake_match = BIT(0);
0482     else
0483         wake_match = 0;
0484 
0485     if (wake_match)
0486         rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
0487             "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
0488             wake_match);
0489     rx_status->freq = hw->conf.chandef.chan->center_freq;
0490     rx_status->band = hw->conf.chandef.chan->band;
0491 
0492     hdr = (struct ieee80211_hdr *)(skb->data +
0493           status->rx_drvinfo_size + status->rx_bufshift);
0494 
0495     if (status->crc)
0496         rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
0497 
0498     if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40)
0499         rx_status->bw = RATE_INFO_BW_40;
0500     else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80)
0501         rx_status->bw = RATE_INFO_BW_80;
0502     if (status->is_ht)
0503         rx_status->encoding = RX_ENC_HT;
0504     if (status->is_vht)
0505         rx_status->encoding = RX_ENC_VHT;
0506 
0507     if (status->is_short_gi)
0508         rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
0509 
0510     rx_status->nss = status->vht_nss;
0511     rx_status->flag |= RX_FLAG_MACTIME_START;
0512 
0513     /* hw will set status->decrypted true, if it finds the
0514      * frame is open data frame or mgmt frame.
0515      * So hw will not decryption robust managment frame
0516      * for IEEE80211w but still set status->decrypted
0517      * true, so here we should set it back to undecrypted
0518      * for IEEE80211w frame, and mac80211 sw will help
0519      * to decrypt it
0520      */
0521     if (status->decrypted) {
0522         if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
0523             (ieee80211_has_protected(hdr->frame_control)))
0524             rx_status->flag |= RX_FLAG_DECRYPTED;
0525         else
0526             rx_status->flag &= ~RX_FLAG_DECRYPTED;
0527     }
0528 
0529     /* rate_idx: index of data rate into band's
0530      * supported rates or MCS index if HT rates
0531      * are use (RX_FLAG_HT)
0532      */
0533     rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
0534                            status->is_vht,
0535                            status->rate);
0536 
0537     rx_status->mactime = status->timestamp_low;
0538     if (phystatus) {
0539         p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data +
0540                 status->rx_bufshift);
0541 
0542         translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
0543     }
0544     rx_status->signal = status->recvsignalpower + 10;
0545     if (status->packet_report_type == TX_REPORT2) {
0546         status->macid_valid_entry[0] =
0547           get_rx_rpt2_desc_macid_valid_1(pdesc);
0548         status->macid_valid_entry[1] =
0549           get_rx_rpt2_desc_macid_valid_2(pdesc);
0550     }
0551     return true;
0552 }
0553 
0554 static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw,
0555                    struct rtl_tcb_desc *ptcb_desc)
0556 {
0557     struct rtl_priv *rtlpriv = rtl_priv(hw);
0558     struct rtl_phy *rtlphy = &rtlpriv->phy;
0559     u8 bw_setting_of_desc = 0;
0560 
0561     rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0562         "%s, current_chan_bw %d, packet_bw %d\n",
0563         __func__,
0564         rtlphy->current_chan_bw, ptcb_desc->packet_bw);
0565 
0566     if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
0567         if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
0568             bw_setting_of_desc = 2;
0569         else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40)
0570             bw_setting_of_desc = 1;
0571         else
0572             bw_setting_of_desc = 0;
0573     } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
0574         if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) ||
0575             (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80))
0576             bw_setting_of_desc = 1;
0577         else
0578             bw_setting_of_desc = 0;
0579     } else {
0580         bw_setting_of_desc = 0;
0581     }
0582     return bw_setting_of_desc;
0583 }
0584 
0585 static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw,
0586                    struct rtl_tcb_desc *ptcb_desc)
0587 {
0588     struct rtl_priv *rtlpriv = rtl_priv(hw);
0589     struct rtl_phy *rtlphy = &rtlpriv->phy;
0590     struct rtl_mac *mac = rtl_mac(rtlpriv);
0591     u8 sc_setting_of_desc = 0;
0592 
0593     if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
0594         if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) {
0595             sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
0596         } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
0597             if (mac->cur_80_prime_sc ==
0598                 HAL_PRIME_CHNL_OFFSET_LOWER)
0599                 sc_setting_of_desc =
0600                     VHT_DATA_SC_40_LOWER_OF_80MHZ;
0601             else if (mac->cur_80_prime_sc ==
0602                  HAL_PRIME_CHNL_OFFSET_UPPER)
0603                 sc_setting_of_desc =
0604                     VHT_DATA_SC_40_UPPER_OF_80MHZ;
0605             else
0606                 rtl_dbg(rtlpriv, COMP_SEND, DBG_LOUD,
0607                     "%s: Not Correct Primary40MHz Setting\n",
0608                     __func__);
0609         } else {
0610             if ((mac->cur_40_prime_sc ==
0611                  HAL_PRIME_CHNL_OFFSET_LOWER) &&
0612                 (mac->cur_80_prime_sc  ==
0613                  HAL_PRIME_CHNL_OFFSET_LOWER))
0614                 sc_setting_of_desc =
0615                     VHT_DATA_SC_20_LOWEST_OF_80MHZ;
0616             else if ((mac->cur_40_prime_sc ==
0617                   HAL_PRIME_CHNL_OFFSET_UPPER) &&
0618                  (mac->cur_80_prime_sc ==
0619                   HAL_PRIME_CHNL_OFFSET_LOWER))
0620                 sc_setting_of_desc =
0621                     VHT_DATA_SC_20_LOWER_OF_80MHZ;
0622             else if ((mac->cur_40_prime_sc ==
0623                   HAL_PRIME_CHNL_OFFSET_LOWER) &&
0624                  (mac->cur_80_prime_sc ==
0625                   HAL_PRIME_CHNL_OFFSET_UPPER))
0626                 sc_setting_of_desc =
0627                     VHT_DATA_SC_20_UPPER_OF_80MHZ;
0628             else if ((mac->cur_40_prime_sc ==
0629                   HAL_PRIME_CHNL_OFFSET_UPPER) &&
0630                  (mac->cur_80_prime_sc ==
0631                   HAL_PRIME_CHNL_OFFSET_UPPER))
0632                 sc_setting_of_desc =
0633                     VHT_DATA_SC_20_UPPERST_OF_80MHZ;
0634             else
0635                 rtl_dbg(rtlpriv, COMP_SEND, DBG_LOUD,
0636                     "%s: Not Correct Primary40MHz Setting\n",
0637                     __func__);
0638         }
0639     } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
0640         if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
0641             sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
0642         } else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) {
0643             if (mac->cur_40_prime_sc ==
0644                 HAL_PRIME_CHNL_OFFSET_UPPER) {
0645                 sc_setting_of_desc =
0646                     VHT_DATA_SC_20_UPPER_OF_80MHZ;
0647             } else if (mac->cur_40_prime_sc ==
0648                 HAL_PRIME_CHNL_OFFSET_LOWER){
0649                 sc_setting_of_desc =
0650                     VHT_DATA_SC_20_LOWER_OF_80MHZ;
0651             } else {
0652                 sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
0653             }
0654         }
0655     } else {
0656         sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
0657     }
0658 
0659     return sc_setting_of_desc;
0660 }
0661 
0662 void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,
0663                 struct ieee80211_hdr *hdr, u8 *pdesc8, u8 *txbd,
0664                 struct ieee80211_tx_info *info,
0665                 struct ieee80211_sta *sta,
0666                 struct sk_buff *skb,
0667                 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
0668 {
0669     struct rtl_priv *rtlpriv = rtl_priv(hw);
0670     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0671     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0672     struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
0673     struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
0674     u16 seq_number;
0675     __le16 fc = hdr->frame_control;
0676     unsigned int buf_len = 0;
0677     unsigned int skb_len = skb->len;
0678     u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue);
0679     bool firstseg = ((hdr->seq_ctrl &
0680               cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
0681     bool lastseg = ((hdr->frame_control &
0682              cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
0683     dma_addr_t mapping;
0684     u8 short_gi = 0;
0685     bool tmp_bool;
0686     __le32 *pdesc = (__le32 *)pdesc8;
0687 
0688     seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
0689     rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
0690     /* reserve 8 byte for AMPDU early mode */
0691     if (rtlhal->earlymode_enable) {
0692         skb_push(skb, EM_HDR_LEN);
0693         memset(skb->data, 0, EM_HDR_LEN);
0694     }
0695     buf_len = skb->len;
0696     mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
0697                  DMA_TO_DEVICE);
0698     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0699         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0700             "DMA mapping error\n");
0701         return;
0702     }
0703     clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8821ae));
0704     if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
0705         firstseg = true;
0706         lastseg = true;
0707     }
0708     if (firstseg) {
0709         if (rtlhal->earlymode_enable) {
0710             set_tx_desc_pkt_offset(pdesc, 1);
0711             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
0712                        EM_HDR_LEN);
0713             if (ptcb_desc->empkt_num) {
0714                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0715                     "Insert 8 byte.pTcb->EMPktNum:%d\n",
0716                     ptcb_desc->empkt_num);
0717                 rtl8821ae_insert_emcontent(ptcb_desc,
0718                                (__le32 *)skb->data);
0719             }
0720         } else {
0721             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0722         }
0723 
0724 
0725         /* ptcb_desc->use_driver_rate = true; */
0726         set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
0727         if (ptcb_desc->hw_rate > DESC_RATEMCS0)
0728             short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
0729         else
0730             short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
0731 
0732         set_tx_desc_data_shortgi(pdesc, short_gi);
0733 
0734         if (info->flags & IEEE80211_TX_CTL_AMPDU) {
0735             set_tx_desc_agg_enable(pdesc, 1);
0736             set_tx_desc_max_agg_num(pdesc, 0x1f);
0737         }
0738         set_tx_desc_seq(pdesc, seq_number);
0739         set_tx_desc_rts_enable(pdesc,
0740                        ((ptcb_desc->rts_enable &&
0741                     !ptcb_desc->cts_enable) ? 1 : 0));
0742         set_tx_desc_hw_rts_enable(pdesc, 0);
0743         set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
0744 
0745         set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
0746         set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
0747         tmp_bool = ((ptcb_desc->rts_rate <= DESC_RATE54M) ?
0748                 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
0749                 (ptcb_desc->rts_use_shortgi ? 1 : 0));
0750         set_tx_desc_rts_short(pdesc, tmp_bool);
0751 
0752         if (ptcb_desc->tx_enable_sw_calc_duration)
0753             set_tx_desc_nav_use_hdr(pdesc, 1);
0754 
0755         set_tx_desc_data_bw(pdesc,
0756                     rtl8821ae_bw_mapping(hw, ptcb_desc));
0757 
0758         set_tx_desc_tx_sub_carrier(pdesc,
0759                        rtl8821ae_sc_mapping(hw, ptcb_desc));
0760 
0761         set_tx_desc_linip(pdesc, 0);
0762         set_tx_desc_pkt_size(pdesc, (u16)skb_len);
0763         if (sta) {
0764             u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
0765 
0766             set_tx_desc_ampdu_density(pdesc, ampdu_density);
0767         }
0768         if (info->control.hw_key) {
0769             struct ieee80211_key_conf *keyconf =
0770                 info->control.hw_key;
0771             switch (keyconf->cipher) {
0772             case WLAN_CIPHER_SUITE_WEP40:
0773             case WLAN_CIPHER_SUITE_WEP104:
0774             case WLAN_CIPHER_SUITE_TKIP:
0775                 set_tx_desc_sec_type(pdesc, 0x1);
0776                 break;
0777             case WLAN_CIPHER_SUITE_CCMP:
0778                 set_tx_desc_sec_type(pdesc, 0x3);
0779                 break;
0780             default:
0781                 set_tx_desc_sec_type(pdesc, 0x0);
0782                 break;
0783             }
0784         }
0785 
0786         set_tx_desc_queue_sel(pdesc, fw_qsel);
0787         set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
0788         set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
0789         set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
0790                        1 : 0);
0791         set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
0792 
0793         if (ieee80211_is_data_qos(fc)) {
0794             if (mac->rdg_en) {
0795                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0796                     "Enable RDG function.\n");
0797                 set_tx_desc_rdg_enable(pdesc, 1);
0798                 set_tx_desc_htc(pdesc, 1);
0799             }
0800         }
0801         /* tx report */
0802         rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
0803     }
0804 
0805     set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
0806     set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
0807     set_tx_desc_tx_buffer_size(pdesc, buf_len);
0808     set_tx_desc_tx_buffer_address(pdesc, mapping);
0809     /* if (rtlpriv->dm.useramask) { */
0810     if (1) {
0811         set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
0812         set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
0813     } else {
0814         set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
0815         set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
0816     }
0817     if (!ieee80211_is_data_qos(fc))  {
0818         set_tx_desc_hwseq_en(pdesc, 1);
0819         set_tx_desc_hwseq_sel(pdesc, 0);
0820     }
0821     set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
0822     if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
0823         is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
0824         set_tx_desc_bmc(pdesc, 1);
0825     }
0826 
0827     rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc8, ptcb_desc->mac_id);
0828     rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
0829 }
0830 
0831 void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw,
0832                    u8 *pdesc8, bool firstseg,
0833                    bool lastseg, struct sk_buff *skb)
0834 {
0835     struct rtl_priv *rtlpriv = rtl_priv(hw);
0836     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0837     u8 fw_queue = QSLT_BEACON;
0838     __le32 *pdesc = (__le32 *)pdesc8;
0839 
0840     dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
0841                         skb->len, DMA_TO_DEVICE);
0842 
0843     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0844         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0845             "DMA mapping error\n");
0846         return;
0847     }
0848     clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
0849 
0850     set_tx_desc_first_seg(pdesc, 1);
0851     set_tx_desc_last_seg(pdesc, 1);
0852 
0853     set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
0854 
0855     set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0856 
0857     set_tx_desc_use_rate(pdesc, 1);
0858     set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
0859     set_tx_desc_disable_fb(pdesc, 1);
0860 
0861     set_tx_desc_data_bw(pdesc, 0);
0862 
0863     set_tx_desc_hwseq_en(pdesc, 1);
0864 
0865     set_tx_desc_queue_sel(pdesc, fw_queue);
0866 
0867     set_tx_desc_tx_buffer_size(pdesc, skb->len);
0868 
0869     set_tx_desc_tx_buffer_address(pdesc, mapping);
0870 
0871     set_tx_desc_macid(pdesc, 0);
0872 
0873     set_tx_desc_own(pdesc, 1);
0874 
0875     RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
0876               "H2C Tx Cmd Content\n",
0877               pdesc8, TX_DESC_SIZE);
0878 }
0879 
0880 void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
0881             bool istx, u8 desc_name, u8 *val)
0882 {
0883     __le32 *pdesc = (__le32 *)pdesc8;
0884 
0885     if (istx) {
0886         switch (desc_name) {
0887         case HW_DESC_OWN:
0888             set_tx_desc_own(pdesc, 1);
0889             break;
0890         case HW_DESC_TX_NEXTDESC_ADDR:
0891             set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
0892             break;
0893         default:
0894             WARN_ONCE(true,
0895                   "rtl8821ae: ERR txdesc :%d not processed\n",
0896                   desc_name);
0897             break;
0898         }
0899     } else {
0900         switch (desc_name) {
0901         case HW_DESC_RXOWN:
0902             set_rx_desc_own(pdesc, 1);
0903             break;
0904         case HW_DESC_RXBUFF_ADDR:
0905             set_rx_desc_buff_addr(pdesc, *(u32 *)val);
0906             break;
0907         case HW_DESC_RXPKT_LEN:
0908             set_rx_desc_pkt_len(pdesc, *(u32 *)val);
0909             break;
0910         case HW_DESC_RXERO:
0911             set_rx_desc_eor(pdesc, 1);
0912             break;
0913         default:
0914             WARN_ONCE(true,
0915                   "rtl8821ae: ERR rxdesc :%d not processed\n",
0916                   desc_name);
0917             break;
0918         }
0919     }
0920 }
0921 
0922 u64 rtl8821ae_get_desc(struct ieee80211_hw *hw,
0923                u8 *pdesc8, bool istx, u8 desc_name)
0924 {
0925     u32 ret = 0;
0926     __le32 *pdesc = (__le32 *)pdesc8;
0927 
0928     if (istx) {
0929         switch (desc_name) {
0930         case HW_DESC_OWN:
0931             ret = get_tx_desc_own(pdesc);
0932             break;
0933         case HW_DESC_TXBUFF_ADDR:
0934             ret = get_tx_desc_tx_buffer_address(pdesc);
0935             break;
0936         default:
0937             WARN_ONCE(true,
0938                   "rtl8821ae: ERR txdesc :%d not processed\n",
0939                   desc_name);
0940             break;
0941         }
0942     } else {
0943         switch (desc_name) {
0944         case HW_DESC_OWN:
0945             ret = get_rx_desc_own(pdesc);
0946             break;
0947         case HW_DESC_RXPKT_LEN:
0948             ret = get_rx_desc_pkt_len(pdesc);
0949             break;
0950         case HW_DESC_RXBUFF_ADDR:
0951             ret = get_rx_desc_buff_addr(pdesc);
0952             break;
0953         default:
0954             WARN_ONCE(true,
0955                   "rtl8821ae: ERR rxdesc :%d not processed\n",
0956                   desc_name);
0957             break;
0958         }
0959     }
0960     return ret;
0961 }
0962 
0963 bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,
0964                  u8 hw_queue, u16 index)
0965 {
0966     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0967     struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
0968     u8 *entry = (u8 *)(&ring->desc[ring->idx]);
0969     u8 own = (u8)rtl8821ae_get_desc(hw, entry, true, HW_DESC_OWN);
0970 
0971     /**
0972      *beacon packet will only use the first
0973      *descriptor defautly,and the own may not
0974      *be cleared by the hardware
0975      */
0976     if (own)
0977         return false;
0978     return true;
0979 }
0980 
0981 void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
0982 {
0983     struct rtl_priv *rtlpriv = rtl_priv(hw);
0984 
0985     if (hw_queue == BEACON_QUEUE) {
0986         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
0987     } else {
0988         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
0989                    BIT(0) << (hw_queue));
0990     }
0991 }
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