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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 2009-2014  Realtek Corporation.*/
0003 
0004 #include "../wifi.h"
0005 #include "../pci.h"
0006 #include "../base.h"
0007 #include "../stats.h"
0008 #include "reg.h"
0009 #include "def.h"
0010 #include "phy.h"
0011 #include "trx.h"
0012 #include "led.h"
0013 #include "dm.h"
0014 #include "fw.h"
0015 
0016 static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
0017 {
0018     __le16 fc = rtl_get_fc(skb);
0019 
0020     if (unlikely(ieee80211_is_beacon(fc)))
0021         return QSLT_BEACON;
0022     if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
0023         return QSLT_MGNT;
0024 
0025     return skb->priority;
0026 }
0027 
0028 static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
0029                      struct rtl_stats *pstatus,
0030                      __le32 *pdesc,
0031                      struct rx_fwinfo_8723be *p_drvinfo,
0032                      bool bpacket_match_bssid,
0033                      bool bpacket_toself,
0034                      bool packet_beacon)
0035 {
0036     struct rtl_priv *rtlpriv = rtl_priv(hw);
0037     struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
0038     s8 rx_pwr_all = 0, rx_pwr[4];
0039     u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
0040     u8 i, max_spatial_stream;
0041     u32 rssi, total_rssi = 0;
0042     bool is_cck = pstatus->is_cck;
0043     u8 lan_idx, vga_idx;
0044 
0045     /* Record it for next packet processing */
0046     pstatus->packet_matchbssid = bpacket_match_bssid;
0047     pstatus->packet_toself = bpacket_toself;
0048     pstatus->packet_beacon = packet_beacon;
0049     pstatus->rx_mimo_signalquality[0] = -1;
0050     pstatus->rx_mimo_signalquality[1] = -1;
0051 
0052     if (is_cck) {
0053         u8 cck_agc_rpt;
0054 
0055         cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
0056 
0057         /* (1)Hardware does not provide RSSI for CCK */
0058         /* (2)PWDB, Average PWDB calculated by
0059          * hardware (for rate adaptive)
0060          */
0061         rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, BIT(9));
0062 
0063         lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
0064         vga_idx = (cck_agc_rpt & 0x1f);
0065 
0066         switch (lan_idx) {
0067         /* 46 53 73 95 201301231630 */
0068         /* 46 53 77 99 201301241630 */
0069         case 6:
0070             rx_pwr_all = -34 - (2 * vga_idx);
0071             break;
0072         case 4:
0073             rx_pwr_all = -14 - (2 * vga_idx);
0074             break;
0075         case 1:
0076             rx_pwr_all = 6 - (2 * vga_idx);
0077             break;
0078         case 0:
0079             rx_pwr_all = 16 - (2 * vga_idx);
0080             break;
0081         default:
0082             break;
0083         }
0084 
0085         pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0086         if (pwdb_all > 100)
0087             pwdb_all = 100;
0088 
0089         pstatus->rx_pwdb_all = pwdb_all;
0090         pstatus->bt_rx_rssi_percentage = pwdb_all;
0091         pstatus->recvsignalpower = rx_pwr_all;
0092 
0093         /* (3) Get Signal Quality (EVM) */
0094         if (bpacket_match_bssid) {
0095             u8 sq, sq_rpt;
0096             if (pstatus->rx_pwdb_all > 40) {
0097                 sq = 100;
0098             } else {
0099                 sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
0100                 if (sq_rpt > 64)
0101                     sq = 0;
0102                 else if (sq_rpt < 20)
0103                     sq = 100;
0104                 else
0105                     sq = ((64 - sq_rpt) * 100) / 44;
0106             }
0107             pstatus->signalquality = sq;
0108             pstatus->rx_mimo_signalquality[0] = sq;
0109             pstatus->rx_mimo_signalquality[1] = -1;
0110         }
0111     } else {
0112         /* (1)Get RSSI for HT rate */
0113         for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
0114             /* we will judge RF RX path now. */
0115             if (rtlpriv->dm.rfpath_rxenable[i])
0116                 rf_rx_num++;
0117 
0118             rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
0119                     - 110;
0120 
0121             pstatus->rx_pwr[i] = rx_pwr[i];
0122             /* Translate DBM to percentage. */
0123             rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
0124             total_rssi += rssi;
0125 
0126             pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
0127         }
0128 
0129         /* (2)PWDB, Average PWDB calculated by
0130          * hardware (for rate adaptive)
0131          */
0132         rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
0133                  0x7f) - 110;
0134 
0135         pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0136         pwdb_all_bt = pwdb_all;
0137         pstatus->rx_pwdb_all = pwdb_all;
0138         pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
0139         pstatus->rxpower = rx_pwr_all;
0140         pstatus->recvsignalpower = rx_pwr_all;
0141 
0142         /* (3)EVM of HT rate */
0143         if (pstatus->rate >= DESC92C_RATEMCS8 &&
0144             pstatus->rate <= DESC92C_RATEMCS15)
0145             max_spatial_stream = 2;
0146         else
0147             max_spatial_stream = 1;
0148 
0149         for (i = 0; i < max_spatial_stream; i++) {
0150             evm = rtl_evm_db_to_percentage(
0151                         p_phystrpt->stream_rxevm[i]);
0152 
0153             if (bpacket_match_bssid) {
0154                 /* Fill value in RFD, Get the first
0155                  * spatial stream only
0156                  */
0157                 if (i == 0)
0158                     pstatus->signalquality =
0159                             (u8)(evm & 0xff);
0160                 pstatus->rx_mimo_signalquality[i] =
0161                             (u8)(evm & 0xff);
0162             }
0163         }
0164 
0165         if (bpacket_match_bssid) {
0166             for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
0167                 rtl_priv(hw)->dm.cfo_tail[i] =
0168                     (int)p_phystrpt->path_cfotail[i];
0169 
0170             if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
0171                 rtl_priv(hw)->dm.packet_count = 0;
0172             else
0173                 rtl_priv(hw)->dm.packet_count++;
0174         }
0175     }
0176 
0177     /* UI BSS List signal strength(in percentage),
0178      * make it good looking, from 0~100.
0179      */
0180     if (is_cck)
0181         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0182                                 pwdb_all));
0183     else if (rf_rx_num != 0)
0184         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0185                         total_rssi /= rf_rx_num));
0186 }
0187 
0188 static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
0189                     struct sk_buff *skb,
0190                     struct rtl_stats *pstatus,
0191                     __le32 *pdesc,
0192                     struct rx_fwinfo_8723be *p_drvinfo)
0193 {
0194     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0195     struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
0196     struct ieee80211_hdr *hdr;
0197     u8 *tmp_buf;
0198     u8 *praddr;
0199     u8 *psaddr;
0200     u16 fc, type;
0201     bool packet_matchbssid, packet_toself, packet_beacon;
0202 
0203     tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
0204 
0205     hdr = (struct ieee80211_hdr *)tmp_buf;
0206     fc = le16_to_cpu(hdr->frame_control);
0207     type = WLAN_FC_GET_TYPE(hdr->frame_control);
0208     praddr = hdr->addr1;
0209     psaddr = ieee80211_get_SA(hdr);
0210     memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
0211 
0212     packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
0213          (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
0214                   hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
0215                   hdr->addr2 : hdr->addr3)) &&
0216                   (!pstatus->hwerror) &&
0217                   (!pstatus->crc) && (!pstatus->icv));
0218 
0219     packet_toself = packet_matchbssid &&
0220         (ether_addr_equal(praddr, rtlefuse->dev_addr));
0221 
0222     /* YP: packet_beacon is not initialized,
0223      * this assignment is neccesary,
0224      * otherwise it counld be true in this case
0225      * the situation is much worse in Kernel 3.10
0226      */
0227     if (ieee80211_is_beacon(hdr->frame_control))
0228         packet_beacon = true;
0229     else
0230         packet_beacon = false;
0231 
0232     if (packet_beacon && packet_matchbssid)
0233         rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
0234 
0235     _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
0236                      packet_matchbssid,
0237                      packet_toself,
0238                      packet_beacon);
0239 
0240     rtl_process_phyinfo(hw, tmp_buf, pstatus);
0241 }
0242 
0243 static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
0244                     __le32 *virtualaddress)
0245 {
0246     u32 dwtmp = 0;
0247     memset(virtualaddress, 0, 8);
0248 
0249     set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
0250     if (ptcb_desc->empkt_num == 1) {
0251         dwtmp = ptcb_desc->empkt_len[0];
0252     } else {
0253         dwtmp = ptcb_desc->empkt_len[0];
0254         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
0255         dwtmp += ptcb_desc->empkt_len[1];
0256     }
0257     set_earlymode_len0(virtualaddress, dwtmp);
0258 
0259     if (ptcb_desc->empkt_num <= 3) {
0260         dwtmp = ptcb_desc->empkt_len[2];
0261     } else {
0262         dwtmp = ptcb_desc->empkt_len[2];
0263         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
0264         dwtmp += ptcb_desc->empkt_len[3];
0265     }
0266     set_earlymode_len1(virtualaddress, dwtmp);
0267     if (ptcb_desc->empkt_num <= 5) {
0268         dwtmp = ptcb_desc->empkt_len[4];
0269     } else {
0270         dwtmp = ptcb_desc->empkt_len[4];
0271         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
0272         dwtmp += ptcb_desc->empkt_len[5];
0273     }
0274     set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
0275     set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
0276     if (ptcb_desc->empkt_num <= 7) {
0277         dwtmp = ptcb_desc->empkt_len[6];
0278     } else {
0279         dwtmp = ptcb_desc->empkt_len[6];
0280         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
0281         dwtmp += ptcb_desc->empkt_len[7];
0282     }
0283     set_earlymode_len3(virtualaddress, dwtmp);
0284     if (ptcb_desc->empkt_num <= 9) {
0285         dwtmp = ptcb_desc->empkt_len[8];
0286     } else {
0287         dwtmp = ptcb_desc->empkt_len[8];
0288         dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
0289         dwtmp += ptcb_desc->empkt_len[9];
0290     }
0291     set_earlymode_len4(virtualaddress, dwtmp);
0292 }
0293 
0294 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
0295                  struct rtl_stats *status,
0296                  struct ieee80211_rx_status *rx_status,
0297                  u8 *pdesc8, struct sk_buff *skb)
0298 {
0299     struct rtl_priv *rtlpriv = rtl_priv(hw);
0300     struct rx_fwinfo_8723be *p_drvinfo;
0301     struct ieee80211_hdr *hdr;
0302     u8 wake_match;
0303     __le32 *pdesc = (__le32 *)pdesc8;
0304     u32 phystatus = get_rx_desc_physt(pdesc);
0305 
0306     status->length = (u16)get_rx_desc_pkt_len(pdesc);
0307     status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
0308                   RX_DRV_INFO_SIZE_UNIT;
0309     status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
0310     status->icv = (u16)get_rx_desc_icv(pdesc);
0311     status->crc = (u16)get_rx_desc_crc32(pdesc);
0312     status->hwerror = (status->crc | status->icv);
0313     status->decrypted = !get_rx_desc_swdec(pdesc);
0314     status->rate = (u8)get_rx_desc_rxmcs(pdesc);
0315     status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
0316     status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
0317     status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
0318     status->timestamp_low = get_rx_desc_tsfl(pdesc);
0319     status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
0320     status->bandwidth = (u8)get_rx_desc_bw(pdesc);
0321     status->macid = get_rx_desc_macid(pdesc);
0322     status->is_ht = (bool)get_rx_desc_rxht(pdesc);
0323 
0324     status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
0325 
0326     if (get_rx_status_desc_rpt_sel(pdesc))
0327         status->packet_report_type = C2H_PACKET;
0328     else
0329         status->packet_report_type = NORMAL_RX;
0330 
0331 
0332     if (get_rx_status_desc_pattern_match(pdesc))
0333         wake_match = BIT(2);
0334     else if (get_rx_status_desc_magic_match(pdesc))
0335         wake_match = BIT(1);
0336     else if (get_rx_status_desc_unicast_match(pdesc))
0337         wake_match = BIT(0);
0338     else
0339         wake_match = 0;
0340     if (wake_match)
0341         rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
0342             "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
0343             wake_match);
0344     rx_status->freq = hw->conf.chandef.chan->center_freq;
0345     rx_status->band = hw->conf.chandef.chan->band;
0346 
0347     hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
0348                        status->rx_bufshift);
0349 
0350     if (status->crc)
0351         rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
0352 
0353     if (status->rx_is40mhzpacket)
0354         rx_status->bw = RATE_INFO_BW_40;
0355 
0356     if (status->is_ht)
0357         rx_status->encoding = RX_ENC_HT;
0358 
0359     rx_status->flag |= RX_FLAG_MACTIME_START;
0360 
0361     /* hw will set status->decrypted true, if it finds the
0362      * frame is open data frame or mgmt frame.
0363      * So hw will not decryption robust managment frame
0364      * for IEEE80211w but still set status->decrypted
0365      * true, so here we should set it back to undecrypted
0366      * for IEEE80211w frame, and mac80211 sw will help
0367      * to decrypt it
0368      */
0369     if (status->decrypted) {
0370         if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
0371             (ieee80211_has_protected(hdr->frame_control)))
0372             rx_status->flag |= RX_FLAG_DECRYPTED;
0373         else
0374             rx_status->flag &= ~RX_FLAG_DECRYPTED;
0375     }
0376 
0377     /* rate_idx: index of data rate into band's
0378      * supported rates or MCS index if HT rates
0379      * are use (RX_FLAG_HT)
0380      */
0381     rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
0382                            false, status->rate);
0383 
0384     rx_status->mactime = status->timestamp_low;
0385     if (phystatus) {
0386         p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
0387                             status->rx_bufshift);
0388 
0389         _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
0390                              pdesc, p_drvinfo);
0391     }
0392     rx_status->signal = status->recvsignalpower + 10;
0393     if (status->packet_report_type == TX_REPORT2) {
0394         status->macid_valid_entry[0] =
0395           get_rx_rpt2_desc_macid_valid_1(pdesc);
0396         status->macid_valid_entry[1] =
0397           get_rx_rpt2_desc_macid_valid_2(pdesc);
0398     }
0399     return true;
0400 }
0401 
0402 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
0403                 struct ieee80211_hdr *hdr, u8 *pdesc8,
0404                 u8 *txbd, struct ieee80211_tx_info *info,
0405                 struct ieee80211_sta *sta, struct sk_buff *skb,
0406                 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
0407 {
0408     struct rtl_priv *rtlpriv = rtl_priv(hw);
0409     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0410     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0411     struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
0412     struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
0413     __le32 *pdesc = (__le32 *)pdesc8;
0414     u16 seq_number;
0415     __le16 fc = hdr->frame_control;
0416     unsigned int buf_len = 0;
0417     unsigned int skb_len = skb->len;
0418     u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
0419     bool firstseg = ((hdr->seq_ctrl &
0420                 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
0421     bool lastseg = ((hdr->frame_control &
0422                cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
0423     dma_addr_t mapping;
0424     u8 bw_40 = 0;
0425     u8 short_gi = 0;
0426 
0427     if (mac->opmode == NL80211_IFTYPE_STATION) {
0428         bw_40 = mac->bw_40;
0429     } else if (mac->opmode == NL80211_IFTYPE_AP ||
0430         mac->opmode == NL80211_IFTYPE_ADHOC) {
0431         if (sta)
0432             bw_40 = sta->deflink.ht_cap.cap &
0433                 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
0434     }
0435     seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
0436     rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
0437     /* reserve 8 byte for AMPDU early mode */
0438     if (rtlhal->earlymode_enable) {
0439         skb_push(skb, EM_HDR_LEN);
0440         memset(skb->data, 0, EM_HDR_LEN);
0441     }
0442     buf_len = skb->len;
0443     mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
0444                  DMA_TO_DEVICE);
0445     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0446         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");
0447         return;
0448     }
0449     clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8723be));
0450     if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
0451         firstseg = true;
0452         lastseg = true;
0453     }
0454     if (firstseg) {
0455         if (rtlhal->earlymode_enable) {
0456             set_tx_desc_pkt_offset(pdesc, 1);
0457             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
0458                        EM_HDR_LEN);
0459             if (ptcb_desc->empkt_num) {
0460                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0461                     "Insert 8 byte.pTcb->EMPktNum:%d\n",
0462                     ptcb_desc->empkt_num);
0463                 _rtl8723be_insert_emcontent(ptcb_desc,
0464                                 (__le32 *)(skb->data));
0465             }
0466         } else {
0467             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0468         }
0469 
0470 
0471         /* ptcb_desc->use_driver_rate = true; */
0472         set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
0473         if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
0474             short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
0475         else
0476             short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
0477 
0478         set_tx_desc_data_shortgi(pdesc, short_gi);
0479 
0480         if (info->flags & IEEE80211_TX_CTL_AMPDU) {
0481             set_tx_desc_agg_enable(pdesc, 1);
0482             set_tx_desc_max_agg_num(pdesc, 0x14);
0483         }
0484         set_tx_desc_seq(pdesc, seq_number);
0485         set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
0486                         !ptcb_desc->cts_enable) ?
0487                         1 : 0));
0488         set_tx_desc_hw_rts_enable(pdesc, 0);
0489         set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ?
0490                           1 : 0));
0491 
0492         set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
0493 
0494         set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
0495         set_tx_desc_rts_short(pdesc,
0496             ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
0497              (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
0498              (ptcb_desc->rts_use_shortgi ? 1 : 0)));
0499 
0500         if (ptcb_desc->tx_enable_sw_calc_duration)
0501             set_tx_desc_nav_use_hdr(pdesc, 1);
0502 
0503         if (bw_40) {
0504             if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
0505                 set_tx_desc_data_bw(pdesc, 1);
0506                 set_tx_desc_tx_sub_carrier(pdesc, 3);
0507             } else {
0508                 set_tx_desc_data_bw(pdesc, 0);
0509                 set_tx_desc_tx_sub_carrier(pdesc, mac->cur_40_prime_sc);
0510             }
0511         } else {
0512             set_tx_desc_data_bw(pdesc, 0);
0513             set_tx_desc_tx_sub_carrier(pdesc, 0);
0514         }
0515 
0516         set_tx_desc_linip(pdesc, 0);
0517         set_tx_desc_pkt_size(pdesc, (u16)skb_len);
0518         if (sta) {
0519             u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
0520             set_tx_desc_ampdu_density(pdesc, ampdu_density);
0521         }
0522         if (info->control.hw_key) {
0523             struct ieee80211_key_conf *keyconf =
0524                         info->control.hw_key;
0525             switch (keyconf->cipher) {
0526             case WLAN_CIPHER_SUITE_WEP40:
0527             case WLAN_CIPHER_SUITE_WEP104:
0528             case WLAN_CIPHER_SUITE_TKIP:
0529                 set_tx_desc_sec_type(pdesc, 0x1);
0530                 break;
0531             case WLAN_CIPHER_SUITE_CCMP:
0532                 set_tx_desc_sec_type(pdesc, 0x3);
0533                 break;
0534             default:
0535                 set_tx_desc_sec_type(pdesc, 0x0);
0536                 break;
0537             }
0538         }
0539 
0540         set_tx_desc_queue_sel(pdesc, fw_qsel);
0541         set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
0542         set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
0543         set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
0544                           1 : 0);
0545         set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
0546 
0547         /* Set TxRate and RTSRate in TxDesc  */
0548         /* This prevent Tx initial rate of new-coming packets */
0549         /* from being overwritten by retried  packet rate.*/
0550         if (ieee80211_is_data_qos(fc)) {
0551             if (mac->rdg_en) {
0552                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0553                     "Enable RDG function.\n");
0554                 set_tx_desc_rdg_enable(pdesc, 1);
0555                 set_tx_desc_htc(pdesc, 1);
0556             }
0557         }
0558         /* tx report */
0559         rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
0560     }
0561 
0562     set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
0563     set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
0564     set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);
0565     set_tx_desc_tx_buffer_address(pdesc, mapping);
0566     /* if (rtlpriv->dm.useramask) { */
0567     if (1) {
0568         set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
0569         set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
0570     } else {
0571         set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
0572         set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
0573     }
0574     if (!ieee80211_is_data_qos(fc))  {
0575         set_tx_desc_hwseq_en(pdesc, 1);
0576         set_tx_desc_hwseq_sel(pdesc, 0);
0577     }
0578     set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
0579     if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
0580         is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
0581         set_tx_desc_bmc(pdesc, 1);
0582     }
0583 
0584     rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
0585 }
0586 
0587 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,
0588                    bool firstseg, bool lastseg,
0589                    struct sk_buff *skb)
0590 {
0591     struct rtl_priv *rtlpriv = rtl_priv(hw);
0592     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0593     u8 fw_queue = QSLT_BEACON;
0594     __le32 *pdesc = (__le32 *)pdesc8;
0595 
0596     dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
0597                         skb->len, DMA_TO_DEVICE);
0598 
0599     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0600         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0601             "DMA mapping error\n");
0602         return;
0603     }
0604     clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
0605 
0606     set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0607 
0608     set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
0609 
0610     set_tx_desc_seq(pdesc, 0);
0611 
0612     set_tx_desc_linip(pdesc, 0);
0613 
0614     set_tx_desc_queue_sel(pdesc, fw_queue);
0615 
0616     set_tx_desc_first_seg(pdesc, 1);
0617     set_tx_desc_last_seg(pdesc, 1);
0618 
0619     set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
0620 
0621     set_tx_desc_tx_buffer_address(pdesc, mapping);
0622 
0623     set_tx_desc_rate_id(pdesc, 0);
0624     set_tx_desc_macid(pdesc, 0);
0625 
0626     set_tx_desc_own(pdesc, 1);
0627 
0628     set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
0629 
0630     set_tx_desc_first_seg(pdesc, 1);
0631     set_tx_desc_last_seg(pdesc, 1);
0632 
0633     set_tx_desc_use_rate(pdesc, 1);
0634 
0635     RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
0636               "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
0637 }
0638 
0639 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
0640             bool istx, u8 desc_name, u8 *val)
0641 {
0642     __le32 *pdesc = (__le32 *)pdesc8;
0643 
0644     if (istx) {
0645         switch (desc_name) {
0646         case HW_DESC_OWN:
0647             set_tx_desc_own(pdesc, 1);
0648             break;
0649         case HW_DESC_TX_NEXTDESC_ADDR:
0650             set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
0651             break;
0652         default:
0653             WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",
0654                   desc_name);
0655             break;
0656         }
0657     } else {
0658         switch (desc_name) {
0659         case HW_DESC_RXOWN:
0660             set_rx_desc_own(pdesc, 1);
0661             break;
0662         case HW_DESC_RXBUFF_ADDR:
0663             set_rx_desc_buff_addr(pdesc, *(u32 *)val);
0664             break;
0665         case HW_DESC_RXPKT_LEN:
0666             set_rx_desc_pkt_len(pdesc, *(u32 *)val);
0667             break;
0668         case HW_DESC_RXERO:
0669             set_rx_desc_eor(pdesc, 1);
0670             break;
0671         default:
0672             WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",
0673                   desc_name);
0674             break;
0675         }
0676     }
0677 }
0678 
0679 u64 rtl8723be_get_desc(struct ieee80211_hw *hw,
0680                u8 *pdesc8, bool istx, u8 desc_name)
0681 {
0682     u32 ret = 0;
0683     __le32 *pdesc = (__le32 *)pdesc8;
0684 
0685     if (istx) {
0686         switch (desc_name) {
0687         case HW_DESC_OWN:
0688             ret = get_tx_desc_own(pdesc);
0689             break;
0690         case HW_DESC_TXBUFF_ADDR:
0691             ret = get_tx_desc_tx_buffer_address(pdesc);
0692             break;
0693         default:
0694             WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",
0695                   desc_name);
0696             break;
0697         }
0698     } else {
0699         switch (desc_name) {
0700         case HW_DESC_OWN:
0701             ret = get_rx_desc_own(pdesc);
0702             break;
0703         case HW_DESC_RXPKT_LEN:
0704             ret = get_rx_desc_pkt_len(pdesc);
0705             break;
0706         case HW_DESC_RXBUFF_ADDR:
0707             ret = get_rx_desc_buff_addr(pdesc);
0708             break;
0709         default:
0710             WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",
0711                   desc_name);
0712             break;
0713         }
0714     }
0715     return ret;
0716 }
0717 
0718 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
0719                  u8 hw_queue, u16 index)
0720 {
0721     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0722     struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
0723     u8 *entry = (u8 *)(&ring->desc[ring->idx]);
0724     u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);
0725 
0726     /*beacon packet will only use the first
0727      *descriptor defautly,and the own may not
0728      *be cleared by the hardware
0729      */
0730     if (own)
0731         return false;
0732     return true;
0733 }
0734 
0735 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
0736 {
0737     struct rtl_priv *rtlpriv = rtl_priv(hw);
0738     if (hw_queue == BEACON_QUEUE) {
0739         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
0740     } else {
0741         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
0742                    BIT(0) << (hw_queue));
0743     }
0744 }
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