rtlwifi/rtl8723be/fw.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 2009-2014  Realtek Corporation.*/
0003
0004 #ifndef __RTL8723BE__FW__H__
0005 #define __RTL8723BE__FW__H__
0006
0007 #define FW_8192C_SIZE               0x8000
0008 #define FW_8192C_START_ADDRESS          0x1000
0009 #define FW_8192C_END_ADDRESS            0x5FFF
0010 #define FW_8192C_PAGE_SIZE          4096
0011 #define FW_8192C_POLLING_DELAY          5
0012
0013 #define USE_OLD_WOWLAN_DEBUG_FW         0
0014
0015 #define H2C_PWEMODE_LENGTH          7
0016
0017 /* Fw PS state for RPWM.
0018 *BIT[2:0] = HW state
0019 *BIT[3] = Protocol PS state, 1: register active state , 0: register sleep state
0020 *BIT[4] = sub-state
0021 */
0022 #define FW_PS_RF_ON     BIT(2)
0023 #define FW_PS_REGISTER_ACTIVE   BIT(3)
0024
0025 #define FW_PS_ACK       BIT(6)
0026 #define FW_PS_TOGGLE        BIT(7)
0027
0028  /* 8723BE RPWM value*/
0029  /* BIT[0] = 1: 32k, 0: 40M*/
0030 #define FW_PS_CLOCK_OFF     BIT(0)      /* 32k*/
0031 #define FW_PS_CLOCK_ON      0       /*40M*/
0032
0033 #define FW_PS_STATE_MASK    (0x0F)
0034 #define FW_PS_STATE_HW_MASK (0x07)
0035 /*ISR_ENABLE, IMR_ENABLE, and PS mode should be inherited.*/
0036 #define FW_PS_STATE_INT_MASK    (0x3F)
0037
0038 #define FW_PS_STATE(x)      (FW_PS_STATE_MASK & (x))
0039
0040 /* ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))*/
0041 #define FW_PS_STATE_ALL_ON  (FW_PS_CLOCK_ON)
0042 /* (FW_PS_RF_ON)*/
0043 #define FW_PS_STATE_RF_ON   (FW_PS_CLOCK_ON)
0044 /* 0x0*/
0045 #define FW_PS_STATE_RF_OFF  (FW_PS_CLOCK_ON)
0046 /* (FW_PS_STATE_RF_OFF)*/
0047 #define FW_PS_STATE_RF_OFF_LOW_PWR  (FW_PS_CLOCK_OFF)
0048
0049
0050 /* For 8723BE H2C PwrMode Cmd ID 5.*/
0051 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
0052 #define FW_PWR_STATE_RF_OFF 0
0053
0054 #define FW_PS_IS_ACK(x)     ((x) & FW_PS_ACK)
0055
0056 #define IS_IN_LOW_POWER_STATE(__fwpsstate)  \
0057     (FW_PS_STATE(__fwpsstate) == FW_PS_CLOCK_OFF)
0058
0059 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
0060 #define FW_PWR_STATE_RF_OFF 0
0061
0062 enum rtl8723b_h2c_cmd {
0063     H2C_8723B_RSVDPAGE = 0,
0064     H2C_8723B_MSRRPT = 1,
0065     H2C_8723B_SCAN = 2,
0066     H2C_8723B_KEEP_ALIVE_CTRL = 3,
0067     H2C_8723B_DISCONNECT_DECISION = 4,
0068     H2C_8723B_BCN_RSVDPAGE = 9,
0069     H2C_8723B_PROBERSP_RSVDPAGE = 10,
0070
0071     H2C_8723B_SETPWRMODE = 0x20,
0072     H2C_8723B_PS_LPS_PARA = 0x23,
0073     H2C_8723B_P2P_PS_OFFLOAD = 0x24,
0074
0075     H2C_8723B_RA_MASK = 0x40,
0076     H2C_RSSIBE_REPORT = 0x42,
0077     /*Not defined CTW CMD for P2P yet*/
0078     H2C_8723B_P2P_PS_CTW_CMD,
0079     MAX_8723B_H2CCMD
0080 };
0081
0082 #define pagenum_128(_len) (u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
0083
0084
0085 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val)          \
0086     *(u8 *)__ph2ccmd = __val
0087 #define SET_H2CCMD_PWRMODE_PARM_RLBM(__ph2ccmd, __val)          \
0088     u8p_replace_bits(__ph2ccmd + 1, __val, GENMASK(3, 0))
0089 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val)      \
0090     u8p_replace_bits(__ph2ccmd + 1, __val, GENMASK(7, 4))
0091 #define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__ph2ccmd, __val)    \
0092     *(u8 *)(__ph2ccmd + 2) = __val
0093 #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__ph2ccmd, __val)   \
0094     *(u8 *)(__ph2ccmd + 3) = __val
0095 #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__ph2ccmd, __val)     \
0096     *(u8 *)(__ph2ccmd + 4) = __val
0097 #define SET_H2CCMD_PWRMODE_PARM_BYTE5(__ph2ccmd, __val)         \
0098     *(u8 *)(__ph2ccmd + 5) = __val
0099
0100 #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__ph2ccmd, __val)     \
0101     u8p_replace_bits(__ph2ccmd, __val, BIT(0))
0102 #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__ph2ccmd, __val)  \
0103     u8p_replace_bits(__ph2ccmd, __val, BIT(1))
0104
0105 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)     \
0106     *(u8 *)(__ph2ccmd) = __val
0107 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)        \
0108     *(u8 *)(__ph2ccmd + 1) = __val
0109 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)     \
0110     *(u8 *)(__ph2ccmd + 2) = __val
0111 #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \
0112     *(u8 *)(__ph2ccmd + 3) = __val
0113 #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val)  \
0114     *(u8 *)(__ph2ccmd + 4) = __val
0115
0116
0117 void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
0118                 u32 cmd_len, u8 *p_cmdbuffer);
0119 void rtl8723be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
0120 void rtl8723be_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus);
0121 void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
0122 void rtl8723be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
0123 #endif