rtlwifi/rtl8723ae/phy.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 2009-2012  Realtek Corporation.*/
0003
0004 #ifndef __RTL92C_PHY_H__
0005 #define __RTL92C_PHY_H__
0006
0007 #define MAX_PRECMD_CNT              16
0008 #define MAX_RFDEPENDCMD_CNT         16
0009 #define MAX_POSTCMD_CNT             16
0010
0011 #define MAX_DOZE_WAITING_TIMES_9x       64
0012
0013 #define RT_CANNOT_IO(hw)            false
0014 #define HIGHPOWER_RADIOA_ARRAYLEN       22
0015
0016 #define IQK_ADDA_REG_NUM            16
0017 #define MAX_TOLERANCE               5
0018 #define IQK_DELAY_TIME              1
0019
0020 #define APK_BB_REG_NUM              5
0021 #define APK_AFE_REG_NUM             16
0022 #define APK_CURVE_REG_NUM           4
0023 #define PATH_NUM                2
0024
0025 #define LOOP_LIMIT              5
0026 #define MAX_STALL_TIME              50
0027 #define ANTENNADIVERSITYVALUE           0x80
0028 #define MAX_TXPWR_IDX_NMODE_92S         63
0029 #define reset_cnt_limit             3
0030
0031 #define IQK_ADDA_REG_NUM            16
0032 #define IQK_MAC_REG_NUM             4
0033
0034 #define IQK_DELAY_TIME              1
0035
0036 #define RF6052_MAX_PATH             2
0037
0038 #define CT_OFFSET_MAC_ADDR          0X16
0039
0040 #define CT_OFFSET_CCK_TX_PWR_IDX        0x5A
0041 #define CT_OFFSET_HT401S_TX_PWR_IDX     0x60
0042 #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF    0x66
0043 #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF      0x69
0044 #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF      0x6C
0045
0046 #define CT_OFFSET_HT40_MAX_PWR_OFFSET       0x6F
0047 #define CT_OFFSET_HT20_MAX_PWR_OFFSET       0x72
0048
0049 #define CT_OFFSET_CHANNEL_PLAH          0x75
0050 #define CT_OFFSET_THERMAL_METER         0x78
0051 #define CT_OFFSET_RF_OPTION         0x79
0052 #define CT_OFFSET_VERSION           0x7E
0053 #define CT_OFFSET_CUSTOMER_ID           0x7F
0054
0055 #define RTL92C_MAX_PATH_NUM         2
0056
0057 enum hw90_block_e {
0058     HW90_BLOCK_MAC = 0,
0059     HW90_BLOCK_PHY0 = 1,
0060     HW90_BLOCK_PHY1 = 2,
0061     HW90_BLOCK_RF = 3,
0062     HW90_BLOCK_MAXIMUM = 4,
0063 };
0064
0065 enum baseband_config_type {
0066     BASEBAND_CONFIG_PHY_REG = 0,
0067     BASEBAND_CONFIG_AGC_TAB = 1,
0068 };
0069
0070 enum ra_offset_area {
0071     RA_OFFSET_LEGACY_OFDM1,
0072     RA_OFFSET_LEGACY_OFDM2,
0073     RA_OFFSET_HT_OFDM1,
0074     RA_OFFSET_HT_OFDM2,
0075     RA_OFFSET_HT_OFDM3,
0076     RA_OFFSET_HT_OFDM4,
0077     RA_OFFSET_HT_CCK,
0078 };
0079
0080 enum antenna_path {
0081     ANTENNA_NONE,
0082     ANTENNA_D,
0083     ANTENNA_C,
0084     ANTENNA_CD,
0085     ANTENNA_B,
0086     ANTENNA_BD,
0087     ANTENNA_BC,
0088     ANTENNA_BCD,
0089     ANTENNA_A,
0090     ANTENNA_AD,
0091     ANTENNA_AC,
0092     ANTENNA_ACD,
0093     ANTENNA_AB,
0094     ANTENNA_ABD,
0095     ANTENNA_ABC,
0096     ANTENNA_ABCD
0097 };
0098
0099 struct r_antenna_select_ofdm {
0100     u32 r_tx_antenna:4;
0101     u32 r_ant_l:4;
0102     u32 r_ant_non_ht:4;
0103     u32 r_ant_ht1:4;
0104     u32 r_ant_ht2:4;
0105     u32 r_ant_ht_s1:4;
0106     u32 r_ant_non_ht_s1:4;
0107     u32 ofdm_txsc:2;
0108     u32 reserved:2;
0109 };
0110
0111 struct r_antenna_select_cck {
0112     u8 r_cckrx_enable_2:2;
0113     u8 r_cckrx_enable:2;
0114     u8 r_ccktx_enable:4;
0115 };
0116
0117 struct efuse_contents {
0118     u8 mac_addr[ETH_ALEN];
0119     u8 cck_tx_power_idx[6];
0120     u8 ht40_1s_tx_power_idx[6];
0121     u8 ht40_2s_tx_power_idx_diff[3];
0122     u8 ht20_tx_power_idx_diff[3];
0123     u8 ofdm_tx_power_idx_diff[3];
0124     u8 ht40_max_power_offset[3];
0125     u8 ht20_max_power_offset[3];
0126     u8 channel_plan;
0127     u8 thermal_meter;
0128     u8 rf_option[5];
0129     u8 version;
0130     u8 oem_id;
0131     u8 regulatory;
0132 };
0133
0134 struct tx_power_struct {
0135     u8 cck[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0136     u8 ht40_1s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0137     u8 ht40_2s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0138     u8 ht20_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0139     u8 legacy_ht_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0140     u8 legacy_ht_txpowerdiff;
0141     u8 groupht20[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0142     u8 groupht40[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
0143     u8 pwrgroup_cnt;
0144     u32 mcs_original_offset[4][16];
0145 };
0146
0147 u32 rtl8723e_phy_query_rf_reg(struct ieee80211_hw *hw,
0148                   enum radio_path rfpath, u32 regaddr,
0149                   u32 bitmask);
0150 void rtl8723e_phy_set_rf_reg(struct ieee80211_hw *hw,
0151                  enum radio_path rfpath, u32 regaddr,
0152                  u32 bitmask, u32 data);
0153 bool rtl8723e_phy_mac_config(struct ieee80211_hw *hw);
0154 bool rtl8723e_phy_bb_config(struct ieee80211_hw *hw);
0155 bool rtl8723e_phy_rf_config(struct ieee80211_hw *hw);
0156 bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
0157                       enum radio_path rfpath);
0158 void rtl8723e_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
0159 void rtl8723e_phy_get_txpower_level(struct ieee80211_hw *hw,
0160                     long *powerlevel);
0161 void rtl8723e_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
0162 bool rtl8723e_phy_update_txpower_dbm(struct ieee80211_hw *hw,
0163                      long power_indbm);
0164 void rtl8723e_phy_scan_operation_backup(struct ieee80211_hw *hw,
0165                     u8 operation);
0166 void rtl8723e_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
0167 void rtl8723e_phy_set_bw_mode(struct ieee80211_hw *hw,
0168                   enum nl80211_channel_type ch_type);
0169 void rtl8723e_phy_sw_chnl_callback(struct ieee80211_hw *hw);
0170 u8 rtl8723e_phy_sw_chnl(struct ieee80211_hw *hw);
0171 void rtl8723e_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
0172 void rtl8723e_phy_lc_calibrate(struct ieee80211_hw *hw);
0173 void rtl8723e_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
0174 bool rtl8723e_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
0175                         enum radio_path rfpath);
0176 bool rtl8723e_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
0177 bool rtl8723e_phy_set_rf_power_state(struct ieee80211_hw *hw,
0178                      enum rf_pwrstate rfpwr_state);
0179
0180 #endif