0001
0002
0003
0004 #include "../wifi.h"
0005 #include "reg.h"
0006 #include "def.h"
0007 #include "phy.h"
0008 #include "rf.h"
0009 #include "dm.h"
0010
0011 static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
0012
0013 void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
0014 {
0015 struct rtl_priv *rtlpriv = rtl_priv(hw);
0016 struct rtl_phy *rtlphy = &rtlpriv->phy;
0017
0018 switch (bandwidth) {
0019 case HT_CHANNEL_WIDTH_20:
0020 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
0021 0xfffff3ff) | BIT(10) | BIT(11));
0022 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
0023 rtlphy->rfreg_chnlval[0]);
0024 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
0025 rtlphy->rfreg_chnlval[0]);
0026 break;
0027 case HT_CHANNEL_WIDTH_20_40:
0028 rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
0029 0xfffff3ff) | BIT(10));
0030 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
0031 rtlphy->rfreg_chnlval[0]);
0032 rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
0033 rtlphy->rfreg_chnlval[0]);
0034 break;
0035 default:
0036 pr_err("unknown bandwidth: %#X\n", bandwidth);
0037 break;
0038 }
0039 }
0040
0041 bool rtl92ee_phy_rf6052_config(struct ieee80211_hw *hw)
0042 {
0043 struct rtl_priv *rtlpriv = rtl_priv(hw);
0044 struct rtl_phy *rtlphy = &rtlpriv->phy;
0045
0046 if (rtlphy->rf_type == RF_1T1R)
0047 rtlphy->num_total_rfpath = 1;
0048 else
0049 rtlphy->num_total_rfpath = 2;
0050
0051 return _rtl92ee_phy_rf6052_config_parafile(hw);
0052 }
0053
0054 static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
0055 {
0056 struct rtl_priv *rtlpriv = rtl_priv(hw);
0057 struct rtl_phy *rtlphy = &rtlpriv->phy;
0058 u32 u4_regvalue = 0;
0059 u8 rfpath;
0060 bool rtstatus = true;
0061 struct bb_reg_def *pphyreg;
0062
0063 for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
0064 pphyreg = &rtlphy->phyreg_def[rfpath];
0065
0066 switch (rfpath) {
0067 case RF90_PATH_A:
0068 case RF90_PATH_C:
0069 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
0070 BRFSI_RFENV);
0071 break;
0072 case RF90_PATH_B:
0073 case RF90_PATH_D:
0074 u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
0075 BRFSI_RFENV << 16);
0076 break;
0077 }
0078
0079 rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
0080 udelay(1);
0081
0082 rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
0083 udelay(1);
0084
0085 rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
0086 B3WIREADDREAALENGTH, 0x0);
0087 udelay(1);
0088
0089 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
0090 udelay(1);
0091
0092 switch (rfpath) {
0093 case RF90_PATH_A:
0094 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
0095 (enum radio_path)rfpath);
0096 break;
0097 case RF90_PATH_B:
0098 rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
0099 (enum radio_path)rfpath);
0100 break;
0101 case RF90_PATH_C:
0102 break;
0103 case RF90_PATH_D:
0104 break;
0105 }
0106
0107 switch (rfpath) {
0108 case RF90_PATH_A:
0109 case RF90_PATH_C:
0110 rtl_set_bbreg(hw, pphyreg->rfintfs,
0111 BRFSI_RFENV, u4_regvalue);
0112 break;
0113 case RF90_PATH_B:
0114 case RF90_PATH_D:
0115 rtl_set_bbreg(hw, pphyreg->rfintfs,
0116 BRFSI_RFENV << 16, u4_regvalue);
0117 break;
0118 }
0119
0120 if (!rtstatus) {
0121 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
0122 "Radio[%d] Fail!!\n", rfpath);
0123 return false;
0124 }
0125 }
0126
0127 rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "\n");
0128 return rtstatus;
0129 }