0001
0002
0003
0004 #include "../wifi.h"
0005 #include "../base.h"
0006 #include "../pci.h"
0007 #include "../core.h"
0008 #include "reg.h"
0009 #include "def.h"
0010 #include "phy.h"
0011 #include "dm.h"
0012 #include "../rtl8192c/fw_common.h"
0013
0014 void rtl92ce_dm_dynamic_txpower(struct ieee80211_hw *hw)
0015 {
0016 struct rtl_priv *rtlpriv = rtl_priv(hw);
0017 struct rtl_phy *rtlphy = &(rtlpriv->phy);
0018 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0019 long undec_sm_pwdb;
0020
0021 if (!rtlpriv->dm.dynamic_txpower_enable)
0022 return;
0023
0024 if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
0025 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
0026 return;
0027 }
0028
0029 if ((mac->link_state < MAC80211_LINKED) &&
0030 (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
0031 rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
0032 "Not connected to any\n");
0033
0034 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
0035
0036 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
0037 return;
0038 }
0039
0040 if (mac->link_state >= MAC80211_LINKED) {
0041 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
0042 undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
0043 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0044 "AP Client PWDB = 0x%lx\n",
0045 undec_sm_pwdb);
0046 } else {
0047 undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
0048 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0049 "STA Default Port PWDB = 0x%lx\n",
0050 undec_sm_pwdb);
0051 }
0052 } else {
0053 undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
0054
0055 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0056 "AP Ext Port PWDB = 0x%lx\n",
0057 undec_sm_pwdb);
0058 }
0059
0060 if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
0061 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
0062 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0063 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
0064 } else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
0065 (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
0066
0067 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
0068 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0069 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
0070 } else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
0071 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
0072 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0073 "TXHIGHPWRLEVEL_NORMAL\n");
0074 }
0075
0076 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
0077 rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
0078 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
0079 rtlphy->current_channel);
0080 rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
0081 }
0082
0083 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
0084 }