rtlwifi/rtl8192c/dm_common.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 2009-2012  Realtek Corporation.*/
0003
0004 #ifndef __RTL92COMMON_DM_H__
0005 #define __RTL92COMMON_DM_H__
0006
0007 #include "../wifi.h"
0008 #include "../rtl8192ce/def.h"
0009 #include "../rtl8192ce/reg.h"
0010 #include "fw_common.h"
0011
0012 #define HAL_DM_DIG_DISABLE          BIT(0)
0013 #define HAL_DM_HIPWR_DISABLE            BIT(1)
0014
0015 #define OFDM_TABLE_LENGTH           37
0016 #define CCK_TABLE_LENGTH            33
0017
0018 #define OFDM_TABLE_SIZE             37
0019 #define CCK_TABLE_SIZE              33
0020
0021 #define BW_AUTO_SWITCH_HIGH_LOW         25
0022 #define BW_AUTO_SWITCH_LOW_HIGH         30
0023
0024 #define DM_DIG_FA_UPPER             0x32
0025 #define DM_DIG_FA_LOWER             0x20
0026 #define DM_DIG_FA_TH0               0x20
0027 #define DM_DIG_FA_TH1               0x100
0028 #define DM_DIG_FA_TH2               0x200
0029
0030 #define RXPATHSELECTION_SS_TH_LOW       30
0031 #define RXPATHSELECTION_DIFF_TH         18
0032
0033 #define DM_RATR_STA_INIT            0
0034 #define DM_RATR_STA_HIGH            1
0035 #define DM_RATR_STA_MIDDLE          2
0036 #define DM_RATR_STA_LOW             3
0037
0038 #define CTS2SELF_THVAL              30
0039 #define REGC38_TH               20
0040
0041 #define WAIOTTHVAL              25
0042
0043 #define TXHIGHPWRLEVEL_NORMAL           0
0044 #define TXHIGHPWRLEVEL_LEVEL1           1
0045 #define TXHIGHPWRLEVEL_LEVEL2           2
0046 #define TXHIGHPWRLEVEL_BT1          3
0047 #define TXHIGHPWRLEVEL_BT2          4
0048
0049 #define DM_TYPE_BYFW                0
0050 #define DM_TYPE_BYDRIVER            1
0051
0052 #define TX_POWER_NEAR_FIELD_THRESH_LVL2     74
0053 #define TX_POWER_NEAR_FIELD_THRESH_LVL1     67
0054
0055 #define DYNAMIC_FUNC_DISABLE            0x0
0056 #define DYNAMIC_FUNC_DIG            BIT(0)
0057 #define DYNAMIC_FUNC_HP             BIT(1)
0058 #define DYNAMIC_FUNC_SS             BIT(2) /*Tx Power Tracking*/
0059 #define DYNAMIC_FUNC_BT             BIT(3)
0060 #define DYNAMIC_FUNC_ANT_DIV            BIT(4)
0061
0062 #define RSSI_CCK                0
0063 #define RSSI_OFDM               1
0064 #define RSSI_DEFAULT                2
0065
0066 struct swat_t {
0067     u8 failure_cnt;
0068     u8 try_flag;
0069     u8 stop_trying;
0070     long pre_rssi;
0071     long trying_threshold;
0072     u8 cur_antenna;
0073     u8 pre_antenna;
0074 };
0075
0076 enum tag_dynamic_init_gain_operation_type_definition {
0077     DIG_TYPE_THRESH_HIGH = 0,
0078     DIG_TYPE_THRESH_LOW = 1,
0079     DIG_TYPE_BACKOFF = 2,
0080     DIG_TYPE_RX_GAIN_MIN = 3,
0081     DIG_TYPE_RX_GAIN_MAX = 4,
0082     DIG_TYPE_ENABLE = 5,
0083     DIG_TYPE_DISABLE = 6,
0084     DIG_OP_TYPE_MAX
0085 };
0086
0087 enum dm_1r_cca_e {
0088     CCA_1R = 0,
0089     CCA_2R = 1,
0090     CCA_MAX = 2,
0091 };
0092
0093 enum dm_rf_e {
0094     RF_SAVE = 0,
0095     RF_NORMAL = 1,
0096     RF_MAX = 2,
0097 };
0098
0099 enum dm_sw_ant_switch_e {
0100     ANS_ANTENNA_B = 1,
0101     ANS_ANTENNA_A = 2,
0102     ANS_ANTENNA_MAX = 3,
0103 };
0104
0105 void rtl92c_dm_init(struct ieee80211_hw *hw);
0106 void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
0107 void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
0108 void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
0109 void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
0110 void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
0111 void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
0112 void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta);
0113 void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
0114 void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool recovery);
0115 void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
0116 void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
0117 void dm_savepowerindex(struct ieee80211_hw *hw);
0118 void dm_writepowerindex(struct ieee80211_hw *hw, u8 value);
0119 void dm_restorepowerindex(struct ieee80211_hw *hw);
0120
0121 #endif