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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright(c) 2009-2013  Realtek Corporation.*/
0003 
0004 #include "../wifi.h"
0005 #include "../pci.h"
0006 #include "../base.h"
0007 #include "../stats.h"
0008 #include "reg.h"
0009 #include "def.h"
0010 #include "trx.h"
0011 #include "led.h"
0012 #include "dm.h"
0013 #include "phy.h"
0014 
0015 static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
0016 {
0017     __le16 fc = rtl_get_fc(skb);
0018 
0019     if (unlikely(ieee80211_is_beacon(fc)))
0020         return QSLT_BEACON;
0021     if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
0022         return QSLT_MGNT;
0023 
0024     return skb->priority;
0025 }
0026 
0027 static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw,
0028             struct rtl_stats *pstatus, __le32 *pdesc,
0029             struct rx_fwinfo_88e *p_drvinfo,
0030             bool bpacket_match_bssid,
0031             bool bpacket_toself, bool packet_beacon)
0032 {
0033     struct rtl_priv *rtlpriv = rtl_priv(hw);
0034     struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
0035     struct phy_sts_cck_8192s_t *cck_buf;
0036     struct phy_status_rpt *phystrpt =
0037         (struct phy_status_rpt *)p_drvinfo;
0038     struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
0039     s8 rx_pwr_all = 0, rx_pwr[4];
0040     u8 rf_rx_num = 0, evm, pwdb_all;
0041     u8 i, max_spatial_stream;
0042     u32 rssi, total_rssi = 0;
0043     bool is_cck = pstatus->is_cck;
0044     u8 lan_idx, vga_idx;
0045 
0046     /* Record it for next packet processing */
0047     pstatus->packet_matchbssid = bpacket_match_bssid;
0048     pstatus->packet_toself = bpacket_toself;
0049     pstatus->packet_beacon = packet_beacon;
0050     pstatus->rx_mimo_signalquality[0] = -1;
0051     pstatus->rx_mimo_signalquality[1] = -1;
0052 
0053     if (is_cck) {
0054         u8 cck_highpwr;
0055         u8 cck_agc_rpt;
0056         /* CCK Driver info Structure is not the same as OFDM packet. */
0057         cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
0058         cck_agc_rpt = cck_buf->cck_agc_rpt;
0059 
0060         /* (1)Hardware does not provide RSSI for CCK
0061          * (2)PWDB, Average PWDB calculated by
0062          * hardware (for rate adaptive)
0063          */
0064         if (ppsc->rfpwr_state == ERFON)
0065             cck_highpwr =
0066                 (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
0067                           BIT(9));
0068         else
0069             cck_highpwr = false;
0070 
0071         lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
0072         vga_idx = (cck_agc_rpt & 0x1f);
0073         switch (lan_idx) {
0074         case 7:
0075             if (vga_idx <= 27)
0076                 /*VGA_idx = 27~2*/
0077                 rx_pwr_all = -100 + 2*(27-vga_idx);
0078             else
0079                 rx_pwr_all = -100;
0080             break;
0081         case 6:
0082             /*VGA_idx = 2~0*/
0083             rx_pwr_all = -48 + 2*(2-vga_idx);
0084             break;
0085         case 5:
0086             /*VGA_idx = 7~5*/
0087             rx_pwr_all = -42 + 2*(7-vga_idx);
0088             break;
0089         case 4:
0090             /*VGA_idx = 7~4*/
0091             rx_pwr_all = -36 + 2*(7-vga_idx);
0092             break;
0093         case 3:
0094             /*VGA_idx = 7~0*/
0095             rx_pwr_all = -24 + 2*(7-vga_idx);
0096             break;
0097         case 2:
0098             if (cck_highpwr)
0099                 /*VGA_idx = 5~0*/
0100                 rx_pwr_all = -12 + 2*(5-vga_idx);
0101             else
0102                 rx_pwr_all = -6 + 2*(5-vga_idx);
0103             break;
0104         case 1:
0105             rx_pwr_all = 8-2*vga_idx;
0106             break;
0107         case 0:
0108             rx_pwr_all = 14-2*vga_idx;
0109             break;
0110         default:
0111             break;
0112         }
0113         rx_pwr_all += 6;
0114         pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0115         /* CCK gain is smaller than OFDM/MCS gain,  */
0116         /* so we add gain diff by experiences, the val is 6 */
0117         pwdb_all += 6;
0118         if (pwdb_all > 100)
0119             pwdb_all = 100;
0120         /* modify the offset to make the same
0121          * gain index with OFDM.
0122          */
0123         if (pwdb_all > 34 && pwdb_all <= 42)
0124             pwdb_all -= 2;
0125         else if (pwdb_all > 26 && pwdb_all <= 34)
0126             pwdb_all -= 6;
0127         else if (pwdb_all > 14 && pwdb_all <= 26)
0128             pwdb_all -= 8;
0129         else if (pwdb_all > 4 && pwdb_all <= 14)
0130             pwdb_all -= 4;
0131         if (!cck_highpwr) {
0132             if (pwdb_all >= 80)
0133                 pwdb_all = ((pwdb_all-80)<<1) +
0134                        ((pwdb_all-80)>>1) + 80;
0135             else if ((pwdb_all <= 78) && (pwdb_all >= 20))
0136                 pwdb_all += 3;
0137             if (pwdb_all > 100)
0138                 pwdb_all = 100;
0139         }
0140 
0141         pstatus->rx_pwdb_all = pwdb_all;
0142         pstatus->recvsignalpower = rx_pwr_all;
0143 
0144         /* (3) Get Signal Quality (EVM) */
0145         if (bpacket_match_bssid) {
0146             u8 sq;
0147 
0148             if (pstatus->rx_pwdb_all > 40)
0149                 sq = 100;
0150             else {
0151                 sq = cck_buf->sq_rpt;
0152                 if (sq > 64)
0153                     sq = 0;
0154                 else if (sq < 20)
0155                     sq = 100;
0156                 else
0157                     sq = ((64 - sq) * 100) / 44;
0158             }
0159 
0160             pstatus->signalquality = sq;
0161             pstatus->rx_mimo_signalquality[0] = sq;
0162             pstatus->rx_mimo_signalquality[1] = -1;
0163         }
0164     } else {
0165         rtlpriv->dm.rfpath_rxenable[0] =
0166             rtlpriv->dm.rfpath_rxenable[1] = true;
0167 
0168         /* (1)Get RSSI for HT rate */
0169         for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
0170             /* we will judge RF RX path now. */
0171             if (rtlpriv->dm.rfpath_rxenable[i])
0172                 rf_rx_num++;
0173 
0174             rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
0175                       0x3f) * 2) - 110;
0176 
0177             /* Translate DBM to percentage. */
0178             rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
0179             total_rssi += rssi;
0180 
0181             /* Get Rx snr value in DB */
0182             rtlpriv->stats.rx_snr_db[i] =
0183                 (long)(p_drvinfo->rxsnr[i] / 2);
0184 
0185             /* Record Signal Strength for next packet */
0186             if (bpacket_match_bssid)
0187                 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
0188         }
0189 
0190         /* (2)PWDB, Average PWDB calculated by
0191          * hardware (for rate adaptive)
0192          */
0193         rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
0194 
0195         pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
0196         pstatus->rx_pwdb_all = pwdb_all;
0197         pstatus->rxpower = rx_pwr_all;
0198         pstatus->recvsignalpower = rx_pwr_all;
0199 
0200         /* (3)EVM of HT rate */
0201         if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
0202             pstatus->rate <= DESC92C_RATEMCS15)
0203             max_spatial_stream = 2;
0204         else
0205             max_spatial_stream = 1;
0206 
0207         for (i = 0; i < max_spatial_stream; i++) {
0208             evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
0209 
0210             if (bpacket_match_bssid) {
0211                 /* Fill value in RFD, Get the first
0212                  * spatial stream onlyi
0213                  */
0214                 if (i == 0)
0215                     pstatus->signalquality =
0216                         (u8)(evm & 0xff);
0217                 pstatus->rx_mimo_signalquality[i] =
0218                     (u8)(evm & 0xff);
0219             }
0220         }
0221     }
0222 
0223     /* UI BSS List signal strength(in percentage),
0224      * make it good looking, from 0~100.
0225      */
0226     if (is_cck)
0227         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0228             pwdb_all));
0229     else if (rf_rx_num != 0)
0230         pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
0231             total_rssi /= rf_rx_num));
0232     /*HW antenna diversity*/
0233     rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel;
0234     rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b;
0235     rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2;
0236 }
0237 
0238 static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw,
0239     struct rtl_stats *pstatus)
0240 {
0241     struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
0242     struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
0243     u8 antsel_tr_mux;
0244     struct fast_ant_training *pfat_table = &rtldm->fat_table;
0245 
0246     if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) {
0247         if (pfat_table->fat_state == FAT_TRAINING_STATE) {
0248             if (pstatus->packet_toself) {
0249                 antsel_tr_mux =
0250                     (pfat_table->antsel_rx_keep_2 << 2) |
0251                     (pfat_table->antsel_rx_keep_1 << 1) |
0252                     pfat_table->antsel_rx_keep_0;
0253                 pfat_table->ant_sum[antsel_tr_mux] +=
0254                     pstatus->rx_pwdb_all;
0255                 pfat_table->ant_cnt[antsel_tr_mux]++;
0256             }
0257         }
0258     } else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) ||
0259     (rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) {
0260         if (pstatus->packet_toself || pstatus->packet_matchbssid) {
0261             antsel_tr_mux = (pfat_table->antsel_rx_keep_2 << 2) |
0262                     (pfat_table->antsel_rx_keep_1 << 1) |
0263                     pfat_table->antsel_rx_keep_0;
0264             rtl88e_dm_ant_sel_statistics(hw, antsel_tr_mux, 0,
0265                              pstatus->rx_pwdb_all);
0266         }
0267 
0268     }
0269 }
0270 
0271 static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
0272                            struct sk_buff *skb,
0273                            struct rtl_stats *pstatus,
0274                            __le32 *pdesc,
0275                            struct rx_fwinfo_88e *p_drvinfo)
0276 {
0277     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0278     struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
0279     struct ieee80211_hdr *hdr;
0280     u8 *tmp_buf;
0281     u8 *praddr;
0282     u8 *psaddr;
0283     __le16 fc;
0284     bool packet_matchbssid, packet_toself, packet_beacon;
0285 
0286     tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
0287 
0288     hdr = (struct ieee80211_hdr *)tmp_buf;
0289     fc = hdr->frame_control;
0290     praddr = hdr->addr1;
0291     psaddr = ieee80211_get_SA(hdr);
0292     memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
0293 
0294     packet_matchbssid = ((!ieee80211_is_ctl(fc)) &&
0295          (ether_addr_equal(mac->bssid, ieee80211_has_tods(fc) ?
0296                    hdr->addr1 : ieee80211_has_fromds(fc) ?
0297                    hdr->addr2 : hdr->addr3)) &&
0298                    (!pstatus->hwerror) &&
0299                    (!pstatus->crc) && (!pstatus->icv));
0300 
0301     packet_toself = packet_matchbssid &&
0302         (ether_addr_equal(praddr, rtlefuse->dev_addr));
0303 
0304     if (ieee80211_is_beacon(hdr->frame_control))
0305         packet_beacon = true;
0306     else
0307         packet_beacon = false;
0308 
0309     _rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
0310                    packet_matchbssid, packet_toself,
0311                    packet_beacon);
0312     _rtl88ee_smart_antenna(hw, pstatus);
0313     rtl_process_phyinfo(hw, tmp_buf, pstatus);
0314 }
0315 
0316 static void rtl88ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
0317                      __le32 *virtualaddress)
0318 {
0319     u32 dwtmp = 0;
0320     memset(virtualaddress, 0, 8);
0321 
0322     set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
0323     if (ptcb_desc->empkt_num == 1) {
0324         dwtmp = ptcb_desc->empkt_len[0];
0325     } else {
0326         dwtmp = ptcb_desc->empkt_len[0];
0327         dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
0328         dwtmp += ptcb_desc->empkt_len[1];
0329     }
0330     set_earlymode_len0(virtualaddress, dwtmp);
0331 
0332     if (ptcb_desc->empkt_num <= 3) {
0333         dwtmp = ptcb_desc->empkt_len[2];
0334     } else {
0335         dwtmp = ptcb_desc->empkt_len[2];
0336         dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
0337         dwtmp += ptcb_desc->empkt_len[3];
0338     }
0339     set_earlymode_len1(virtualaddress, dwtmp);
0340     if (ptcb_desc->empkt_num <= 5) {
0341         dwtmp = ptcb_desc->empkt_len[4];
0342     } else {
0343         dwtmp = ptcb_desc->empkt_len[4];
0344         dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
0345         dwtmp += ptcb_desc->empkt_len[5];
0346     }
0347     set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
0348     set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
0349     if (ptcb_desc->empkt_num <= 7) {
0350         dwtmp = ptcb_desc->empkt_len[6];
0351     } else {
0352         dwtmp = ptcb_desc->empkt_len[6];
0353         dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
0354         dwtmp += ptcb_desc->empkt_len[7];
0355     }
0356     set_earlymode_len3(virtualaddress, dwtmp);
0357     if (ptcb_desc->empkt_num <= 9) {
0358         dwtmp = ptcb_desc->empkt_len[8];
0359     } else {
0360         dwtmp = ptcb_desc->empkt_len[8];
0361         dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
0362         dwtmp += ptcb_desc->empkt_len[9];
0363     }
0364     set_earlymode_len4(virtualaddress, dwtmp);
0365 }
0366 
0367 bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
0368                struct rtl_stats *status,
0369                struct ieee80211_rx_status *rx_status,
0370                u8 *pdesc8, struct sk_buff *skb)
0371 {
0372     struct rtl_priv *rtlpriv = rtl_priv(hw);
0373     struct rx_fwinfo_88e *p_drvinfo;
0374     struct ieee80211_hdr *hdr;
0375     u8 wake_match;
0376     __le32 *pdesc = (__le32 *)pdesc8;
0377     u32 phystatus = get_rx_desc_physt(pdesc);
0378 
0379     status->packet_report_type = (u8)get_rx_status_desc_rpt_sel(pdesc);
0380     if (status->packet_report_type == TX_REPORT2)
0381         status->length = (u16)get_rx_rpt2_desc_pkt_len(pdesc);
0382     else
0383         status->length = (u16)get_rx_desc_pkt_len(pdesc);
0384     status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
0385         RX_DRV_INFO_SIZE_UNIT;
0386     status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
0387     status->icv = (u16)get_rx_desc_icv(pdesc);
0388     status->crc = (u16)get_rx_desc_crc32(pdesc);
0389     status->hwerror = (status->crc | status->icv);
0390     status->decrypted = !get_rx_desc_swdec(pdesc);
0391     status->rate = (u8)get_rx_desc_rxmcs(pdesc);
0392     status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
0393     status->isampdu = (bool) (get_rx_desc_paggr(pdesc) == 1);
0394     status->isfirst_ampdu = (bool)((get_rx_desc_paggr(pdesc) == 1) &&
0395                 (get_rx_desc_faggr(pdesc) == 1));
0396     if (status->packet_report_type == NORMAL_RX)
0397         status->timestamp_low = get_rx_desc_tsfl(pdesc);
0398     status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
0399     status->is_ht = (bool)get_rx_desc_rxht(pdesc);
0400 
0401     status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate);
0402 
0403     status->macid = get_rx_desc_macid(pdesc);
0404     if (get_rx_status_desc_pattern_match(pdesc))
0405         wake_match = BIT(2);
0406     else if (get_rx_status_desc_magic_match(pdesc))
0407         wake_match = BIT(1);
0408     else if (get_rx_status_desc_unicast_match(pdesc))
0409         wake_match = BIT(0);
0410     else
0411         wake_match = 0;
0412     if (wake_match)
0413         rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
0414             "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
0415             wake_match);
0416     rx_status->freq = hw->conf.chandef.chan->center_freq;
0417     rx_status->band = hw->conf.chandef.chan->band;
0418 
0419     hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
0420             + status->rx_bufshift);
0421 
0422     if (status->crc)
0423         rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
0424 
0425     if (status->rx_is40mhzpacket)
0426         rx_status->bw = RATE_INFO_BW_40;
0427 
0428     if (status->is_ht)
0429         rx_status->encoding = RX_ENC_HT;
0430 
0431     rx_status->flag |= RX_FLAG_MACTIME_START;
0432 
0433     /* hw will set status->decrypted true, if it finds the
0434      * frame is open data frame or mgmt frame.
0435      * So hw will not decryption robust managment frame
0436      * for IEEE80211w but still set status->decrypted
0437      * true, so here we should set it back to undecrypted
0438      * for IEEE80211w frame, and mac80211 sw will help
0439      * to decrypt it
0440      */
0441     if (status->decrypted) {
0442         if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
0443             (ieee80211_has_protected(hdr->frame_control)))
0444             rx_status->flag |= RX_FLAG_DECRYPTED;
0445         else
0446             rx_status->flag &= ~RX_FLAG_DECRYPTED;
0447     }
0448 
0449     /* rate_idx: index of data rate into band's
0450      * supported rates or MCS index if HT rates
0451      * are use (RX_FLAG_HT)
0452      * Notice: this is diff with windows define
0453      */
0454     rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
0455                            false, status->rate);
0456 
0457     rx_status->mactime = status->timestamp_low;
0458     if (phystatus == true) {
0459         p_drvinfo = (struct rx_fwinfo_88e *)(skb->data +
0460                              status->rx_bufshift);
0461 
0462         _rtl88ee_translate_rx_signal_stuff(hw,
0463                            skb, status, pdesc,
0464                            p_drvinfo);
0465     }
0466     rx_status->signal = status->recvsignalpower + 10;
0467     if (status->packet_report_type == TX_REPORT2) {
0468         status->macid_valid_entry[0] =
0469              get_rx_rpt2_desc_macid_valid_1(pdesc);
0470         status->macid_valid_entry[1] =
0471              get_rx_rpt2_desc_macid_valid_2(pdesc);
0472     }
0473     return true;
0474 }
0475 
0476 void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
0477               struct ieee80211_hdr *hdr, u8 *pdesc8,
0478               u8 *txbd, struct ieee80211_tx_info *info,
0479               struct ieee80211_sta *sta,
0480               struct sk_buff *skb,
0481               u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
0482 
0483 {
0484     struct rtl_priv *rtlpriv = rtl_priv(hw);
0485     struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
0486     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0487     struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
0488     u16 seq_number;
0489     __le16 fc = hdr->frame_control;
0490     unsigned int buf_len = 0;
0491     unsigned int skb_len = skb->len;
0492     u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue);
0493     bool firstseg = ((hdr->seq_ctrl &
0494                 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
0495     bool lastseg = ((hdr->frame_control &
0496                cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
0497     dma_addr_t mapping;
0498     u8 bw_40 = 0;
0499     u8 short_gi = 0;
0500     __le32 *pdesc = (__le32 *)pdesc8;
0501 
0502     if (mac->opmode == NL80211_IFTYPE_STATION) {
0503         bw_40 = mac->bw_40;
0504     } else if (mac->opmode == NL80211_IFTYPE_AP ||
0505         mac->opmode == NL80211_IFTYPE_ADHOC) {
0506         if (sta)
0507             bw_40 = sta->deflink.ht_cap.cap &
0508                 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
0509     }
0510     seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
0511     rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
0512     /* reserve 8 byte for AMPDU early mode */
0513     if (rtlhal->earlymode_enable) {
0514         skb_push(skb, EM_HDR_LEN);
0515         memset(skb->data, 0, EM_HDR_LEN);
0516     }
0517     buf_len = skb->len;
0518     mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
0519                  DMA_TO_DEVICE);
0520     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0521         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0522             "DMA mapping error\n");
0523         return;
0524     }
0525     clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_88e));
0526     if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
0527         firstseg = true;
0528         lastseg = true;
0529     }
0530     if (firstseg) {
0531         if (rtlhal->earlymode_enable) {
0532             set_tx_desc_pkt_offset(pdesc, 1);
0533             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
0534                        EM_HDR_LEN);
0535             if (ptcb_desc->empkt_num) {
0536                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0537                     "Insert 8 byte.pTcb->EMPktNum:%d\n",
0538                     ptcb_desc->empkt_num);
0539                 rtl88ee_insert_emcontent(ptcb_desc,
0540                              (__le32 *)(skb->data));
0541             }
0542         } else {
0543             set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0544         }
0545 
0546         ptcb_desc->use_driver_rate = true;
0547         set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
0548         if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
0549             short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
0550         else
0551             short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
0552 
0553         set_tx_desc_data_shortgi(pdesc, short_gi);
0554 
0555         if (info->flags & IEEE80211_TX_CTL_AMPDU) {
0556             set_tx_desc_agg_enable(pdesc, 1);
0557             set_tx_desc_max_agg_num(pdesc, 0x14);
0558         }
0559         set_tx_desc_seq(pdesc, seq_number);
0560         set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
0561                         !ptcb_desc->cts_enable) ? 1 : 0));
0562         set_tx_desc_hw_rts_enable(pdesc, 0);
0563         set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
0564         set_tx_desc_rts_stbc(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
0565 
0566         set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
0567         set_tx_desc_rts_bw(pdesc, 0);
0568         set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
0569         set_tx_desc_rts_short(pdesc,
0570             ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
0571             (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
0572             (ptcb_desc->rts_use_shortgi ? 1 : 0)));
0573 
0574         if (ptcb_desc->tx_enable_sw_calc_duration)
0575             set_tx_desc_nav_use_hdr(pdesc, 1);
0576 
0577         if (bw_40) {
0578             if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
0579                 set_tx_desc_data_bw(pdesc, 1);
0580                 set_tx_desc_tx_sub_carrier(pdesc, 3);
0581             } else {
0582                 set_tx_desc_data_bw(pdesc, 0);
0583                 set_tx_desc_tx_sub_carrier(pdesc,
0584                                mac->cur_40_prime_sc);
0585             }
0586         } else {
0587             set_tx_desc_data_bw(pdesc, 0);
0588             set_tx_desc_tx_sub_carrier(pdesc, 0);
0589         }
0590 
0591         set_tx_desc_linip(pdesc, 0);
0592         set_tx_desc_pkt_size(pdesc, (u16)skb_len);
0593         if (sta) {
0594             u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
0595             set_tx_desc_ampdu_density(pdesc, ampdu_density);
0596         }
0597         if (info->control.hw_key) {
0598             struct ieee80211_key_conf *keyconf;
0599 
0600             keyconf = info->control.hw_key;
0601             switch (keyconf->cipher) {
0602             case WLAN_CIPHER_SUITE_WEP40:
0603             case WLAN_CIPHER_SUITE_WEP104:
0604             case WLAN_CIPHER_SUITE_TKIP:
0605                 set_tx_desc_sec_type(pdesc, 0x1);
0606                 break;
0607             case WLAN_CIPHER_SUITE_CCMP:
0608                 set_tx_desc_sec_type(pdesc, 0x3);
0609                 break;
0610             default:
0611                 set_tx_desc_sec_type(pdesc, 0x0);
0612                 break;
0613 
0614             }
0615         }
0616 
0617         set_tx_desc_queue_sel(pdesc, fw_qsel);
0618         set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
0619         set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
0620         set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
0621                        1 : 0);
0622         set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
0623 
0624         /*set_tx_desc_pwr_status(pdesc, pwr_status);*/
0625         /* Set TxRate and RTSRate in TxDesc  */
0626         /* This prevent Tx initial rate of new-coming packets */
0627         /* from being overwritten by retried  packet rate.*/
0628         if (!ptcb_desc->use_driver_rate) {
0629             /*set_tx_desc_rts_rate(pdesc, 0x08); */
0630             /* set_tx_desc_tx_rate(pdesc, 0x0b); */
0631         }
0632         if (ieee80211_is_data_qos(fc)) {
0633             if (mac->rdg_en) {
0634                 rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0635                     "Enable RDG function.\n");
0636                 set_tx_desc_rdg_enable(pdesc, 1);
0637                 set_tx_desc_htc(pdesc, 1);
0638             }
0639         }
0640     }
0641 
0642     set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
0643     set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
0644     set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);
0645     set_tx_desc_tx_buffer_address(pdesc, mapping);
0646     if (rtlpriv->dm.useramask) {
0647         set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
0648         set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
0649     } else {
0650         set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
0651         set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
0652     }
0653     if (ieee80211_is_data_qos(fc))
0654         set_tx_desc_qos(pdesc, 1);
0655 
0656     if (!ieee80211_is_data_qos(fc))
0657         set_tx_desc_hwseq_en(pdesc, 1);
0658     set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
0659     if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
0660         is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
0661         set_tx_desc_bmc(pdesc, 1);
0662     }
0663 
0664     rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc8, ptcb_desc->mac_id);
0665     rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
0666 }
0667 
0668 void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
0669                  u8 *pdesc8, bool firstseg,
0670                  bool lastseg, struct sk_buff *skb)
0671 {
0672     struct rtl_priv *rtlpriv = rtl_priv(hw);
0673     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0674     u8 fw_queue = QSLT_BEACON;
0675     __le32 *pdesc = (__le32 *)pdesc8;
0676 
0677     struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
0678     __le16 fc = hdr->frame_control;
0679 
0680     dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
0681                         skb->len, DMA_TO_DEVICE);
0682 
0683     if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
0684         rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
0685             "DMA mapping error\n");
0686         return;
0687     }
0688     clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
0689 
0690     if (firstseg)
0691         set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
0692 
0693     set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
0694 
0695     set_tx_desc_seq(pdesc, 0);
0696 
0697     set_tx_desc_linip(pdesc, 0);
0698 
0699     set_tx_desc_queue_sel(pdesc, fw_queue);
0700 
0701     set_tx_desc_first_seg(pdesc, 1);
0702     set_tx_desc_last_seg(pdesc, 1);
0703 
0704     set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
0705 
0706     set_tx_desc_tx_buffer_address(pdesc, mapping);
0707 
0708     set_tx_desc_rate_id(pdesc, 7);
0709     set_tx_desc_macid(pdesc, 0);
0710 
0711     set_tx_desc_own(pdesc, 1);
0712 
0713     set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
0714 
0715     set_tx_desc_first_seg(pdesc, 1);
0716     set_tx_desc_last_seg(pdesc, 1);
0717 
0718     set_tx_desc_offset(pdesc, 0x20);
0719 
0720     set_tx_desc_use_rate(pdesc, 1);
0721 
0722     if (!ieee80211_is_data_qos(fc))
0723         set_tx_desc_hwseq_en(pdesc, 1);
0724 
0725     RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
0726               "H2C Tx Cmd Content\n",
0727               pdesc, TX_DESC_SIZE);
0728 }
0729 
0730 void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
0731               bool istx, u8 desc_name, u8 *val)
0732 {
0733     __le32 *pdesc = (__le32 *)pdesc8;
0734 
0735     if (istx) {
0736         switch (desc_name) {
0737         case HW_DESC_OWN:
0738             set_tx_desc_own(pdesc, 1);
0739             break;
0740         case HW_DESC_TX_NEXTDESC_ADDR:
0741             set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
0742             break;
0743         default:
0744             WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
0745                   desc_name);
0746             break;
0747         }
0748     } else {
0749         switch (desc_name) {
0750         case HW_DESC_RXOWN:
0751             set_rx_desc_own(pdesc, 1);
0752             break;
0753         case HW_DESC_RXBUFF_ADDR:
0754             set_rx_desc_buff_addr(pdesc, *(u32 *)val);
0755             break;
0756         case HW_DESC_RXPKT_LEN:
0757             set_rx_desc_pkt_len(pdesc, *(u32 *)val);
0758             break;
0759         case HW_DESC_RXERO:
0760             set_rx_desc_eor(pdesc, 1);
0761             break;
0762         default:
0763             WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
0764                   desc_name);
0765             break;
0766         }
0767     }
0768 }
0769 
0770 u64 rtl88ee_get_desc(struct ieee80211_hw *hw,
0771              u8 *pdesc8, bool istx, u8 desc_name)
0772 {
0773     u32 ret = 0;
0774     __le32 *pdesc = (__le32 *)pdesc8;
0775 
0776     if (istx) {
0777         switch (desc_name) {
0778         case HW_DESC_OWN:
0779             ret = get_tx_desc_own(pdesc);
0780             break;
0781         case HW_DESC_TXBUFF_ADDR:
0782             ret = get_tx_desc_tx_buffer_address(pdesc);
0783             break;
0784         default:
0785             WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
0786                   desc_name);
0787             break;
0788         }
0789     } else {
0790         switch (desc_name) {
0791         case HW_DESC_OWN:
0792             ret = get_rx_desc_own(pdesc);
0793             break;
0794         case HW_DESC_RXPKT_LEN:
0795             ret = get_rx_desc_pkt_len(pdesc);
0796             break;
0797         case HW_DESC_RXBUFF_ADDR:
0798             ret = get_rx_desc_buff_addr(pdesc);
0799             break;
0800         default:
0801             WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
0802                   desc_name);
0803             break;
0804         }
0805     }
0806     return ret;
0807 }
0808 
0809 bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
0810 {
0811     struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
0812     struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
0813     u8 *entry = (u8 *)(&ring->desc[ring->idx]);
0814     u8 own = (u8)rtl88ee_get_desc(hw, entry, true, HW_DESC_OWN);
0815 
0816     /*beacon packet will only use the first
0817      *descriptor defautly,and the own may not
0818      *be cleared by the hardware
0819      */
0820     if (own)
0821         return false;
0822     return true;
0823 }
0824 
0825 void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
0826 {
0827     struct rtl_priv *rtlpriv = rtl_priv(hw);
0828     if (hw_queue == BEACON_QUEUE) {
0829         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
0830     } else {
0831         rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
0832                    BIT(0) << (hw_queue));
0833     }
0834 }
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