rtlwifi/rtl8188ee/def.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright(c) 2009-2013  Realtek Corporation.*/
0003
0004 #ifndef __RTL92C_DEF_H__
0005 #define __RTL92C_DEF_H__
0006
0007 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE         0
0008 #define HAL_PRIME_CHNL_OFFSET_LOWER         1
0009 #define HAL_PRIME_CHNL_OFFSET_UPPER         2
0010
0011 #define RX_MPDU_QUEUE                   0
0012 #define RX_CMD_QUEUE                    1
0013
0014 #define C2H_RX_CMD_HDR_LEN              8
0015
0016 #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
0017
0018 /* [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3
0019  * [7] Manufacturer: TSMC=0, UMC=1
0020  * [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2
0021  * [3] Chip type: TEST=0, NORMAL=1
0022  * [2:0] IC type: 81xxC=0, 8723=1, 92D=2
0023  */
0024 #define CHIP_8723           BIT(0)
0025 #define CHIP_92D            BIT(1)
0026 #define NORMAL_CHIP         BIT(3)
0027 #define RF_TYPE_1T1R            (~(BIT(4)|BIT(5)|BIT(6)))
0028 #define RF_TYPE_1T2R            BIT(4)
0029 #define RF_TYPE_2T2R            BIT(5)
0030 #define CHIP_VENDOR_UMC         BIT(7)
0031 #define B_CUT_VERSION           BIT(12)
0032 #define C_CUT_VERSION           BIT(13)
0033 #define D_CUT_VERSION           ((BIT(12)|BIT(13)))
0034 #define E_CUT_VERSION           BIT(14)
0035
0036 /* MASK */
0037 #define IC_TYPE_MASK            (BIT(0)|BIT(1)|BIT(2))
0038 #define CHIP_TYPE_MASK          BIT(3)
0039 #define RF_TYPE_MASK            (BIT(4)|BIT(5)|BIT(6))
0040 #define MANUFACTUER_MASK        BIT(7)
0041 #define ROM_VERSION_MASK        (BIT(11)|BIT(10)|BIT(9)|BIT(8))
0042 #define CUT_VERSION_MASK        (BIT(15)|BIT(14)|BIT(13)|BIT(12))
0043
0044 /* Get element */
0045 #define GET_CVID_IC_TYPE(version)   ((version) & IC_TYPE_MASK)
0046 #define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK)
0047 #define GET_CVID_RF_TYPE(version)   ((version) & RF_TYPE_MASK)
0048 #define GET_CVID_MANUFACTUER(version)   ((version) & MANUFACTUER_MASK)
0049 #define GET_CVID_ROM_VERSION(version)   ((version) & ROM_VERSION_MASK)
0050 #define GET_CVID_CUT_VERSION(version)   ((version) & CUT_VERSION_MASK)
0051
0052 #define IS_81XXC(version)                       \
0053     ((GET_CVID_IC_TYPE(version) == 0) ? true : false)
0054 #define IS_8723_SERIES(version)                     \
0055     ((GET_CVID_IC_TYPE(version) == CHIP_8723) ? true : false)
0056 #define IS_92D(version)                         \
0057     ((GET_CVID_IC_TYPE(version) == CHIP_92D) ? true : false)
0058
0059 #define IS_NORMAL_CHIP(version)                     \
0060     ((GET_CVID_CHIP_TYPE(version)) ? true : false)
0061 #define IS_NORMAL_CHIP92D(version)                  \
0062     ((GET_CVID_CHIP_TYPE(version)) ? true : false)
0063
0064 #define IS_1T1R(version)                        \
0065     ((GET_CVID_RF_TYPE(version)) ? false : true)
0066 #define IS_1T2R(version)                        \
0067     ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
0068 #define IS_2T2R(version)                        \
0069     ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
0070 #define IS_CHIP_VENDOR_UMC(version)                 \
0071     ((GET_CVID_MANUFACTUER(version)) ? true : false)
0072
0073 #define IS_92C_SERIAL(version)                      \
0074     ((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
0075 #define IS_81XXC_VENDOR_UMC_B_CUT(version)              \
0076     (IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ?     \
0077     ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true    \
0078     : false) : false) : false)
0079
0080 enum version_8188e {
0081     VERSION_TEST_CHIP_88E = 0x00,
0082     VERSION_NORMAL_CHIP_88E = 0x01,
0083     VERSION_UNKNOWN = 0xFF,
0084 };
0085
0086 enum rtl819x_loopback_e {
0087     RTL819X_NO_LOOPBACK = 0,
0088     RTL819X_MAC_LOOPBACK = 1,
0089     RTL819X_DMA_LOOPBACK = 2,
0090     RTL819X_CCK_LOOPBACK = 3,
0091 };
0092
0093 enum rf_optype {
0094     RF_OP_BY_SW_3WIRE = 0,
0095     RF_OP_BY_FW,
0096     RF_OP_MAX
0097 };
0098
0099 enum rf_power_state {
0100     RF_ON,
0101     RF_OFF,
0102     RF_SLEEP,
0103     RF_SHUT_DOWN,
0104 };
0105
0106 enum power_save_mode {
0107     POWER_SAVE_MODE_ACTIVE,
0108     POWER_SAVE_MODE_SAVE,
0109 };
0110
0111 enum power_polocy_config {
0112     POWERCFG_MAX_POWER_SAVINGS,
0113     POWERCFG_GLOBAL_POWER_SAVINGS,
0114     POWERCFG_LOCAL_POWER_SAVINGS,
0115     POWERCFG_LENOVO,
0116 };
0117
0118 enum interface_select_pci {
0119     INTF_SEL1_MINICARD = 0,
0120     INTF_SEL0_PCIE = 1,
0121     INTF_SEL2_RSV = 2,
0122     INTF_SEL3_RSV = 3,
0123 };
0124
0125 enum rtl_desc_qsel {
0126     QSLT_BK = 0x2,
0127     QSLT_BE = 0x0,
0128     QSLT_VI = 0x5,
0129     QSLT_VO = 0x7,
0130     QSLT_BEACON = 0x10,
0131     QSLT_HIGH = 0x11,
0132     QSLT_MGNT = 0x12,
0133     QSLT_CMD = 0x13,
0134 };
0135
0136 enum rtl_desc92c_rate {
0137     DESC92C_RATE1M = 0x00,
0138     DESC92C_RATE2M = 0x01,
0139     DESC92C_RATE5_5M = 0x02,
0140     DESC92C_RATE11M = 0x03,
0141
0142     DESC92C_RATE6M = 0x04,
0143     DESC92C_RATE9M = 0x05,
0144     DESC92C_RATE12M = 0x06,
0145     DESC92C_RATE18M = 0x07,
0146     DESC92C_RATE24M = 0x08,
0147     DESC92C_RATE36M = 0x09,
0148     DESC92C_RATE48M = 0x0a,
0149     DESC92C_RATE54M = 0x0b,
0150
0151     DESC92C_RATEMCS0 = 0x0c,
0152     DESC92C_RATEMCS1 = 0x0d,
0153     DESC92C_RATEMCS2 = 0x0e,
0154     DESC92C_RATEMCS3 = 0x0f,
0155     DESC92C_RATEMCS4 = 0x10,
0156     DESC92C_RATEMCS5 = 0x11,
0157     DESC92C_RATEMCS6 = 0x12,
0158     DESC92C_RATEMCS7 = 0x13,
0159     DESC92C_RATEMCS8 = 0x14,
0160     DESC92C_RATEMCS9 = 0x15,
0161     DESC92C_RATEMCS10 = 0x16,
0162     DESC92C_RATEMCS11 = 0x17,
0163     DESC92C_RATEMCS12 = 0x18,
0164     DESC92C_RATEMCS13 = 0x19,
0165     DESC92C_RATEMCS14 = 0x1a,
0166     DESC92C_RATEMCS15 = 0x1b,
0167     DESC92C_RATEMCS15_SG = 0x1c,
0168     DESC92C_RATEMCS32 = 0x20,
0169 };
0170
0171 struct phy_sts_cck_8192s_t {
0172     u8 adc_pwdb_X[4];
0173     u8 sq_rpt;
0174     u8 cck_agc_rpt;
0175 };
0176
0177 struct h2c_cmd_8192c {
0178     u8 element_id;
0179     u32 cmd_len;
0180     u8 *p_cmdbuffer;
0181 };
0182
0183 #endif