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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * RTL8XXXU mac80211 USB driver - 8188c/8188r/8192c specific subdriver
0004  *
0005  * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com>
0006  *
0007  * Portions, notably calibration code:
0008  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
0009  *
0010  * This driver was written as a replacement for the vendor provided
0011  * rtl8723au driver. As the Realtek 8xxx chips are very similar in
0012  * their programming interface, I have started adding support for
0013  * additional 8xxx chips like the 8192cu, 8188cus, etc.
0014  */
0015 
0016 #include <linux/init.h>
0017 #include <linux/kernel.h>
0018 #include <linux/sched.h>
0019 #include <linux/errno.h>
0020 #include <linux/slab.h>
0021 #include <linux/module.h>
0022 #include <linux/spinlock.h>
0023 #include <linux/list.h>
0024 #include <linux/usb.h>
0025 #include <linux/netdevice.h>
0026 #include <linux/etherdevice.h>
0027 #include <linux/ethtool.h>
0028 #include <linux/wireless.h>
0029 #include <linux/firmware.h>
0030 #include <linux/moduleparam.h>
0031 #include <net/mac80211.h>
0032 #include "rtl8xxxu.h"
0033 #include "rtl8xxxu_regs.h"
0034 
0035 #ifdef CONFIG_RTL8XXXU_UNTESTED
0036 static struct rtl8xxxu_power_base rtl8192c_power_base = {
0037     .reg_0e00 = 0x07090c0c,
0038     .reg_0e04 = 0x01020405,
0039     .reg_0e08 = 0x00000000,
0040     .reg_086c = 0x00000000,
0041 
0042     .reg_0e10 = 0x0b0c0c0e,
0043     .reg_0e14 = 0x01030506,
0044     .reg_0e18 = 0x0b0c0d0e,
0045     .reg_0e1c = 0x01030509,
0046 
0047     .reg_0830 = 0x07090c0c,
0048     .reg_0834 = 0x01020405,
0049     .reg_0838 = 0x00000000,
0050     .reg_086c_2 = 0x00000000,
0051 
0052     .reg_083c = 0x0b0c0d0e,
0053     .reg_0848 = 0x01030509,
0054     .reg_084c = 0x0b0c0d0e,
0055     .reg_0868 = 0x01030509,
0056 };
0057 
0058 static struct rtl8xxxu_power_base rtl8188r_power_base = {
0059     .reg_0e00 = 0x06080808,
0060     .reg_0e04 = 0x00040406,
0061     .reg_0e08 = 0x00000000,
0062     .reg_086c = 0x00000000,
0063 
0064     .reg_0e10 = 0x04060608,
0065     .reg_0e14 = 0x00020204,
0066     .reg_0e18 = 0x04060608,
0067     .reg_0e1c = 0x00020204,
0068 
0069     .reg_0830 = 0x06080808,
0070     .reg_0834 = 0x00040406,
0071     .reg_0838 = 0x00000000,
0072     .reg_086c_2 = 0x00000000,
0073 
0074     .reg_083c = 0x04060608,
0075     .reg_0848 = 0x00020204,
0076     .reg_084c = 0x04060608,
0077     .reg_0868 = 0x00020204,
0078 };
0079 
0080 static struct rtl8xxxu_rfregval rtl8192cu_radioa_2t_init_table[] = {
0081     {0x00, 0x00030159}, {0x01, 0x00031284},
0082     {0x02, 0x00098000}, {0x03, 0x00018c63},
0083     {0x04, 0x000210e7}, {0x09, 0x0002044f},
0084     {0x0a, 0x0001adb1}, {0x0b, 0x00054867},
0085     {0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
0086     {0x0e, 0x00039ce7}, {0x0f, 0x00000451},
0087     {0x19, 0x00000000}, {0x1a, 0x00010255},
0088     {0x1b, 0x00060a00}, {0x1c, 0x000fc378},
0089     {0x1d, 0x000a1250}, {0x1e, 0x0004445f},
0090     {0x1f, 0x00080001}, {0x20, 0x0000b614},
0091     {0x21, 0x0006c000}, {0x22, 0x00000000},
0092     {0x23, 0x00001558}, {0x24, 0x00000060},
0093     {0x25, 0x00000483}, {0x26, 0x0004f000},
0094     {0x27, 0x000ec7d9}, {0x28, 0x000577c0},
0095     {0x29, 0x00004783}, {0x2a, 0x00000001},
0096     {0x2b, 0x00021334}, {0x2a, 0x00000000},
0097     {0x2b, 0x00000054}, {0x2a, 0x00000001},
0098     {0x2b, 0x00000808}, {0x2b, 0x00053333},
0099     {0x2c, 0x0000000c}, {0x2a, 0x00000002},
0100     {0x2b, 0x00000808}, {0x2b, 0x0005b333},
0101     {0x2c, 0x0000000d}, {0x2a, 0x00000003},
0102     {0x2b, 0x00000808}, {0x2b, 0x00063333},
0103     {0x2c, 0x0000000d}, {0x2a, 0x00000004},
0104     {0x2b, 0x00000808}, {0x2b, 0x0006b333},
0105     {0x2c, 0x0000000d}, {0x2a, 0x00000005},
0106     {0x2b, 0x00000808}, {0x2b, 0x00073333},
0107     {0x2c, 0x0000000d}, {0x2a, 0x00000006},
0108     {0x2b, 0x00000709}, {0x2b, 0x0005b333},
0109     {0x2c, 0x0000000d}, {0x2a, 0x00000007},
0110     {0x2b, 0x00000709}, {0x2b, 0x00063333},
0111     {0x2c, 0x0000000d}, {0x2a, 0x00000008},
0112     {0x2b, 0x0000060a}, {0x2b, 0x0004b333},
0113     {0x2c, 0x0000000d}, {0x2a, 0x00000009},
0114     {0x2b, 0x0000060a}, {0x2b, 0x00053333},
0115     {0x2c, 0x0000000d}, {0x2a, 0x0000000a},
0116     {0x2b, 0x0000060a}, {0x2b, 0x0005b333},
0117     {0x2c, 0x0000000d}, {0x2a, 0x0000000b},
0118     {0x2b, 0x0000060a}, {0x2b, 0x00063333},
0119     {0x2c, 0x0000000d}, {0x2a, 0x0000000c},
0120     {0x2b, 0x0000060a}, {0x2b, 0x0006b333},
0121     {0x2c, 0x0000000d}, {0x2a, 0x0000000d},
0122     {0x2b, 0x0000060a}, {0x2b, 0x00073333},
0123     {0x2c, 0x0000000d}, {0x2a, 0x0000000e},
0124     {0x2b, 0x0000050b}, {0x2b, 0x00066666},
0125     {0x2c, 0x0000001a}, {0x2a, 0x000e0000},
0126     {0x10, 0x0004000f}, {0x11, 0x000e31fc},
0127     {0x10, 0x0006000f}, {0x11, 0x000ff9f8},
0128     {0x10, 0x0002000f}, {0x11, 0x000203f9},
0129     {0x10, 0x0003000f}, {0x11, 0x000ff500},
0130     {0x10, 0x00000000}, {0x11, 0x00000000},
0131     {0x10, 0x0008000f}, {0x11, 0x0003f100},
0132     {0x10, 0x0009000f}, {0x11, 0x00023100},
0133     {0x12, 0x00032000}, {0x12, 0x00071000},
0134     {0x12, 0x000b0000}, {0x12, 0x000fc000},
0135     {0x13, 0x000287b3}, {0x13, 0x000244b7},
0136     {0x13, 0x000204ab}, {0x13, 0x0001c49f},
0137     {0x13, 0x00018493}, {0x13, 0x0001429b},
0138     {0x13, 0x00010299}, {0x13, 0x0000c29c},
0139     {0x13, 0x000081a0}, {0x13, 0x000040ac},
0140     {0x13, 0x00000020}, {0x14, 0x0001944c},
0141     {0x14, 0x00059444}, {0x14, 0x0009944c},
0142     {0x14, 0x000d9444}, {0x15, 0x0000f424},
0143     {0x15, 0x0004f424}, {0x15, 0x0008f424},
0144     {0x15, 0x000cf424}, {0x16, 0x000e0330},
0145     {0x16, 0x000a0330}, {0x16, 0x00060330},
0146     {0x16, 0x00020330}, {0x00, 0x00010159},
0147     {0x18, 0x0000f401}, {0xfe, 0x00000000},
0148     {0xfe, 0x00000000}, {0x1f, 0x00080003},
0149     {0xfe, 0x00000000}, {0xfe, 0x00000000},
0150     {0x1e, 0x00044457}, {0x1f, 0x00080000},
0151     {0x00, 0x00030159},
0152     {0xff, 0xffffffff}
0153 };
0154 
0155 static struct rtl8xxxu_rfregval rtl8192cu_radiob_2t_init_table[] = {
0156     {0x00, 0x00030159}, {0x01, 0x00031284},
0157     {0x02, 0x00098000}, {0x03, 0x00018c63},
0158     {0x04, 0x000210e7}, {0x09, 0x0002044f},
0159     {0x0a, 0x0001adb1}, {0x0b, 0x00054867},
0160     {0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
0161     {0x0e, 0x00039ce7}, {0x0f, 0x00000451},
0162     {0x12, 0x00032000}, {0x12, 0x00071000},
0163     {0x12, 0x000b0000}, {0x12, 0x000fc000},
0164     {0x13, 0x000287af}, {0x13, 0x000244b7},
0165     {0x13, 0x000204ab}, {0x13, 0x0001c49f},
0166     {0x13, 0x00018493}, {0x13, 0x00014297},
0167     {0x13, 0x00010295}, {0x13, 0x0000c298},
0168     {0x13, 0x0000819c}, {0x13, 0x000040a8},
0169     {0x13, 0x0000001c}, {0x14, 0x0001944c},
0170     {0x14, 0x00059444}, {0x14, 0x0009944c},
0171     {0x14, 0x000d9444}, {0x15, 0x0000f424},
0172     {0x15, 0x0004f424}, {0x15, 0x0008f424},
0173     {0x15, 0x000cf424}, {0x16, 0x000e0330},
0174     {0x16, 0x000a0330}, {0x16, 0x00060330},
0175     {0x16, 0x00020330},
0176     {0xff, 0xffffffff}
0177 };
0178 
0179 static struct rtl8xxxu_rfregval rtl8192cu_radioa_1t_init_table[] = {
0180     {0x00, 0x00030159}, {0x01, 0x00031284},
0181     {0x02, 0x00098000}, {0x03, 0x00018c63},
0182     {0x04, 0x000210e7}, {0x09, 0x0002044f},
0183     {0x0a, 0x0001adb1}, {0x0b, 0x00054867},
0184     {0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
0185     {0x0e, 0x00039ce7}, {0x0f, 0x00000451},
0186     {0x19, 0x00000000}, {0x1a, 0x00010255},
0187     {0x1b, 0x00060a00}, {0x1c, 0x000fc378},
0188     {0x1d, 0x000a1250}, {0x1e, 0x0004445f},
0189     {0x1f, 0x00080001}, {0x20, 0x0000b614},
0190     {0x21, 0x0006c000}, {0x22, 0x00000000},
0191     {0x23, 0x00001558}, {0x24, 0x00000060},
0192     {0x25, 0x00000483}, {0x26, 0x0004f000},
0193     {0x27, 0x000ec7d9}, {0x28, 0x000577c0},
0194     {0x29, 0x00004783}, {0x2a, 0x00000001},
0195     {0x2b, 0x00021334}, {0x2a, 0x00000000},
0196     {0x2b, 0x00000054}, {0x2a, 0x00000001},
0197     {0x2b, 0x00000808}, {0x2b, 0x00053333},
0198     {0x2c, 0x0000000c}, {0x2a, 0x00000002},
0199     {0x2b, 0x00000808}, {0x2b, 0x0005b333},
0200     {0x2c, 0x0000000d}, {0x2a, 0x00000003},
0201     {0x2b, 0x00000808}, {0x2b, 0x00063333},
0202     {0x2c, 0x0000000d}, {0x2a, 0x00000004},
0203     {0x2b, 0x00000808}, {0x2b, 0x0006b333},
0204     {0x2c, 0x0000000d}, {0x2a, 0x00000005},
0205     {0x2b, 0x00000808}, {0x2b, 0x00073333},
0206     {0x2c, 0x0000000d}, {0x2a, 0x00000006},
0207     {0x2b, 0x00000709}, {0x2b, 0x0005b333},
0208     {0x2c, 0x0000000d}, {0x2a, 0x00000007},
0209     {0x2b, 0x00000709}, {0x2b, 0x00063333},
0210     {0x2c, 0x0000000d}, {0x2a, 0x00000008},
0211     {0x2b, 0x0000060a}, {0x2b, 0x0004b333},
0212     {0x2c, 0x0000000d}, {0x2a, 0x00000009},
0213     {0x2b, 0x0000060a}, {0x2b, 0x00053333},
0214     {0x2c, 0x0000000d}, {0x2a, 0x0000000a},
0215     {0x2b, 0x0000060a}, {0x2b, 0x0005b333},
0216     {0x2c, 0x0000000d}, {0x2a, 0x0000000b},
0217     {0x2b, 0x0000060a}, {0x2b, 0x00063333},
0218     {0x2c, 0x0000000d}, {0x2a, 0x0000000c},
0219     {0x2b, 0x0000060a}, {0x2b, 0x0006b333},
0220     {0x2c, 0x0000000d}, {0x2a, 0x0000000d},
0221     {0x2b, 0x0000060a}, {0x2b, 0x00073333},
0222     {0x2c, 0x0000000d}, {0x2a, 0x0000000e},
0223     {0x2b, 0x0000050b}, {0x2b, 0x00066666},
0224     {0x2c, 0x0000001a}, {0x2a, 0x000e0000},
0225     {0x10, 0x0004000f}, {0x11, 0x000e31fc},
0226     {0x10, 0x0006000f}, {0x11, 0x000ff9f8},
0227     {0x10, 0x0002000f}, {0x11, 0x000203f9},
0228     {0x10, 0x0003000f}, {0x11, 0x000ff500},
0229     {0x10, 0x00000000}, {0x11, 0x00000000},
0230     {0x10, 0x0008000f}, {0x11, 0x0003f100},
0231     {0x10, 0x0009000f}, {0x11, 0x00023100},
0232     {0x12, 0x00032000}, {0x12, 0x00071000},
0233     {0x12, 0x000b0000}, {0x12, 0x000fc000},
0234     {0x13, 0x000287b3}, {0x13, 0x000244b7},
0235     {0x13, 0x000204ab}, {0x13, 0x0001c49f},
0236     {0x13, 0x00018493}, {0x13, 0x0001429b},
0237     {0x13, 0x00010299}, {0x13, 0x0000c29c},
0238     {0x13, 0x000081a0}, {0x13, 0x000040ac},
0239     {0x13, 0x00000020}, {0x14, 0x0001944c},
0240     {0x14, 0x00059444}, {0x14, 0x0009944c},
0241     {0x14, 0x000d9444}, {0x15, 0x0000f405},
0242     {0x15, 0x0004f405}, {0x15, 0x0008f405},
0243     {0x15, 0x000cf405}, {0x16, 0x000e0330},
0244     {0x16, 0x000a0330}, {0x16, 0x00060330},
0245     {0x16, 0x00020330}, {0x00, 0x00010159},
0246     {0x18, 0x0000f401}, {0xfe, 0x00000000},
0247     {0xfe, 0x00000000}, {0x1f, 0x00080003},
0248     {0xfe, 0x00000000}, {0xfe, 0x00000000},
0249     {0x1e, 0x00044457}, {0x1f, 0x00080000},
0250     {0x00, 0x00030159},
0251     {0xff, 0xffffffff}
0252 };
0253 
0254 static struct rtl8xxxu_rfregval rtl8188ru_radioa_1t_highpa_table[] = {
0255     {0x00, 0x00030159}, {0x01, 0x00031284},
0256     {0x02, 0x00098000}, {0x03, 0x00018c63},
0257     {0x04, 0x000210e7}, {0x09, 0x0002044f},
0258     {0x0a, 0x0001adb0}, {0x0b, 0x00054867},
0259     {0x0c, 0x0008992e}, {0x0d, 0x0000e529},
0260     {0x0e, 0x00039ce7}, {0x0f, 0x00000451},
0261     {0x19, 0x00000000}, {0x1a, 0x00000255},
0262     {0x1b, 0x00060a00}, {0x1c, 0x000fc378},
0263     {0x1d, 0x000a1250}, {0x1e, 0x0004445f},
0264     {0x1f, 0x00080001}, {0x20, 0x0000b614},
0265     {0x21, 0x0006c000}, {0x22, 0x0000083c},
0266     {0x23, 0x00001558}, {0x24, 0x00000060},
0267     {0x25, 0x00000483}, {0x26, 0x0004f000},
0268     {0x27, 0x000ec7d9}, {0x28, 0x000977c0},
0269     {0x29, 0x00004783}, {0x2a, 0x00000001},
0270     {0x2b, 0x00021334}, {0x2a, 0x00000000},
0271     {0x2b, 0x00000054}, {0x2a, 0x00000001},
0272     {0x2b, 0x00000808}, {0x2b, 0x00053333},
0273     {0x2c, 0x0000000c}, {0x2a, 0x00000002},
0274     {0x2b, 0x00000808}, {0x2b, 0x0005b333},
0275     {0x2c, 0x0000000d}, {0x2a, 0x00000003},
0276     {0x2b, 0x00000808}, {0x2b, 0x00063333},
0277     {0x2c, 0x0000000d}, {0x2a, 0x00000004},
0278     {0x2b, 0x00000808}, {0x2b, 0x0006b333},
0279     {0x2c, 0x0000000d}, {0x2a, 0x00000005},
0280     {0x2b, 0x00000808}, {0x2b, 0x00073333},
0281     {0x2c, 0x0000000d}, {0x2a, 0x00000006},
0282     {0x2b, 0x00000709}, {0x2b, 0x0005b333},
0283     {0x2c, 0x0000000d}, {0x2a, 0x00000007},
0284     {0x2b, 0x00000709}, {0x2b, 0x00063333},
0285     {0x2c, 0x0000000d}, {0x2a, 0x00000008},
0286     {0x2b, 0x0000060a}, {0x2b, 0x0004b333},
0287     {0x2c, 0x0000000d}, {0x2a, 0x00000009},
0288     {0x2b, 0x0000060a}, {0x2b, 0x00053333},
0289     {0x2c, 0x0000000d}, {0x2a, 0x0000000a},
0290     {0x2b, 0x0000060a}, {0x2b, 0x0005b333},
0291     {0x2c, 0x0000000d}, {0x2a, 0x0000000b},
0292     {0x2b, 0x0000060a}, {0x2b, 0x00063333},
0293     {0x2c, 0x0000000d}, {0x2a, 0x0000000c},
0294     {0x2b, 0x0000060a}, {0x2b, 0x0006b333},
0295     {0x2c, 0x0000000d}, {0x2a, 0x0000000d},
0296     {0x2b, 0x0000060a}, {0x2b, 0x00073333},
0297     {0x2c, 0x0000000d}, {0x2a, 0x0000000e},
0298     {0x2b, 0x0000050b}, {0x2b, 0x00066666},
0299     {0x2c, 0x0000001a}, {0x2a, 0x000e0000},
0300     {0x10, 0x0004000f}, {0x11, 0x000e31fc},
0301     {0x10, 0x0006000f}, {0x11, 0x000ff9f8},
0302     {0x10, 0x0002000f}, {0x11, 0x000203f9},
0303     {0x10, 0x0003000f}, {0x11, 0x000ff500},
0304     {0x10, 0x00000000}, {0x11, 0x00000000},
0305     {0x10, 0x0008000f}, {0x11, 0x0003f100},
0306     {0x10, 0x0009000f}, {0x11, 0x00023100},
0307     {0x12, 0x000d8000}, {0x12, 0x00090000},
0308     {0x12, 0x00051000}, {0x12, 0x00012000},
0309     {0x13, 0x00028fb4}, {0x13, 0x00024fa8},
0310     {0x13, 0x000207a4}, {0x13, 0x0001c3b0},
0311     {0x13, 0x000183a4}, {0x13, 0x00014398},
0312     {0x13, 0x000101a4}, {0x13, 0x0000c198},
0313     {0x13, 0x000080a4}, {0x13, 0x00004098},
0314     {0x13, 0x00000000}, {0x14, 0x0001944c},
0315     {0x14, 0x00059444}, {0x14, 0x0009944c},
0316     {0x14, 0x000d9444}, {0x15, 0x0000f405},
0317     {0x15, 0x0004f405}, {0x15, 0x0008f405},
0318     {0x15, 0x000cf405}, {0x16, 0x000e0330},
0319     {0x16, 0x000a0330}, {0x16, 0x00060330},
0320     {0x16, 0x00020330}, {0x00, 0x00010159},
0321     {0x18, 0x0000f401}, {0xfe, 0x00000000},
0322     {0xfe, 0x00000000}, {0x1f, 0x00080003},
0323     {0xfe, 0x00000000}, {0xfe, 0x00000000},
0324     {0x1e, 0x00044457}, {0x1f, 0x00080000},
0325     {0x00, 0x00030159},
0326     {0xff, 0xffffffff}
0327 };
0328 
0329 static int rtl8192cu_load_firmware(struct rtl8xxxu_priv *priv)
0330 {
0331     char *fw_name;
0332     int ret;
0333 
0334     if (!priv->vendor_umc)
0335         fw_name = "rtlwifi/rtl8192cufw_TMSC.bin";
0336     else if (priv->chip_cut || priv->rtl_chip == RTL8192C)
0337         fw_name = "rtlwifi/rtl8192cufw_B.bin";
0338     else
0339         fw_name = "rtlwifi/rtl8192cufw_A.bin";
0340 
0341     ret = rtl8xxxu_load_firmware(priv, fw_name);
0342 
0343     return ret;
0344 }
0345 
0346 static int rtl8192cu_parse_efuse(struct rtl8xxxu_priv *priv)
0347 {
0348     struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192;
0349     int i;
0350 
0351     if (efuse->rtl_id != cpu_to_le16(0x8129))
0352         return -EINVAL;
0353 
0354     ether_addr_copy(priv->mac_addr, efuse->mac_addr);
0355 
0356     memcpy(priv->cck_tx_power_index_A,
0357            efuse->cck_tx_power_index_A,
0358            sizeof(efuse->cck_tx_power_index_A));
0359     memcpy(priv->cck_tx_power_index_B,
0360            efuse->cck_tx_power_index_B,
0361            sizeof(efuse->cck_tx_power_index_B));
0362 
0363     memcpy(priv->ht40_1s_tx_power_index_A,
0364            efuse->ht40_1s_tx_power_index_A,
0365            sizeof(efuse->ht40_1s_tx_power_index_A));
0366     memcpy(priv->ht40_1s_tx_power_index_B,
0367            efuse->ht40_1s_tx_power_index_B,
0368            sizeof(efuse->ht40_1s_tx_power_index_B));
0369     memcpy(priv->ht40_2s_tx_power_index_diff,
0370            efuse->ht40_2s_tx_power_index_diff,
0371            sizeof(efuse->ht40_2s_tx_power_index_diff));
0372 
0373     memcpy(priv->ht20_tx_power_index_diff,
0374            efuse->ht20_tx_power_index_diff,
0375            sizeof(efuse->ht20_tx_power_index_diff));
0376     memcpy(priv->ofdm_tx_power_index_diff,
0377            efuse->ofdm_tx_power_index_diff,
0378            sizeof(efuse->ofdm_tx_power_index_diff));
0379 
0380     memcpy(priv->ht40_max_power_offset,
0381            efuse->ht40_max_power_offset,
0382            sizeof(efuse->ht40_max_power_offset));
0383     memcpy(priv->ht20_max_power_offset,
0384            efuse->ht20_max_power_offset,
0385            sizeof(efuse->ht20_max_power_offset));
0386 
0387     dev_info(&priv->udev->dev, "Vendor: %.7s\n",
0388          efuse->vendor_name);
0389     dev_info(&priv->udev->dev, "Product: %.20s\n",
0390          efuse->device_name);
0391 
0392     priv->power_base = &rtl8192c_power_base;
0393 
0394     if (efuse->rf_regulatory & 0x20) {
0395         sprintf(priv->chip_name, "8188RU");
0396         priv->rtl_chip = RTL8188R;
0397         priv->hi_pa = 1;
0398         priv->no_pape = 1;
0399         priv->power_base = &rtl8188r_power_base;
0400     }
0401 
0402     if (rtl8xxxu_debug & RTL8XXXU_DEBUG_EFUSE) {
0403         unsigned char *raw = priv->efuse_wifi.raw;
0404 
0405         dev_info(&priv->udev->dev,
0406              "%s: dumping efuse (0x%02zx bytes):\n",
0407              __func__, sizeof(struct rtl8192cu_efuse));
0408         for (i = 0; i < sizeof(struct rtl8192cu_efuse); i += 8)
0409             dev_info(&priv->udev->dev, "%02x: %8ph\n", i, &raw[i]);
0410     }
0411     return 0;
0412 }
0413 
0414 static int rtl8192cu_init_phy_rf(struct rtl8xxxu_priv *priv)
0415 {
0416     struct rtl8xxxu_rfregval *rftable;
0417     int ret;
0418 
0419     if (priv->rtl_chip == RTL8188R) {
0420         rftable = rtl8188ru_radioa_1t_highpa_table;
0421         ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
0422     } else if (priv->rf_paths == 1) {
0423         rftable = rtl8192cu_radioa_1t_init_table;
0424         ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
0425     } else {
0426         rftable = rtl8192cu_radioa_2t_init_table;
0427         ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
0428         if (ret)
0429             goto exit;
0430         rftable = rtl8192cu_radiob_2t_init_table;
0431         ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_B);
0432     }
0433 
0434 exit:
0435     return ret;
0436 }
0437 
0438 static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv)
0439 {
0440     u8 val8;
0441     u16 val16;
0442     u32 val32;
0443     int i;
0444 
0445     for (i = 100; i; i--) {
0446         val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO);
0447         if (val8 & APS_FSMCO_PFM_ALDN)
0448             break;
0449     }
0450 
0451     if (!i) {
0452         pr_info("%s: Poll failed\n", __func__);
0453         return -ENODEV;
0454     }
0455 
0456     /*
0457      * RSV_CTRL 0x001C[7:0] = 0x00, unlock ISO/CLK/Power control register
0458      */
0459     rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0);
0460     rtl8xxxu_write8(priv, REG_SPS0_CTRL, 0x2b);
0461     udelay(100);
0462 
0463     val8 = rtl8xxxu_read8(priv, REG_LDOV12D_CTRL);
0464     if (!(val8 & LDOV12D_ENABLE)) {
0465         pr_info("%s: Enabling LDOV12D (%02x)\n", __func__, val8);
0466         val8 |= LDOV12D_ENABLE;
0467         rtl8xxxu_write8(priv, REG_LDOV12D_CTRL, val8);
0468 
0469         udelay(100);
0470 
0471         val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL);
0472         val8 &= ~SYS_ISO_MD2PP;
0473         rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8);
0474     }
0475 
0476     /*
0477      * Auto enable WLAN
0478      */
0479     val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
0480     val16 |= APS_FSMCO_MAC_ENABLE;
0481     rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
0482 
0483     for (i = 1000; i; i--) {
0484         val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
0485         if (!(val16 & APS_FSMCO_MAC_ENABLE))
0486             break;
0487     }
0488     if (!i) {
0489         pr_info("%s: FSMCO_MAC_ENABLE poll failed\n", __func__);
0490         return -EBUSY;
0491     }
0492 
0493     /*
0494      * Enable radio, GPIO, LED
0495      */
0496     val16 = APS_FSMCO_HW_SUSPEND | APS_FSMCO_ENABLE_POWERDOWN |
0497         APS_FSMCO_PFM_ALDN;
0498     rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
0499 
0500     /*
0501      * Release RF digital isolation
0502      */
0503     val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL);
0504     val16 &= ~SYS_ISO_DIOR;
0505     rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16);
0506 
0507     val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
0508     val8 &= ~APSD_CTRL_OFF;
0509     rtl8xxxu_write8(priv, REG_APSD_CTRL, val8);
0510     for (i = 200; i; i--) {
0511         val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
0512         if (!(val8 & APSD_CTRL_OFF_STATUS))
0513             break;
0514     }
0515 
0516     if (!i) {
0517         pr_info("%s: APSD_CTRL poll failed\n", __func__);
0518         return -EBUSY;
0519     }
0520 
0521     /*
0522      * Enable MAC DMA/WMAC/SCHEDULE/SEC block
0523      */
0524     val16 = rtl8xxxu_read16(priv, REG_CR);
0525     val16 |= CR_HCI_TXDMA_ENABLE | CR_HCI_RXDMA_ENABLE |
0526         CR_TXDMA_ENABLE | CR_RXDMA_ENABLE | CR_PROTOCOL_ENABLE |
0527         CR_SCHEDULE_ENABLE | CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE;
0528     rtl8xxxu_write16(priv, REG_CR, val16);
0529 
0530     rtl8xxxu_write8(priv, 0xfe10, 0x19);
0531 
0532     /*
0533      * Workaround for 8188RU LNA power leakage problem.
0534      */
0535     if (priv->rtl_chip == RTL8188R) {
0536         val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);
0537         val32 &= ~BIT(1);
0538         rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32);
0539     }
0540     return 0;
0541 }
0542 
0543 struct rtl8xxxu_fileops rtl8192cu_fops = {
0544     .parse_efuse = rtl8192cu_parse_efuse,
0545     .load_firmware = rtl8192cu_load_firmware,
0546     .power_on = rtl8192cu_power_on,
0547     .power_off = rtl8xxxu_power_off,
0548     .reset_8051 = rtl8xxxu_reset_8051,
0549     .llt_init = rtl8xxxu_init_llt_table,
0550     .init_phy_bb = rtl8xxxu_gen1_init_phy_bb,
0551     .init_phy_rf = rtl8192cu_init_phy_rf,
0552     .phy_iq_calibrate = rtl8xxxu_gen1_phy_iq_calibrate,
0553     .config_channel = rtl8xxxu_gen1_config_channel,
0554     .parse_rx_desc = rtl8xxxu_parse_rxdesc16,
0555     .init_aggregation = rtl8xxxu_gen1_init_aggregation,
0556     .enable_rf = rtl8xxxu_gen1_enable_rf,
0557     .disable_rf = rtl8xxxu_gen1_disable_rf,
0558     .usb_quirks = rtl8xxxu_gen1_usb_quirks,
0559     .set_tx_power = rtl8xxxu_gen1_set_tx_power,
0560     .update_rate_mask = rtl8xxxu_update_rate_mask,
0561     .report_connect = rtl8xxxu_gen1_report_connect,
0562     .fill_txdesc = rtl8xxxu_fill_txdesc_v1,
0563     .writeN_block_size = 128,
0564     .rx_agg_buf_size = 16000,
0565     .tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
0566     .rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
0567     .adda_1t_init = 0x0b1b25a0,
0568     .adda_1t_path_on = 0x0bdb25a0,
0569     .adda_2t_path_on_a = 0x04db25a4,
0570     .adda_2t_path_on_b = 0x0b1b25a4,
0571     .trxff_boundary = 0x27ff,
0572     .pbp_rx = PBP_PAGE_SIZE_128,
0573     .pbp_tx = PBP_PAGE_SIZE_128,
0574     .mactable = rtl8xxxu_gen1_mac_init_table,
0575     .total_page_num = TX_TOTAL_PAGE_NUM,
0576     .page_num_hi = TX_PAGE_NUM_HI_PQ,
0577     .page_num_lo = TX_PAGE_NUM_LO_PQ,
0578     .page_num_norm = TX_PAGE_NUM_NORM_PQ,
0579 };
0580 #endif
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