0001
0002 #ifndef RTL8180_H
0003 #define RTL8180_H
0004
0005 #include "rtl818x.h"
0006
0007 #define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD
0008
0009 #define RF_PARAM_ANALOGPHY (1 << 0)
0010 #define RF_PARAM_ANTBDEFAULT (1 << 1)
0011 #define RF_PARAM_CARRIERSENSE1 (1 << 2)
0012 #define RF_PARAM_CARRIERSENSE2 (1 << 3)
0013
0014 #define BB_ANTATTEN_CHAN14 0x0C
0015 #define BB_ANTENNA_B 0x40
0016
0017 #define BB_HOST_BANG (1 << 30)
0018 #define BB_HOST_BANG_EN (1 << 2)
0019 #define BB_HOST_BANG_CLK (1 << 1)
0020 #define BB_HOST_BANG_DATA 1
0021
0022 #define ANAPARAM_TXDACOFF_SHIFT 27
0023 #define ANAPARAM_PWR0_SHIFT 28
0024 #define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
0025 #define ANAPARAM_PWR1_SHIFT 20
0026 #define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
0027
0028
0029
0030
0031 #define RTL8180_NR_TX_QUEUES 2
0032
0033
0034
0035
0036 #define RTL8187SE_NR_TX_QUEUES 5
0037
0038
0039 #define RTL818X_NR_TX_QUEUES 5
0040
0041 struct rtl8180_tx_desc {
0042 __le32 flags;
0043 __le16 rts_duration;
0044 __le16 plcp_len;
0045 __le32 tx_buf;
0046 union{
0047 __le32 frame_len;
0048 struct {
0049 __le16 frame_len_se;
0050 __le16 frame_duration;
0051 } __packed;
0052 } __packed;
0053 __le32 next_tx_desc;
0054 u8 cw;
0055 u8 retry_limit;
0056 u8 agc;
0057 u8 flags2;
0058
0059
0060
0061 u32 reserved;
0062
0063 __le16 flags3;
0064 __le16 frag_qsize;
0065 } __packed;
0066
0067 struct rtl818x_rx_cmd_desc {
0068 __le32 flags;
0069 u32 reserved;
0070 __le32 rx_buf;
0071 } __packed;
0072
0073 struct rtl8180_rx_desc {
0074 __le32 flags;
0075 __le32 flags2;
0076 __le64 tsft;
0077
0078 } __packed;
0079
0080 struct rtl8187se_rx_desc {
0081 __le32 flags;
0082 __le64 tsft;
0083 __le32 flags2;
0084 __le32 flags3;
0085 u32 reserved[3];
0086 } __packed;
0087
0088 struct rtl8180_tx_ring {
0089 struct rtl8180_tx_desc *desc;
0090 dma_addr_t dma;
0091 unsigned int idx;
0092 unsigned int entries;
0093 struct sk_buff_head queue;
0094 };
0095
0096 struct rtl8180_vif {
0097 struct ieee80211_hw *dev;
0098
0099
0100 struct delayed_work beacon_work;
0101 bool enable_beacon;
0102 };
0103
0104 struct rtl8180_priv {
0105
0106 struct rtl818x_csr __iomem *map;
0107 const struct rtl818x_rf_ops *rf;
0108 struct ieee80211_vif *vif;
0109
0110
0111 bool map_pio;
0112 spinlock_t lock;
0113 void *rx_ring;
0114 u8 rx_ring_sz;
0115 dma_addr_t rx_ring_dma;
0116 unsigned int rx_idx;
0117 struct sk_buff *rx_buf[32];
0118 struct rtl8180_tx_ring tx_ring[RTL818X_NR_TX_QUEUES];
0119 struct ieee80211_channel channels[14];
0120 struct ieee80211_rate rates[12];
0121 struct ieee80211_supported_band band;
0122 struct ieee80211_tx_queue_params queue_param[4];
0123 struct pci_dev *pdev;
0124 u32 rx_conf;
0125 u8 slot_time;
0126 u16 ack_time;
0127
0128 enum {
0129 RTL818X_CHIP_FAMILY_RTL8180,
0130 RTL818X_CHIP_FAMILY_RTL8185,
0131 RTL818X_CHIP_FAMILY_RTL8187SE,
0132 } chip_family;
0133 u32 anaparam;
0134 u16 rfparam;
0135 u8 csthreshold;
0136 u8 mac_addr[ETH_ALEN];
0137 u8 rf_type;
0138 u8 xtal_out;
0139 u8 xtal_in;
0140 u8 xtal_cal;
0141 u8 thermal_meter_val;
0142 u8 thermal_meter_en;
0143 u8 antenna_diversity_en;
0144 u8 antenna_diversity_default;
0145
0146 u16 seqno;
0147 };
0148
0149 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
0150 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);
0151 void rtl8180_set_anaparam2(struct rtl8180_priv *priv, u32 anaparam2);
0152
0153 static inline u8 rtl818x_ioread8(struct rtl8180_priv *priv, const u8 __iomem *addr)
0154 {
0155 return ioread8(addr);
0156 }
0157
0158 static inline u16 rtl818x_ioread16(struct rtl8180_priv *priv, const __le16 __iomem *addr)
0159 {
0160 return ioread16(addr);
0161 }
0162
0163 static inline u32 rtl818x_ioread32(struct rtl8180_priv *priv, const __le32 __iomem *addr)
0164 {
0165 return ioread32(addr);
0166 }
0167
0168 static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
0169 u8 __iomem *addr, u8 val)
0170 {
0171 iowrite8(val, addr);
0172 }
0173
0174 static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
0175 __le16 __iomem *addr, u16 val)
0176 {
0177 iowrite16(val, addr);
0178 }
0179
0180 static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
0181 __le32 __iomem *addr, u32 val)
0182 {
0183 iowrite32(val, addr);
0184 }
0185
0186 #endif