ralink/rt2x00/rt2x00reg.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003     Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
0004     <http://rt2x00.serialmonkey.com>
0005
0006  */
0007
0008 /*
0009     Module: rt2x00
0010     Abstract: rt2x00 generic register information.
0011  */
0012
0013 #ifndef RT2X00REG_H
0014 #define RT2X00REG_H
0015
0016 /*
0017  * RX crypto status
0018  */
0019 enum rx_crypto {
0020     RX_CRYPTO_SUCCESS = 0,
0021     RX_CRYPTO_FAIL_ICV = 1,
0022     RX_CRYPTO_FAIL_MIC = 2,
0023     RX_CRYPTO_FAIL_KEY = 3,
0024 };
0025
0026 /*
0027  * Antenna values
0028  */
0029 enum antenna {
0030     ANTENNA_SW_DIVERSITY = 0,
0031     ANTENNA_A = 1,
0032     ANTENNA_B = 2,
0033     ANTENNA_HW_DIVERSITY = 3,
0034 };
0035
0036 /*
0037  * Led mode values.
0038  */
0039 enum led_mode {
0040     LED_MODE_DEFAULT = 0,
0041     LED_MODE_TXRX_ACTIVITY = 1,
0042     LED_MODE_SIGNAL_STRENGTH = 2,
0043     LED_MODE_ASUS = 3,
0044     LED_MODE_ALPHA = 4,
0045 };
0046
0047 /*
0048  * TSF sync values
0049  */
0050 enum tsf_sync {
0051     TSF_SYNC_NONE = 0,
0052     TSF_SYNC_INFRA = 1,
0053     TSF_SYNC_ADHOC = 2,
0054     TSF_SYNC_AP_NONE = 3,
0055 };
0056
0057 /*
0058  * Device states
0059  */
0060 enum dev_state {
0061     STATE_DEEP_SLEEP = 0,
0062     STATE_SLEEP = 1,
0063     STATE_STANDBY = 2,
0064     STATE_AWAKE = 3,
0065
0066 /*
0067  * Additional device states, these values are
0068  * not strict since they are not directly passed
0069  * into the device.
0070  */
0071     STATE_RADIO_ON,
0072     STATE_RADIO_OFF,
0073     STATE_RADIO_IRQ_ON,
0074     STATE_RADIO_IRQ_OFF,
0075 };
0076
0077 /*
0078  * IFS backoff values
0079  */
0080 enum ifs {
0081     IFS_BACKOFF = 0,
0082     IFS_SIFS = 1,
0083     IFS_NEW_BACKOFF = 2,
0084     IFS_NONE = 3,
0085 };
0086
0087 /*
0088  * IFS backoff values for HT devices
0089  */
0090 enum txop {
0091     TXOP_HTTXOP = 0,
0092     TXOP_PIFS = 1,
0093     TXOP_SIFS = 2,
0094     TXOP_BACKOFF = 3,
0095 };
0096
0097 /*
0098  * Cipher types for hardware encryption
0099  */
0100 enum cipher {
0101     CIPHER_NONE = 0,
0102     CIPHER_WEP64 = 1,
0103     CIPHER_WEP128 = 2,
0104     CIPHER_TKIP = 3,
0105     CIPHER_AES = 4,
0106 /*
0107  * The following fields were added by rt61pci and rt73usb.
0108  */
0109     CIPHER_CKIP64 = 5,
0110     CIPHER_CKIP128 = 6,
0111     CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
0112
0113 /*
0114  * Max cipher type.
0115  * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
0116  * are excluded due to limitations in mac80211.
0117  */
0118     CIPHER_MAX = 4,
0119 };
0120
0121 /*
0122  * Rate modulations
0123  */
0124 enum rate_modulation {
0125     RATE_MODE_CCK = 0,
0126     RATE_MODE_OFDM = 1,
0127     RATE_MODE_HT_MIX = 2,
0128     RATE_MODE_HT_GREENFIELD = 3,
0129 };
0130
0131 /*
0132  * Firmware validation error codes
0133  */
0134 enum firmware_errors {
0135     FW_OK,
0136     FW_BAD_CRC,
0137     FW_BAD_LENGTH,
0138     FW_BAD_VERSION,
0139 };
0140
0141 /*
0142  * Register handlers.
0143  * We store the position of a register field inside a field structure,
0144  * This will simplify the process of setting and reading a certain field
0145  * inside the register while making sure the process remains byte order safe.
0146  */
0147 struct rt2x00_field8 {
0148     u8 bit_offset;
0149     u8 bit_mask;
0150 };
0151
0152 struct rt2x00_field16 {
0153     u16 bit_offset;
0154     u16 bit_mask;
0155 };
0156
0157 struct rt2x00_field32 {
0158     u32 bit_offset;
0159     u32 bit_mask;
0160 };
0161
0162 /*
0163  * Power of two check, this will check
0164  * if the mask that has been given contains and contiguous set of bits.
0165  * Note that we cannot use the is_power_of_2() function since this
0166  * check must be done at compile-time.
0167  */
0168 #define is_power_of_two(x)  ( !((x) & ((x)-1)) )
0169 #define low_bit_mask(x)     ( ((x)-1) & ~(x) )
0170 #define is_valid_mask(x)    is_power_of_two(1LU + (x) + low_bit_mask(x))
0171
0172 /*
0173  * Macros to find first set bit in a variable.
0174  * These macros behave the same as the __ffs() functions but
0175  * the most important difference that this is done during
0176  * compile-time rather then run-time.
0177  */
0178 #define compile_ffs2(__x) \
0179     __builtin_choose_expr(((__x) & 0x1), 0, 1)
0180
0181 #define compile_ffs4(__x) \
0182     __builtin_choose_expr(((__x) & 0x3), \
0183                   (compile_ffs2((__x))), \
0184                   (compile_ffs2((__x) >> 2) + 2))
0185
0186 #define compile_ffs8(__x) \
0187     __builtin_choose_expr(((__x) & 0xf), \
0188                   (compile_ffs4((__x))), \
0189                   (compile_ffs4((__x) >> 4) + 4))
0190
0191 #define compile_ffs16(__x) \
0192     __builtin_choose_expr(((__x) & 0xff), \
0193                   (compile_ffs8((__x))), \
0194                   (compile_ffs8((__x) >> 8) + 8))
0195
0196 #define compile_ffs32(__x) \
0197     __builtin_choose_expr(((__x) & 0xffff), \
0198                   (compile_ffs16((__x))), \
0199                   (compile_ffs16((__x) >> 16) + 16))
0200
0201 /*
0202  * This macro will check the requirements for the FIELD{8,16,32} macros
0203  * The mask should be a constant non-zero contiguous set of bits which
0204  * does not exceed the given typelimit.
0205  */
0206 #define FIELD_CHECK(__mask, __type)         \
0207     BUILD_BUG_ON(!(__mask) ||           \
0208              !is_valid_mask(__mask) ||      \
0209              (__mask) != (__type)(__mask))  \
0210
0211 #define FIELD8(__mask)              \
0212 ({                      \
0213     FIELD_CHECK(__mask, u8);        \
0214     (struct rt2x00_field8) {        \
0215         compile_ffs8(__mask), (__mask)  \
0216     };                  \
0217 })
0218
0219 #define FIELD16(__mask)             \
0220 ({                      \
0221     FIELD_CHECK(__mask, u16);       \
0222     (struct rt2x00_field16) {       \
0223         compile_ffs16(__mask), (__mask) \
0224     };                  \
0225 })
0226
0227 #define FIELD32(__mask)             \
0228 ({                      \
0229     FIELD_CHECK(__mask, u32);       \
0230     (struct rt2x00_field32) {       \
0231         compile_ffs32(__mask), (__mask) \
0232     };                  \
0233 })
0234
0235 #define SET_FIELD(__reg, __type, __field, __value)\
0236 ({                      \
0237     typecheck(__type, __field);     \
0238     *(__reg) &= ~((__field).bit_mask);  \
0239     *(__reg) |= ((__value) <<       \
0240         ((__field).bit_offset)) &       \
0241         ((__field).bit_mask);       \
0242 })
0243
0244 #define GET_FIELD(__reg, __type, __field)   \
0245 ({                      \
0246     typecheck(__type, __field);     \
0247     ((__reg) & ((__field).bit_mask)) >> \
0248         ((__field).bit_offset);     \
0249 })
0250
0251 #define rt2x00_set_field32(__reg, __field, __value) \
0252     SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
0253 #define rt2x00_get_field32(__reg, __field) \
0254     GET_FIELD(__reg, struct rt2x00_field32, __field)
0255
0256 #define rt2x00_set_field16(__reg, __field, __value) \
0257     SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
0258 #define rt2x00_get_field16(__reg, __field) \
0259     GET_FIELD(__reg, struct rt2x00_field16, __field)
0260
0261 #define rt2x00_set_field8(__reg, __field, __value) \
0262     SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
0263 #define rt2x00_get_field8(__reg, __field) \
0264     GET_FIELD(__reg, struct rt2x00_field8, __field)
0265
0266 #endif /* RT2X00REG_H */