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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 0004 <http://rt2x00.serialmonkey.com> 0005 0006 */ 0007 0008 /* 0009 Module: rt2x00 0010 Abstract: rt2x00 queue datastructures and routines 0011 */ 0012 0013 #ifndef RT2X00QUEUE_H 0014 #define RT2X00QUEUE_H 0015 0016 #include <linux/prefetch.h> 0017 0018 /** 0019 * DOC: Entry frame size 0020 * 0021 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes, 0022 * for USB devices this restriction does not apply, but the value of 0023 * 2432 makes sense since it is big enough to contain the maximum fragment 0024 * size according to the ieee802.11 specs. 0025 * The aggregation size depends on support from the driver, but should 0026 * be something around 3840 bytes. 0027 */ 0028 #define DATA_FRAME_SIZE 2432 0029 #define MGMT_FRAME_SIZE 256 0030 #define AGGREGATION_SIZE 3840 0031 0032 /** 0033 * enum data_queue_qid: Queue identification 0034 * 0035 * @QID_AC_VO: AC VO queue 0036 * @QID_AC_VI: AC VI queue 0037 * @QID_AC_BE: AC BE queue 0038 * @QID_AC_BK: AC BK queue 0039 * @QID_HCCA: HCCA queue 0040 * @QID_MGMT: MGMT queue (prio queue) 0041 * @QID_RX: RX queue 0042 * @QID_OTHER: None of the above (don't use, only present for completeness) 0043 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device) 0044 * @QID_ATIM: Atim queue (value unspecified, don't send it to device) 0045 */ 0046 enum data_queue_qid { 0047 QID_AC_VO = 0, 0048 QID_AC_VI = 1, 0049 QID_AC_BE = 2, 0050 QID_AC_BK = 3, 0051 QID_HCCA = 4, 0052 QID_MGMT = 13, 0053 QID_RX = 14, 0054 QID_OTHER = 15, 0055 QID_BEACON, 0056 QID_ATIM, 0057 }; 0058 0059 /** 0060 * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc 0061 * 0062 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX 0063 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX 0064 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by 0065 * mac80211 but was stripped for processing by the driver. 0066 * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211, 0067 * don't try to pass it back. 0068 * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the 0069 * skb, instead of in the desc field. 0070 */ 0071 enum skb_frame_desc_flags { 0072 SKBDESC_DMA_MAPPED_RX = 1 << 0, 0073 SKBDESC_DMA_MAPPED_TX = 1 << 1, 0074 SKBDESC_IV_STRIPPED = 1 << 2, 0075 SKBDESC_NOT_MAC80211 = 1 << 3, 0076 SKBDESC_DESC_IN_SKB = 1 << 4, 0077 }; 0078 0079 /** 0080 * struct skb_frame_desc: Descriptor information for the skb buffer 0081 * 0082 * This structure is placed over the driver_data array, this means that 0083 * this structure should not exceed the size of that array (40 bytes). 0084 * 0085 * @flags: Frame flags, see &enum skb_frame_desc_flags. 0086 * @desc_len: Length of the frame descriptor. 0087 * @tx_rate_idx: the index of the TX rate, used for TX status reporting 0088 * @tx_rate_flags: the TX rate flags, used for TX status reporting 0089 * @desc: Pointer to descriptor part of the frame. 0090 * Note that this pointer could point to something outside 0091 * of the scope of the skb->data pointer. 0092 * @iv: IV/EIV data used during encryption/decryption. 0093 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer. 0094 * @sta: The station where sk buffer was sent. 0095 */ 0096 struct skb_frame_desc { 0097 u8 flags; 0098 0099 u8 desc_len; 0100 u8 tx_rate_idx; 0101 u8 tx_rate_flags; 0102 0103 void *desc; 0104 0105 __le32 iv[2]; 0106 0107 dma_addr_t skb_dma; 0108 struct ieee80211_sta *sta; 0109 }; 0110 0111 /** 0112 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff. 0113 * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc 0114 */ 0115 static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb) 0116 { 0117 BUILD_BUG_ON(sizeof(struct skb_frame_desc) > 0118 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 0119 return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data; 0120 } 0121 0122 /** 0123 * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc 0124 * 0125 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value. 0126 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value. 0127 * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value. 0128 * @RXDONE_MY_BSS: Does this frame originate from device's BSS. 0129 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data. 0130 * @RXDONE_CRYPTO_ICV: Driver provided ICV data. 0131 * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary. 0132 */ 0133 enum rxdone_entry_desc_flags { 0134 RXDONE_SIGNAL_PLCP = BIT(0), 0135 RXDONE_SIGNAL_BITRATE = BIT(1), 0136 RXDONE_SIGNAL_MCS = BIT(2), 0137 RXDONE_MY_BSS = BIT(3), 0138 RXDONE_CRYPTO_IV = BIT(4), 0139 RXDONE_CRYPTO_ICV = BIT(5), 0140 RXDONE_L2PAD = BIT(6), 0141 }; 0142 0143 /** 0144 * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags 0145 * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags 0146 * from &rxdone_entry_desc to a signal value type. 0147 */ 0148 #define RXDONE_SIGNAL_MASK \ 0149 ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS ) 0150 0151 /** 0152 * struct rxdone_entry_desc: RX Entry descriptor 0153 * 0154 * Summary of information that has been read from the RX frame descriptor. 0155 * 0156 * @timestamp: RX Timestamp 0157 * @signal: Signal of the received frame. 0158 * @rssi: RSSI of the received frame. 0159 * @size: Data size of the received frame. 0160 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags). 0161 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags). 0162 * @rate_mode: Rate mode (See @enum rate_modulation). 0163 * @cipher: Cipher type used during decryption. 0164 * @cipher_status: Decryption status. 0165 * @iv: IV/EIV data used during decryption. 0166 * @icv: ICV data used during decryption. 0167 */ 0168 struct rxdone_entry_desc { 0169 u64 timestamp; 0170 int signal; 0171 int rssi; 0172 int size; 0173 int flags; 0174 int dev_flags; 0175 u16 rate_mode; 0176 u16 enc_flags; 0177 enum mac80211_rx_encoding encoding; 0178 enum rate_info_bw bw; 0179 u8 cipher; 0180 u8 cipher_status; 0181 0182 __le32 iv[2]; 0183 __le32 icv; 0184 }; 0185 0186 /** 0187 * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc 0188 * 0189 * Every txdone report has to contain the basic result of the 0190 * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or 0191 * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in 0192 * conjunction with all of these flags but should only be set 0193 * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used 0194 * in conjunction with &TXDONE_FAILURE. 0195 * 0196 * @TXDONE_UNKNOWN: Hardware could not determine success of transmission. 0197 * @TXDONE_SUCCESS: Frame was successfully send 0198 * @TXDONE_FALLBACK: Hardware used fallback rates for retries 0199 * @TXDONE_FAILURE: Frame was not successfully send 0200 * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the 0201 * frame transmission failed due to excessive retries. 0202 */ 0203 enum txdone_entry_desc_flags { 0204 TXDONE_UNKNOWN, 0205 TXDONE_SUCCESS, 0206 TXDONE_FALLBACK, 0207 TXDONE_FAILURE, 0208 TXDONE_EXCESSIVE_RETRY, 0209 TXDONE_AMPDU, 0210 TXDONE_NO_ACK_REQ, 0211 }; 0212 0213 /** 0214 * struct txdone_entry_desc: TX done entry descriptor 0215 * 0216 * Summary of information that has been read from the TX frame descriptor 0217 * after the device is done with transmission. 0218 * 0219 * @flags: TX done flags (See &enum txdone_entry_desc_flags). 0220 * @retry: Retry count. 0221 */ 0222 struct txdone_entry_desc { 0223 unsigned long flags; 0224 int retry; 0225 }; 0226 0227 /** 0228 * enum txentry_desc_flags: Status flags for TX entry descriptor 0229 * 0230 * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. 0231 * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame. 0232 * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter. 0233 * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame. 0234 * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. 0235 * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. 0236 * @ENTRY_TXD_BURST: This frame belongs to the same burst event. 0237 * @ENTRY_TXD_ACK: An ACK is required for this frame. 0238 * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used. 0239 * @ENTRY_TXD_ENCRYPT: This frame should be encrypted. 0240 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared). 0241 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware. 0242 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware. 0243 * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU. 0244 * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth. 0245 * @ENTRY_TXD_HT_SHORT_GI: Use short GI. 0246 * @ENTRY_TXD_HT_MIMO_PS: The receiving STA is in dynamic SM PS mode. 0247 */ 0248 enum txentry_desc_flags { 0249 ENTRY_TXD_RTS_FRAME, 0250 ENTRY_TXD_CTS_FRAME, 0251 ENTRY_TXD_GENERATE_SEQ, 0252 ENTRY_TXD_FIRST_FRAGMENT, 0253 ENTRY_TXD_MORE_FRAG, 0254 ENTRY_TXD_REQ_TIMESTAMP, 0255 ENTRY_TXD_BURST, 0256 ENTRY_TXD_ACK, 0257 ENTRY_TXD_RETRY_MODE, 0258 ENTRY_TXD_ENCRYPT, 0259 ENTRY_TXD_ENCRYPT_PAIRWISE, 0260 ENTRY_TXD_ENCRYPT_IV, 0261 ENTRY_TXD_ENCRYPT_MMIC, 0262 ENTRY_TXD_HT_AMPDU, 0263 ENTRY_TXD_HT_BW_40, 0264 ENTRY_TXD_HT_SHORT_GI, 0265 ENTRY_TXD_HT_MIMO_PS, 0266 }; 0267 0268 /** 0269 * struct txentry_desc: TX Entry descriptor 0270 * 0271 * Summary of information for the frame descriptor before sending a TX frame. 0272 * 0273 * @flags: Descriptor flags (See &enum queue_entry_flags). 0274 * @length: Length of the entire frame. 0275 * @header_length: Length of 802.11 header. 0276 * @length_high: PLCP length high word. 0277 * @length_low: PLCP length low word. 0278 * @signal: PLCP signal. 0279 * @service: PLCP service. 0280 * @msc: MCS. 0281 * @stbc: Use Space Time Block Coding (only available for MCS rates < 8). 0282 * @ba_size: Size of the recepients RX reorder buffer - 1. 0283 * @rate_mode: Rate mode (See @enum rate_modulation). 0284 * @mpdu_density: MDPU density. 0285 * @retry_limit: Max number of retries. 0286 * @ifs: IFS value. 0287 * @txop: IFS value for 11n capable chips. 0288 * @cipher: Cipher type used for encryption. 0289 * @key_idx: Key index used for encryption. 0290 * @iv_offset: Position where IV should be inserted by hardware. 0291 * @iv_len: Length of IV data. 0292 */ 0293 struct txentry_desc { 0294 unsigned long flags; 0295 0296 u16 length; 0297 u16 header_length; 0298 0299 union { 0300 struct { 0301 u16 length_high; 0302 u16 length_low; 0303 u16 signal; 0304 u16 service; 0305 enum ifs ifs; 0306 } plcp; 0307 0308 struct { 0309 u16 mcs; 0310 u8 stbc; 0311 u8 ba_size; 0312 u8 mpdu_density; 0313 enum txop txop; 0314 int wcid; 0315 } ht; 0316 } u; 0317 0318 enum rate_modulation rate_mode; 0319 0320 short retry_limit; 0321 0322 enum cipher cipher; 0323 u16 key_idx; 0324 u16 iv_offset; 0325 u16 iv_len; 0326 }; 0327 0328 /** 0329 * enum queue_entry_flags: Status flags for queue entry 0330 * 0331 * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface. 0332 * As long as this bit is set, this entry may only be touched 0333 * through the interface structure. 0334 * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data 0335 * transfer (either TX or RX depending on the queue). The entry should 0336 * only be touched after the device has signaled it is done with it. 0337 * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting 0338 * for the signal to start sending. 0339 * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occurred 0340 * while transferring the data to the hardware. No TX status report will 0341 * be expected from the hardware. 0342 * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and 0343 * returned. It is now waiting for the status reporting before the 0344 * entry can be reused again. 0345 */ 0346 enum queue_entry_flags { 0347 ENTRY_BCN_ASSIGNED, 0348 ENTRY_BCN_ENABLED, 0349 ENTRY_OWNER_DEVICE_DATA, 0350 ENTRY_DATA_PENDING, 0351 ENTRY_DATA_IO_FAILED, 0352 ENTRY_DATA_STATUS_PENDING, 0353 }; 0354 0355 /** 0356 * struct queue_entry: Entry inside the &struct data_queue 0357 * 0358 * @flags: Entry flags, see &enum queue_entry_flags. 0359 * @last_action: Timestamp of last change. 0360 * @queue: The data queue (&struct data_queue) to which this entry belongs. 0361 * @skb: The buffer which is currently being transmitted (for TX queue), 0362 * or used to directly receive data in (for RX queue). 0363 * @entry_idx: The entry index number. 0364 * @priv_data: Private data belonging to this queue entry. The pointer 0365 * points to data specific to a particular driver and queue type. 0366 * @status: Device specific status 0367 */ 0368 struct queue_entry { 0369 unsigned long flags; 0370 unsigned long last_action; 0371 0372 struct data_queue *queue; 0373 0374 struct sk_buff *skb; 0375 0376 unsigned int entry_idx; 0377 0378 void *priv_data; 0379 }; 0380 0381 /** 0382 * enum queue_index: Queue index type 0383 * 0384 * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is 0385 * owned by the hardware then the queue is considered to be full. 0386 * @Q_INDEX_DMA_DONE: Index pointer for the next entry which will have been 0387 * transferred to the hardware. 0388 * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by 0389 * the hardware and for which we need to run the txdone handler. If this 0390 * entry is not owned by the hardware the queue is considered to be empty. 0391 * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size 0392 * of the index array. 0393 */ 0394 enum queue_index { 0395 Q_INDEX, 0396 Q_INDEX_DMA_DONE, 0397 Q_INDEX_DONE, 0398 Q_INDEX_MAX, 0399 }; 0400 0401 /** 0402 * enum data_queue_flags: Status flags for data queues 0403 * 0404 * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the 0405 * device might be DMA'ing skbuffers. TX queues will accept skbuffers to 0406 * be transmitted and beacon queues will start beaconing the configured 0407 * beacons. 0408 * @QUEUE_PAUSED: The queue has been started but is currently paused. 0409 * When this bit is set, the queue has been stopped in mac80211, 0410 * preventing new frames to be enqueued. However, a few frames 0411 * might still appear shortly after the pausing... 0412 */ 0413 enum data_queue_flags { 0414 QUEUE_STARTED, 0415 QUEUE_PAUSED, 0416 }; 0417 0418 /** 0419 * struct data_queue: Data queue 0420 * 0421 * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to. 0422 * @entries: Base address of the &struct queue_entry which are 0423 * part of this queue. 0424 * @qid: The queue identification, see &enum data_queue_qid. 0425 * @flags: Entry flags, see &enum queue_entry_flags. 0426 * @status_lock: The mutex for protecting the start/stop/flush 0427 * handling on this queue. 0428 * @tx_lock: Spinlock to serialize tx operations on this queue. 0429 * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or 0430 * @index_crypt needs to be changed this lock should be grabbed to prevent 0431 * index corruption due to concurrency. 0432 * @count: Number of frames handled in the queue. 0433 * @limit: Maximum number of entries in the queue. 0434 * @threshold: Minimum number of free entries before queue is kicked by force. 0435 * @length: Number of frames in queue. 0436 * @index: Index pointers to entry positions in the queue, 0437 * use &enum queue_index to get a specific index field. 0438 * @wd_count: watchdog counter number of times entry does change 0439 * in the queue 0440 * @wd_idx: index of queue entry saved by watchdog 0441 * @txop: maximum burst time. 0442 * @aifs: The aifs value for outgoing frames (field ignored in RX queue). 0443 * @cw_min: The cw min value for outgoing frames (field ignored in RX queue). 0444 * @cw_max: The cw max value for outgoing frames (field ignored in RX queue). 0445 * @data_size: Maximum data size for the frames in this queue. 0446 * @desc_size: Hardware descriptor size for the data in this queue. 0447 * @priv_size: Size of per-queue_entry private data. 0448 * @usb_endpoint: Device endpoint used for communication (USB only) 0449 * @usb_maxpacket: Max packet size for given endpoint (USB only) 0450 */ 0451 struct data_queue { 0452 struct rt2x00_dev *rt2x00dev; 0453 struct queue_entry *entries; 0454 0455 enum data_queue_qid qid; 0456 unsigned long flags; 0457 0458 struct mutex status_lock; 0459 spinlock_t tx_lock; 0460 spinlock_t index_lock; 0461 0462 unsigned int count; 0463 unsigned short limit; 0464 unsigned short threshold; 0465 unsigned short length; 0466 unsigned short index[Q_INDEX_MAX]; 0467 0468 unsigned short wd_count; 0469 unsigned int wd_idx; 0470 0471 unsigned short txop; 0472 unsigned short aifs; 0473 unsigned short cw_min; 0474 unsigned short cw_max; 0475 0476 unsigned short data_size; 0477 unsigned char desc_size; 0478 unsigned char winfo_size; 0479 unsigned short priv_size; 0480 0481 unsigned short usb_endpoint; 0482 unsigned short usb_maxpacket; 0483 }; 0484 0485 /** 0486 * queue_end - Return pointer to the last queue (HELPER MACRO). 0487 * @__dev: Pointer to &struct rt2x00_dev 0488 * 0489 * Using the base rx pointer and the maximum number of available queues, 0490 * this macro will return the address of 1 position beyond the end of the 0491 * queues array. 0492 */ 0493 #define queue_end(__dev) \ 0494 &(__dev)->rx[(__dev)->data_queues] 0495 0496 /** 0497 * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO). 0498 * @__dev: Pointer to &struct rt2x00_dev 0499 * 0500 * Using the base tx pointer and the maximum number of available TX 0501 * queues, this macro will return the address of 1 position beyond 0502 * the end of the TX queue array. 0503 */ 0504 #define tx_queue_end(__dev) \ 0505 &(__dev)->tx[(__dev)->ops->tx_queues] 0506 0507 /** 0508 * queue_next - Return pointer to next queue in list (HELPER MACRO). 0509 * @__queue: Current queue for which we need the next queue 0510 * 0511 * Using the current queue address we take the address directly 0512 * after the queue to take the next queue. Note that this macro 0513 * should be used carefully since it does not protect against 0514 * moving past the end of the list. (See macros &queue_end and 0515 * &tx_queue_end for determining the end of the queue). 0516 */ 0517 #define queue_next(__queue) \ 0518 &(__queue)[1] 0519 0520 /** 0521 * queue_loop - Loop through the queues within a specific range (HELPER MACRO). 0522 * @__entry: Pointer where the current queue entry will be stored in. 0523 * @__start: Start queue pointer. 0524 * @__end: End queue pointer. 0525 * 0526 * This macro will loop through all queues between &__start and &__end. 0527 */ 0528 #define queue_loop(__entry, __start, __end) \ 0529 for ((__entry) = (__start); \ 0530 prefetch(queue_next(__entry)), (__entry) != (__end);\ 0531 (__entry) = queue_next(__entry)) 0532 0533 /** 0534 * queue_for_each - Loop through all queues 0535 * @__dev: Pointer to &struct rt2x00_dev 0536 * @__entry: Pointer where the current queue entry will be stored in. 0537 * 0538 * This macro will loop through all available queues. 0539 */ 0540 #define queue_for_each(__dev, __entry) \ 0541 queue_loop(__entry, (__dev)->rx, queue_end(__dev)) 0542 0543 /** 0544 * tx_queue_for_each - Loop through the TX queues 0545 * @__dev: Pointer to &struct rt2x00_dev 0546 * @__entry: Pointer where the current queue entry will be stored in. 0547 * 0548 * This macro will loop through all TX related queues excluding 0549 * the Beacon and Atim queues. 0550 */ 0551 #define tx_queue_for_each(__dev, __entry) \ 0552 queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev)) 0553 0554 /** 0555 * txall_queue_for_each - Loop through all TX related queues 0556 * @__dev: Pointer to &struct rt2x00_dev 0557 * @__entry: Pointer where the current queue entry will be stored in. 0558 * 0559 * This macro will loop through all TX related queues including 0560 * the Beacon and Atim queues. 0561 */ 0562 #define txall_queue_for_each(__dev, __entry) \ 0563 queue_loop(__entry, (__dev)->tx, queue_end(__dev)) 0564 0565 /** 0566 * rt2x00queue_for_each_entry - Loop through all entries in the queue 0567 * @queue: Pointer to @data_queue 0568 * @start: &enum queue_index Pointer to start index 0569 * @end: &enum queue_index Pointer to end index 0570 * @data: Data to pass to the callback function 0571 * @fn: The function to call for each &struct queue_entry 0572 * 0573 * This will walk through all entries in the queue, in chronological 0574 * order. This means it will start at the current @start pointer 0575 * and will walk through the queue until it reaches the @end pointer. 0576 * 0577 * If fn returns true for an entry rt2x00queue_for_each_entry will stop 0578 * processing and return true as well. 0579 */ 0580 bool rt2x00queue_for_each_entry(struct data_queue *queue, 0581 enum queue_index start, 0582 enum queue_index end, 0583 void *data, 0584 bool (*fn)(struct queue_entry *entry, 0585 void *data)); 0586 0587 /** 0588 * rt2x00queue_empty - Check if the queue is empty. 0589 * @queue: Queue to check if empty. 0590 */ 0591 static inline int rt2x00queue_empty(struct data_queue *queue) 0592 { 0593 return queue->length == 0; 0594 } 0595 0596 /** 0597 * rt2x00queue_full - Check if the queue is full. 0598 * @queue: Queue to check if full. 0599 */ 0600 static inline int rt2x00queue_full(struct data_queue *queue) 0601 { 0602 return queue->length == queue->limit; 0603 } 0604 0605 /** 0606 * rt2x00queue_free - Check the number of available entries in queue. 0607 * @queue: Queue to check. 0608 */ 0609 static inline int rt2x00queue_available(struct data_queue *queue) 0610 { 0611 return queue->limit - queue->length; 0612 } 0613 0614 /** 0615 * rt2x00queue_threshold - Check if the queue is below threshold 0616 * @queue: Queue to check. 0617 */ 0618 static inline int rt2x00queue_threshold(struct data_queue *queue) 0619 { 0620 return rt2x00queue_available(queue) < queue->threshold; 0621 } 0622 /** 0623 * rt2x00queue_dma_timeout - Check if a timeout occurred for DMA transfers 0624 * @entry: Queue entry to check. 0625 */ 0626 static inline int rt2x00queue_dma_timeout(struct queue_entry *entry) 0627 { 0628 if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) 0629 return false; 0630 return time_after(jiffies, entry->last_action + msecs_to_jiffies(100)); 0631 } 0632 0633 /** 0634 * _rt2x00_desc_read - Read a word from the hardware descriptor. 0635 * @desc: Base descriptor address 0636 * @word: Word index from where the descriptor should be read. 0637 */ 0638 static inline __le32 _rt2x00_desc_read(__le32 *desc, const u8 word) 0639 { 0640 return desc[word]; 0641 } 0642 0643 /** 0644 * rt2x00_desc_read - Read a word from the hardware descriptor, this 0645 * function will take care of the byte ordering. 0646 * @desc: Base descriptor address 0647 * @word: Word index from where the descriptor should be read. 0648 */ 0649 static inline u32 rt2x00_desc_read(__le32 *desc, const u8 word) 0650 { 0651 return le32_to_cpu(_rt2x00_desc_read(desc, word)); 0652 } 0653 0654 /** 0655 * rt2x00_desc_write - write a word to the hardware descriptor, this 0656 * function will take care of the byte ordering. 0657 * @desc: Base descriptor address 0658 * @word: Word index from where the descriptor should be written. 0659 * @value: Value that should be written into the descriptor. 0660 */ 0661 static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value) 0662 { 0663 desc[word] = value; 0664 } 0665 0666 /** 0667 * rt2x00_desc_write - write a word to the hardware descriptor. 0668 * @desc: Base descriptor address 0669 * @word: Word index from where the descriptor should be written. 0670 * @value: Value that should be written into the descriptor. 0671 */ 0672 static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value) 0673 { 0674 _rt2x00_desc_write(desc, word, cpu_to_le32(value)); 0675 } 0676 0677 #endif /* RT2X00QUEUE_H */
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