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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
0004     Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
0005     Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
0006     Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
0007     Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
0008     Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
0009     Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
0010     Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
0011     <http://rt2x00.serialmonkey.com>
0012 
0013  */
0014 
0015 /*
0016     Module: rt2800pci
0017     Abstract: rt2800pci device specific routines.
0018     Supported chipsets: RT2800E & RT2800ED.
0019  */
0020 
0021 #include <linux/delay.h>
0022 #include <linux/etherdevice.h>
0023 #include <linux/init.h>
0024 #include <linux/kernel.h>
0025 #include <linux/module.h>
0026 #include <linux/pci.h>
0027 #include <linux/eeprom_93cx6.h>
0028 
0029 #include "rt2x00.h"
0030 #include "rt2x00mmio.h"
0031 #include "rt2x00pci.h"
0032 #include "rt2800lib.h"
0033 #include "rt2800mmio.h"
0034 #include "rt2800.h"
0035 #include "rt2800pci.h"
0036 
0037 /*
0038  * Allow hardware encryption to be disabled.
0039  */
0040 static bool modparam_nohwcrypt = false;
0041 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
0042 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
0043 
0044 static bool rt2800pci_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
0045 {
0046     return modparam_nohwcrypt;
0047 }
0048 
0049 static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
0050 {
0051     unsigned int i;
0052     u32 reg;
0053 
0054     /*
0055      * SOC devices don't support MCU requests.
0056      */
0057     if (rt2x00_is_soc(rt2x00dev))
0058         return;
0059 
0060     for (i = 0; i < 200; i++) {
0061         reg = rt2x00mmio_register_read(rt2x00dev, H2M_MAILBOX_CID);
0062 
0063         if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
0064             (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
0065             (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
0066             (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
0067             break;
0068 
0069         udelay(REGISTER_BUSY_DELAY);
0070     }
0071 
0072     if (i == 200)
0073         rt2x00_err(rt2x00dev, "MCU request failed, no response from hardware\n");
0074 
0075     rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
0076     rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
0077 }
0078 
0079 static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
0080 {
0081     struct rt2x00_dev *rt2x00dev = eeprom->data;
0082     u32 reg;
0083 
0084     reg = rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR);
0085 
0086     eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
0087     eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
0088     eeprom->reg_data_clock =
0089         !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
0090     eeprom->reg_chip_select =
0091         !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
0092 }
0093 
0094 static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
0095 {
0096     struct rt2x00_dev *rt2x00dev = eeprom->data;
0097     u32 reg = 0;
0098 
0099     rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
0100     rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
0101     rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
0102                !!eeprom->reg_data_clock);
0103     rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
0104                !!eeprom->reg_chip_select);
0105 
0106     rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg);
0107 }
0108 
0109 static int rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
0110 {
0111     struct eeprom_93cx6 eeprom;
0112     u32 reg;
0113 
0114     reg = rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR);
0115 
0116     eeprom.data = rt2x00dev;
0117     eeprom.register_read = rt2800pci_eepromregister_read;
0118     eeprom.register_write = rt2800pci_eepromregister_write;
0119     switch (rt2x00_get_field32(reg, E2PROM_CSR_TYPE))
0120     {
0121     case 0:
0122         eeprom.width = PCI_EEPROM_WIDTH_93C46;
0123         break;
0124     case 1:
0125         eeprom.width = PCI_EEPROM_WIDTH_93C66;
0126         break;
0127     default:
0128         eeprom.width = PCI_EEPROM_WIDTH_93C86;
0129         break;
0130     }
0131     eeprom.reg_data_in = 0;
0132     eeprom.reg_data_out = 0;
0133     eeprom.reg_data_clock = 0;
0134     eeprom.reg_chip_select = 0;
0135 
0136     eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
0137                    EEPROM_SIZE / sizeof(u16));
0138 
0139     return 0;
0140 }
0141 
0142 static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
0143 {
0144     return rt2800_efuse_detect(rt2x00dev);
0145 }
0146 
0147 static inline int rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
0148 {
0149     return rt2800_read_eeprom_efuse(rt2x00dev);
0150 }
0151 
0152 /*
0153  * Firmware functions
0154  */
0155 static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
0156 {
0157     /*
0158      * Chip rt3290 use specific 4KB firmware named rt3290.bin.
0159      */
0160     if (rt2x00_rt(rt2x00dev, RT3290))
0161         return FIRMWARE_RT3290;
0162     else
0163         return FIRMWARE_RT2860;
0164 }
0165 
0166 static int rt2800pci_write_firmware(struct rt2x00_dev *rt2x00dev,
0167                     const u8 *data, const size_t len)
0168 {
0169     u32 reg;
0170 
0171     /*
0172      * enable Host program ram write selection
0173      */
0174     reg = 0;
0175     rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
0176     rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
0177 
0178     /*
0179      * Write firmware to device.
0180      */
0181     rt2x00mmio_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
0182                        data, len);
0183 
0184     rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
0185     rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
0186 
0187     rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
0188     rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
0189 
0190     return 0;
0191 }
0192 
0193 /*
0194  * Device state switch handlers.
0195  */
0196 static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
0197 {
0198     int retval;
0199 
0200     retval = rt2800mmio_enable_radio(rt2x00dev);
0201     if (retval)
0202         return retval;
0203 
0204     /* After resume MCU_BOOT_SIGNAL will trash these. */
0205     rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
0206     rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
0207 
0208     rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_RADIO_OFF, 0xff, 0x02);
0209     rt2800pci_mcu_status(rt2x00dev, TOKEN_RADIO_OFF);
0210 
0211     rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP, 0, 0);
0212     rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
0213 
0214     return retval;
0215 }
0216 
0217 static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
0218                    enum dev_state state)
0219 {
0220     if (state == STATE_AWAKE) {
0221         rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP,
0222                    0, 0x02);
0223         rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
0224     } else if (state == STATE_SLEEP) {
0225         rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS,
0226                       0xffffffff);
0227         rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID,
0228                       0xffffffff);
0229         rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_SLEEP,
0230                    0xff, 0x01);
0231     }
0232 
0233     return 0;
0234 }
0235 
0236 static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
0237                       enum dev_state state)
0238 {
0239     int retval = 0;
0240 
0241     switch (state) {
0242     case STATE_RADIO_ON:
0243         retval = rt2800pci_enable_radio(rt2x00dev);
0244         break;
0245     case STATE_RADIO_OFF:
0246         /*
0247          * After the radio has been disabled, the device should
0248          * be put to sleep for powersaving.
0249          */
0250         rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
0251         break;
0252     case STATE_RADIO_IRQ_ON:
0253     case STATE_RADIO_IRQ_OFF:
0254         rt2800mmio_toggle_irq(rt2x00dev, state);
0255         break;
0256     case STATE_DEEP_SLEEP:
0257     case STATE_SLEEP:
0258     case STATE_STANDBY:
0259     case STATE_AWAKE:
0260         retval = rt2800pci_set_state(rt2x00dev, state);
0261         break;
0262     default:
0263         retval = -ENOTSUPP;
0264         break;
0265     }
0266 
0267     if (unlikely(retval))
0268         rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
0269                state, retval);
0270 
0271     return retval;
0272 }
0273 
0274 /*
0275  * Device probe functions.
0276  */
0277 static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
0278 {
0279     int retval;
0280 
0281     if (rt2800pci_efuse_detect(rt2x00dev))
0282         retval = rt2800pci_read_eeprom_efuse(rt2x00dev);
0283     else
0284         retval = rt2800pci_read_eeprom_pci(rt2x00dev);
0285 
0286     return retval;
0287 }
0288 
0289 static const struct ieee80211_ops rt2800pci_mac80211_ops = {
0290     .tx         = rt2x00mac_tx,
0291     .start          = rt2x00mac_start,
0292     .stop           = rt2x00mac_stop,
0293     .add_interface      = rt2x00mac_add_interface,
0294     .remove_interface   = rt2x00mac_remove_interface,
0295     .config         = rt2x00mac_config,
0296     .configure_filter   = rt2x00mac_configure_filter,
0297     .set_key        = rt2x00mac_set_key,
0298     .sw_scan_start      = rt2x00mac_sw_scan_start,
0299     .sw_scan_complete   = rt2x00mac_sw_scan_complete,
0300     .get_stats      = rt2x00mac_get_stats,
0301     .get_key_seq        = rt2800_get_key_seq,
0302     .set_rts_threshold  = rt2800_set_rts_threshold,
0303     .sta_add        = rt2800_sta_add,
0304     .sta_remove     = rt2800_sta_remove,
0305     .bss_info_changed   = rt2x00mac_bss_info_changed,
0306     .conf_tx        = rt2800_conf_tx,
0307     .get_tsf        = rt2800_get_tsf,
0308     .rfkill_poll        = rt2x00mac_rfkill_poll,
0309     .ampdu_action       = rt2800_ampdu_action,
0310     .flush          = rt2x00mac_flush,
0311     .get_survey     = rt2800_get_survey,
0312     .get_ringparam      = rt2x00mac_get_ringparam,
0313     .tx_frames_pending  = rt2x00mac_tx_frames_pending,
0314     .reconfig_complete  = rt2x00mac_reconfig_complete,
0315 };
0316 
0317 static const struct rt2800_ops rt2800pci_rt2800_ops = {
0318     .register_read      = rt2x00mmio_register_read,
0319     .register_read_lock = rt2x00mmio_register_read, /* same for PCI */
0320     .register_write     = rt2x00mmio_register_write,
0321     .register_write_lock    = rt2x00mmio_register_write, /* same for PCI */
0322     .register_multiread = rt2x00mmio_register_multiread,
0323     .register_multiwrite    = rt2x00mmio_register_multiwrite,
0324     .regbusy_read       = rt2x00mmio_regbusy_read,
0325     .read_eeprom        = rt2800pci_read_eeprom,
0326     .hwcrypt_disabled   = rt2800pci_hwcrypt_disabled,
0327     .drv_write_firmware = rt2800pci_write_firmware,
0328     .drv_init_registers = rt2800mmio_init_registers,
0329     .drv_get_txwi       = rt2800mmio_get_txwi,
0330     .drv_get_dma_done   = rt2800mmio_get_dma_done,
0331 };
0332 
0333 static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
0334     .irq_handler        = rt2800mmio_interrupt,
0335     .txstatus_tasklet   = rt2800mmio_txstatus_tasklet,
0336     .pretbtt_tasklet    = rt2800mmio_pretbtt_tasklet,
0337     .tbtt_tasklet       = rt2800mmio_tbtt_tasklet,
0338     .rxdone_tasklet     = rt2800mmio_rxdone_tasklet,
0339     .autowake_tasklet   = rt2800mmio_autowake_tasklet,
0340     .probe_hw       = rt2800mmio_probe_hw,
0341     .get_firmware_name  = rt2800pci_get_firmware_name,
0342     .check_firmware     = rt2800_check_firmware,
0343     .load_firmware      = rt2800_load_firmware,
0344     .initialize     = rt2x00mmio_initialize,
0345     .uninitialize       = rt2x00mmio_uninitialize,
0346     .get_entry_state    = rt2800mmio_get_entry_state,
0347     .clear_entry        = rt2800mmio_clear_entry,
0348     .set_device_state   = rt2800pci_set_device_state,
0349     .rfkill_poll        = rt2800_rfkill_poll,
0350     .link_stats     = rt2800_link_stats,
0351     .reset_tuner        = rt2800_reset_tuner,
0352     .link_tuner     = rt2800_link_tuner,
0353     .gain_calibration   = rt2800_gain_calibration,
0354     .vco_calibration    = rt2800_vco_calibration,
0355     .watchdog       = rt2800_watchdog,
0356     .start_queue        = rt2800mmio_start_queue,
0357     .kick_queue     = rt2800mmio_kick_queue,
0358     .stop_queue     = rt2800mmio_stop_queue,
0359     .flush_queue        = rt2800mmio_flush_queue,
0360     .write_tx_desc      = rt2800mmio_write_tx_desc,
0361     .write_tx_data      = rt2800_write_tx_data,
0362     .write_beacon       = rt2800_write_beacon,
0363     .clear_beacon       = rt2800_clear_beacon,
0364     .fill_rxdone        = rt2800mmio_fill_rxdone,
0365     .config_shared_key  = rt2800_config_shared_key,
0366     .config_pairwise_key    = rt2800_config_pairwise_key,
0367     .config_filter      = rt2800_config_filter,
0368     .config_intf        = rt2800_config_intf,
0369     .config_erp     = rt2800_config_erp,
0370     .config_ant     = rt2800_config_ant,
0371     .config         = rt2800_config,
0372     .pre_reset_hw       = rt2800_pre_reset_hw,
0373 };
0374 
0375 static const struct rt2x00_ops rt2800pci_ops = {
0376     .name           = KBUILD_MODNAME,
0377     .drv_data_size      = sizeof(struct rt2800_drv_data),
0378     .max_ap_intf        = 8,
0379     .eeprom_size        = EEPROM_SIZE,
0380     .rf_size        = RF_SIZE,
0381     .tx_queues      = NUM_TX_QUEUES,
0382     .queue_init     = rt2800mmio_queue_init,
0383     .lib            = &rt2800pci_rt2x00_ops,
0384     .drv            = &rt2800pci_rt2800_ops,
0385     .hw         = &rt2800pci_mac80211_ops,
0386 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
0387     .debugfs        = &rt2800_rt2x00debug,
0388 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
0389 };
0390 
0391 /*
0392  * RT2800pci module information.
0393  */
0394 static const struct pci_device_id rt2800pci_device_table[] = {
0395     { PCI_DEVICE(0x1814, 0x0601) },
0396     { PCI_DEVICE(0x1814, 0x0681) },
0397     { PCI_DEVICE(0x1814, 0x0701) },
0398     { PCI_DEVICE(0x1814, 0x0781) },
0399     { PCI_DEVICE(0x1814, 0x3090) },
0400     { PCI_DEVICE(0x1814, 0x3091) },
0401     { PCI_DEVICE(0x1814, 0x3092) },
0402     { PCI_DEVICE(0x1432, 0x7708) },
0403     { PCI_DEVICE(0x1432, 0x7727) },
0404     { PCI_DEVICE(0x1432, 0x7728) },
0405     { PCI_DEVICE(0x1432, 0x7738) },
0406     { PCI_DEVICE(0x1432, 0x7748) },
0407     { PCI_DEVICE(0x1432, 0x7758) },
0408     { PCI_DEVICE(0x1432, 0x7768) },
0409     { PCI_DEVICE(0x1462, 0x891a) },
0410     { PCI_DEVICE(0x1a3b, 0x1059) },
0411 #ifdef CONFIG_RT2800PCI_RT3290
0412     { PCI_DEVICE(0x1814, 0x3290) },
0413 #endif
0414 #ifdef CONFIG_RT2800PCI_RT33XX
0415     { PCI_DEVICE(0x1814, 0x3390) },
0416 #endif
0417 #ifdef CONFIG_RT2800PCI_RT35XX
0418     { PCI_DEVICE(0x1432, 0x7711) },
0419     { PCI_DEVICE(0x1432, 0x7722) },
0420     { PCI_DEVICE(0x1814, 0x3060) },
0421     { PCI_DEVICE(0x1814, 0x3062) },
0422     { PCI_DEVICE(0x1814, 0x3562) },
0423     { PCI_DEVICE(0x1814, 0x3592) },
0424     { PCI_DEVICE(0x1814, 0x3593) },
0425     { PCI_DEVICE(0x1814, 0x359f) },
0426 #endif
0427 #ifdef CONFIG_RT2800PCI_RT53XX
0428     { PCI_DEVICE(0x1814, 0x5360) },
0429     { PCI_DEVICE(0x1814, 0x5362) },
0430     { PCI_DEVICE(0x1814, 0x5390) },
0431     { PCI_DEVICE(0x1814, 0x5392) },
0432     { PCI_DEVICE(0x1814, 0x539a) },
0433     { PCI_DEVICE(0x1814, 0x539b) },
0434     { PCI_DEVICE(0x1814, 0x539f) },
0435 #endif
0436     { 0, }
0437 };
0438 
0439 MODULE_AUTHOR(DRV_PROJECT);
0440 MODULE_VERSION(DRV_VERSION);
0441 MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
0442 MODULE_FIRMWARE(FIRMWARE_RT2860);
0443 MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
0444 MODULE_LICENSE("GPL");
0445 
0446 static int rt2800pci_probe(struct pci_dev *pci_dev,
0447                const struct pci_device_id *id)
0448 {
0449     return rt2x00pci_probe(pci_dev, &rt2800pci_ops);
0450 }
0451 
0452 static struct pci_driver rt2800pci_driver = {
0453     .name       = KBUILD_MODNAME,
0454     .id_table   = rt2800pci_device_table,
0455     .probe      = rt2800pci_probe,
0456     .remove     = rt2x00pci_remove,
0457     .driver.pm  = &rt2x00pci_pm_ops,
0458 };
0459 
0460 module_pci_driver(rt2800pci_driver);
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