0001
0002
0003
0004 #ifndef _QTN_HW_IDS_H_
0005 #define _QTN_HW_IDS_H_
0006
0007 #include <linux/pci_ids.h>
0008
0009 #define PCIE_VENDOR_ID_QUANTENNA (0x1bb5)
0010
0011
0012
0013 #define PCIE_DEVICE_ID_QSR (0x0008)
0014
0015 #define QTN_REG_SYS_CTRL_CSR 0x14
0016 #define QTN_CHIP_ID_MASK 0xF0
0017 #define QTN_CHIP_ID_TOPAZ 0x40
0018 #define QTN_CHIP_ID_PEARL 0x50
0019 #define QTN_CHIP_ID_PEARL_B 0x60
0020 #define QTN_CHIP_ID_PEARL_C 0x70
0021
0022
0023
0024 #define QTN_PCI_PEARL_FW_NAME "qtn/fmac_qsr10g.img"
0025 #define QTN_PCI_TOPAZ_FW_NAME "qtn/fmac_qsr1000.img"
0026 #define QTN_PCI_TOPAZ_BOOTLD_NAME "qtn/uboot_qsr1000.img"
0027
0028 static inline unsigned int qtnf_chip_id_get(const void __iomem *regs_base)
0029 {
0030 u32 board_rev = readl(regs_base + QTN_REG_SYS_CTRL_CSR);
0031
0032 return board_rev & QTN_CHIP_ID_MASK;
0033 }
0034
0035 #endif