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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2021 pureLiFi
0004  */
0005 
0006 #ifndef PLFXLC_MAC_H
0007 #define PLFXLC_MAC_H
0008 
0009 #include <linux/kernel.h>
0010 #include <net/mac80211.h>
0011 
0012 #include "chip.h"
0013 
0014 #define PURELIFI_CCK                  0x00
0015 #define PURELIFI_OFDM                 0x10
0016 #define PURELIFI_CCK_PREA_SHORT       0x20
0017 
0018 #define PURELIFI_OFDM_PLCP_RATE_6M  0xb
0019 #define PURELIFI_OFDM_PLCP_RATE_9M  0xf
0020 #define PURELIFI_OFDM_PLCP_RATE_12M 0xa
0021 #define PURELIFI_OFDM_PLCP_RATE_18M 0xe
0022 #define PURELIFI_OFDM_PLCP_RATE_24M 0x9
0023 #define PURELIFI_OFDM_PLCP_RATE_36M 0xd
0024 #define PURELIFI_OFDM_PLCP_RATE_48M 0x8
0025 #define PURELIFI_OFDM_PLCP_RATE_54M 0xc
0026 
0027 #define PURELIFI_CCK_RATE_1M    (PURELIFI_CCK | 0x00)
0028 #define PURELIFI_CCK_RATE_2M    (PURELIFI_CCK | 0x01)
0029 #define PURELIFI_CCK_RATE_5_5M  (PURELIFI_CCK | 0x02)
0030 #define PURELIFI_CCK_RATE_11M   (PURELIFI_CCK | 0x03)
0031 #define PURELIFI_OFDM_RATE_6M   (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_6M)
0032 #define PURELIFI_OFDM_RATE_9M   (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_9M)
0033 #define PURELIFI_OFDM_RATE_12M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_12M)
0034 #define PURELIFI_OFDM_RATE_18M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_18M)
0035 #define PURELIFI_OFDM_RATE_24M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_24M)
0036 #define PURELIFI_OFDM_RATE_36M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_36M)
0037 #define PURELIFI_OFDM_RATE_48M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_48M)
0038 #define PURELIFI_OFDM_RATE_54M  (PURELIFI_OFDM | PURELIFI_OFDM_PLCP_RATE_54M)
0039 
0040 #define PURELIFI_RX_ERROR       0x80
0041 #define PURELIFI_RX_CRC32_ERROR     0x10
0042 
0043 #define PLF_REGDOMAIN_FCC   0x10
0044 #define PLF_REGDOMAIN_IC    0x20
0045 #define PLF_REGDOMAIN_ETSI  0x30
0046 #define PLF_REGDOMAIN_SPAIN 0x31
0047 #define PLF_REGDOMAIN_FRANCE    0x32
0048 #define PLF_REGDOMAIN_JAPAN_2   0x40
0049 #define PLF_REGDOMAIN_JAPAN 0x41
0050 #define PLF_REGDOMAIN_JAPAN_3   0x49
0051 
0052 #define PLF_RX_ERROR        0x80
0053 #define PLF_RX_CRC32_ERROR  0x10
0054 
0055 enum {
0056     MODULATION_RATE_BPSK_1_2 = 0,
0057     MODULATION_RATE_BPSK_3_4,
0058     MODULATION_RATE_QPSK_1_2,
0059     MODULATION_RATE_QPSK_3_4,
0060     MODULATION_RATE_QAM16_1_2,
0061     MODULATION_RATE_QAM16_3_4,
0062     MODULATION_RATE_QAM64_1_2,
0063     MODULATION_RATE_QAM64_3_4,
0064     MODULATION_RATE_AUTO,
0065     MODULATION_RATE_NUM
0066 };
0067 
0068 #define plfxlc_mac_dev(mac) plfxlc_chip_dev(&(mac)->chip)
0069 
0070 #define PURELIFI_MAC_STATS_BUFFER_SIZE 16
0071 #define PURELIFI_MAC_MAX_ACK_WAITERS 50
0072 
0073 struct plfxlc_ctrlset {
0074     /* id should be plf_usb_req_enum */
0075     __be32      id;
0076     __be32      len;
0077     u8      modulation;
0078     u8      control;
0079     u8      service;
0080     u8      pad;
0081     __le16      packet_length;
0082     __le16      current_length;
0083     __le16      next_frame_length;
0084     __le16      tx_length;
0085     __be32      payload_len_nw;
0086 } __packed;
0087 
0088 /* overlay */
0089 struct plfxlc_header {
0090     struct plfxlc_ctrlset plf_ctrl;
0091     u32    frametype;
0092     u8    *dmac;
0093 } __packed;
0094 
0095 struct tx_status {
0096     u8 type;
0097     u8 id;
0098     u8 rate;
0099     u8 pad;
0100     u8 mac[ETH_ALEN];
0101     u8 retry;
0102     u8 failure;
0103 } __packed;
0104 
0105 struct beacon {
0106     struct delayed_work watchdog_work;
0107     struct sk_buff *cur_beacon;
0108     unsigned long last_update;
0109     u16 interval;
0110     u8 period;
0111 };
0112 
0113 enum plfxlc_device_flags {
0114     PURELIFI_DEVICE_RUNNING,
0115 };
0116 
0117 struct plfxlc_mac {
0118     struct ieee80211_hw *hw;
0119     struct ieee80211_vif *vif;
0120     struct beacon beacon;
0121     struct work_struct set_rts_cts_work;
0122     struct work_struct process_intr;
0123     struct plfxlc_mc_hash multicast_hash;
0124     struct sk_buff_head ack_wait_queue;
0125     struct ieee80211_channel channels[14];
0126     struct ieee80211_rate rates[12];
0127     struct ieee80211_supported_band band;
0128     struct plfxlc_chip chip;
0129     spinlock_t lock; /* lock for mac data */
0130     u8 intr_buffer[USB_MAX_EP_INT_BUFFER];
0131     char serial_number[PURELIFI_SERIAL_LEN];
0132     unsigned char hw_address[ETH_ALEN];
0133     u8 default_regdomain;
0134     unsigned long flags;
0135     bool pass_failed_fcs;
0136     bool pass_ctrl;
0137     bool ack_pending;
0138     int ack_signal;
0139     int associated;
0140     u8 regdomain;
0141     u8 channel;
0142     int type;
0143     u64 crc_errors;
0144     u64 rssi;
0145 };
0146 
0147 static inline struct plfxlc_mac *
0148 plfxlc_hw_mac(struct ieee80211_hw *hw)
0149 {
0150     return hw->priv;
0151 }
0152 
0153 static inline struct plfxlc_mac *
0154 plfxlc_chip_to_mac(struct plfxlc_chip *chip)
0155 {
0156     return container_of(chip, struct plfxlc_mac, chip);
0157 }
0158 
0159 static inline struct plfxlc_mac *
0160 plfxlc_usb_to_mac(struct plfxlc_usb *usb)
0161 {
0162     return plfxlc_chip_to_mac(plfxlc_usb_to_chip(usb));
0163 }
0164 
0165 static inline u8 *plfxlc_mac_get_perm_addr(struct plfxlc_mac *mac)
0166 {
0167     return mac->hw->wiphy->perm_addr;
0168 }
0169 
0170 struct ieee80211_hw *plfxlc_mac_alloc_hw(struct usb_interface *intf);
0171 void plfxlc_mac_release(struct plfxlc_mac *mac);
0172 
0173 int plfxlc_mac_preinit_hw(struct ieee80211_hw *hw, const u8 *hw_address);
0174 int plfxlc_mac_init_hw(struct ieee80211_hw *hw);
0175 
0176 int plfxlc_mac_rx(struct ieee80211_hw *hw, const u8 *buffer,
0177           unsigned int length);
0178 void plfxlc_mac_tx_failed(struct urb *urb);
0179 void plfxlc_mac_tx_to_dev(struct sk_buff *skb, int error);
0180 int plfxlc_op_start(struct ieee80211_hw *hw);
0181 void plfxlc_op_stop(struct ieee80211_hw *hw);
0182 int plfxlc_restore_settings(struct plfxlc_mac *mac);
0183 
0184 #endif /* PLFXLC_MAC_H */