mediatek/mt7601u/mcu.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
0004  * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
0005  */
0006
0007 #ifndef __MT7601U_MCU_H
0008 #define __MT7601U_MCU_H
0009
0010 struct mt7601u_dev;
0011
0012 /* Register definitions */
0013 #define MT_MCU_RESET_CTL        0x070C
0014 #define MT_MCU_INT_LEVEL        0x0718
0015 #define MT_MCU_COM_REG0         0x0730
0016 #define MT_MCU_COM_REG1         0x0734
0017 #define MT_MCU_COM_REG2         0x0738
0018 #define MT_MCU_COM_REG3         0x073C
0019
0020 #define MT_MCU_IVB_SIZE         0x40
0021 #define MT_MCU_DLM_OFFSET       0x80000
0022
0023 #define MT_MCU_MEMMAP_WLAN      0x00410000
0024 #define MT_MCU_MEMMAP_BBP       0x40000000
0025 #define MT_MCU_MEMMAP_RF        0x80000000
0026
0027 #define INBAND_PACKET_MAX_LEN       192
0028
0029 enum mcu_cmd {
0030     CMD_FUN_SET_OP = 1,
0031     CMD_LOAD_CR = 2,
0032     CMD_INIT_GAIN_OP = 3,
0033     CMD_DYNC_VGA_OP = 6,
0034     CMD_TDLS_CH_SW = 7,
0035     CMD_BURST_WRITE = 8,
0036     CMD_READ_MODIFY_WRITE = 9,
0037     CMD_RANDOM_READ = 10,
0038     CMD_BURST_READ = 11,
0039     CMD_RANDOM_WRITE = 12,
0040     CMD_LED_MODE_OP = 16,
0041     CMD_POWER_SAVING_OP = 20,
0042     CMD_WOW_CONFIG = 21,
0043     CMD_WOW_QUERY = 22,
0044     CMD_WOW_FEATURE = 24,
0045     CMD_CARRIER_DETECT_OP = 28,
0046     CMD_RADOR_DETECT_OP = 29,
0047     CMD_SWITCH_CHANNEL_OP = 30,
0048     CMD_CALIBRATION_OP = 31,
0049     CMD_BEACON_OP = 32,
0050     CMD_ANTENNA_OP = 33,
0051 };
0052
0053 enum mcu_function {
0054     Q_SELECT = 1,
0055     ATOMIC_TSSI_SETTING = 5,
0056 };
0057
0058 enum mcu_power_mode {
0059     RADIO_OFF = 0x30,
0060     RADIO_ON = 0x31,
0061     RADIO_OFF_AUTO_WAKEUP = 0x32,
0062     RADIO_OFF_ADVANCE = 0x33,
0063     RADIO_ON_ADVANCE = 0x34,
0064 };
0065
0066 enum mcu_calibrate {
0067     MCU_CAL_R = 1,
0068     MCU_CAL_DCOC,
0069     MCU_CAL_LC,
0070     MCU_CAL_LOFT,
0071     MCU_CAL_TXIQ,
0072     MCU_CAL_BW,
0073     MCU_CAL_DPD,
0074     MCU_CAL_RXIQ,
0075     MCU_CAL_TXDCOC,
0076 };
0077
0078 int mt7601u_mcu_init(struct mt7601u_dev *dev);
0079 int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev);
0080 void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev);
0081
0082 int
0083 mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val);
0084 int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga);
0085
0086 #endif