0001
0002
0003
0004
0005
0006
0007
0008 #include <linux/kernel.h>
0009 #include <linux/firmware.h>
0010 #include <linux/delay.h>
0011 #include <linux/usb.h>
0012 #include <linux/skbuff.h>
0013
0014 #include "mt7601u.h"
0015 #include "dma.h"
0016 #include "mcu.h"
0017 #include "usb.h"
0018 #include "trace.h"
0019
0020 #define MCU_FW_URB_MAX_PAYLOAD 0x3800
0021 #define MCU_FW_URB_SIZE (MCU_FW_URB_MAX_PAYLOAD + 12)
0022 #define MCU_RESP_URB_SIZE 1024
0023
0024 static inline int firmware_running(struct mt7601u_dev *dev)
0025 {
0026 return mt7601u_rr(dev, MT_MCU_COM_REG0) == 1;
0027 }
0028
0029 static inline void skb_put_le32(struct sk_buff *skb, u32 val)
0030 {
0031 put_unaligned_le32(val, skb_put(skb, 4));
0032 }
0033
0034 static inline void mt7601u_dma_skb_wrap_cmd(struct sk_buff *skb,
0035 u8 seq, enum mcu_cmd cmd)
0036 {
0037 WARN_ON(mt7601u_dma_skb_wrap(skb, CPU_TX_PORT, DMA_COMMAND,
0038 FIELD_PREP(MT_TXD_CMD_INFO_SEQ, seq) |
0039 FIELD_PREP(MT_TXD_CMD_INFO_TYPE, cmd)));
0040 }
0041
0042 static inline void trace_mt_mcu_msg_send_cs(struct mt7601u_dev *dev,
0043 struct sk_buff *skb, bool need_resp)
0044 {
0045 u32 i, csum = 0;
0046
0047 for (i = 0; i < skb->len / 4; i++)
0048 csum ^= get_unaligned_le32(skb->data + i * 4);
0049
0050 trace_mt_mcu_msg_send(dev, skb, csum, need_resp);
0051 }
0052
0053 static struct sk_buff *mt7601u_mcu_msg_alloc(const void *data, int len)
0054 {
0055 struct sk_buff *skb;
0056
0057 WARN_ON(len % 4);
0058
0059 skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
0060 if (skb) {
0061 skb_reserve(skb, MT_DMA_HDR_LEN);
0062 skb_put_data(skb, data, len);
0063 }
0064
0065 return skb;
0066 }
0067
0068 static int mt7601u_mcu_wait_resp(struct mt7601u_dev *dev, u8 seq)
0069 {
0070 struct urb *urb = dev->mcu.resp.urb;
0071 u32 rxfce;
0072 int urb_status, ret, i = 5;
0073
0074 while (i--) {
0075 if (!wait_for_completion_timeout(&dev->mcu.resp_cmpl,
0076 msecs_to_jiffies(300))) {
0077 dev_warn(dev->dev, "Warning: %s retrying\n", __func__);
0078 continue;
0079 }
0080
0081
0082 rxfce = get_unaligned_le32(dev->mcu.resp.buf);
0083 urb_status = urb->status * mt7601u_urb_has_error(urb);
0084
0085 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
0086 &dev->mcu.resp, GFP_KERNEL,
0087 mt7601u_complete_urb,
0088 &dev->mcu.resp_cmpl);
0089 if (ret)
0090 return ret;
0091
0092 if (urb_status)
0093 dev_err(dev->dev, "Error: MCU resp urb failed:%d\n",
0094 urb_status);
0095
0096 if (FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq &&
0097 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE)
0098 return 0;
0099
0100 dev_err(dev->dev, "Error: MCU resp evt:%lx seq:%hhx-%lx!\n",
0101 FIELD_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce),
0102 seq, FIELD_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce));
0103 }
0104
0105 dev_err(dev->dev, "Error: %s timed out\n", __func__);
0106 return -ETIMEDOUT;
0107 }
0108
0109 static int
0110 mt7601u_mcu_msg_send(struct mt7601u_dev *dev, struct sk_buff *skb,
0111 enum mcu_cmd cmd, bool wait_resp)
0112 {
0113 struct usb_device *usb_dev = mt7601u_to_usb_dev(dev);
0114 unsigned cmd_pipe = usb_sndbulkpipe(usb_dev,
0115 dev->out_eps[MT_EP_OUT_INBAND_CMD]);
0116 int sent, ret;
0117 u8 seq = 0;
0118
0119 if (test_bit(MT7601U_STATE_REMOVED, &dev->state)) {
0120 consume_skb(skb);
0121 return 0;
0122 }
0123
0124 mutex_lock(&dev->mcu.mutex);
0125
0126 if (wait_resp)
0127 while (!seq)
0128 seq = ++dev->mcu.msg_seq & 0xf;
0129
0130 mt7601u_dma_skb_wrap_cmd(skb, seq, cmd);
0131
0132 if (dev->mcu.resp_cmpl.done)
0133 dev_err(dev->dev, "Error: MCU response pre-completed!\n");
0134
0135 trace_mt_mcu_msg_send_cs(dev, skb, wait_resp);
0136 trace_mt_submit_urb_sync(dev, cmd_pipe, skb->len);
0137 ret = usb_bulk_msg(usb_dev, cmd_pipe, skb->data, skb->len, &sent, 500);
0138 if (ret) {
0139 dev_err(dev->dev, "Error: send MCU cmd failed:%d\n", ret);
0140 goto out;
0141 }
0142 if (sent != skb->len)
0143 dev_err(dev->dev, "Error: %s sent != skb->len\n", __func__);
0144
0145 if (wait_resp)
0146 ret = mt7601u_mcu_wait_resp(dev, seq);
0147 out:
0148 mutex_unlock(&dev->mcu.mutex);
0149
0150 consume_skb(skb);
0151
0152 return ret;
0153 }
0154
0155 static int mt7601u_mcu_function_select(struct mt7601u_dev *dev,
0156 enum mcu_function func, u32 val)
0157 {
0158 struct sk_buff *skb;
0159 struct {
0160 __le32 id;
0161 __le32 value;
0162 } __packed __aligned(4) msg = {
0163 .id = cpu_to_le32(func),
0164 .value = cpu_to_le32(val),
0165 };
0166
0167 skb = mt7601u_mcu_msg_alloc(&msg, sizeof(msg));
0168 if (!skb)
0169 return -ENOMEM;
0170 return mt7601u_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5);
0171 }
0172
0173 int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga)
0174 {
0175 int ret;
0176
0177 if (!test_bit(MT7601U_STATE_MCU_RUNNING, &dev->state))
0178 return 0;
0179
0180 ret = mt7601u_mcu_function_select(dev, ATOMIC_TSSI_SETTING,
0181 use_hvga);
0182 if (ret) {
0183 dev_warn(dev->dev, "Warning: MCU TSSI read kick failed\n");
0184 return ret;
0185 }
0186
0187 dev->tssi_read_trig = true;
0188
0189 return 0;
0190 }
0191
0192 int
0193 mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val)
0194 {
0195 struct sk_buff *skb;
0196 struct {
0197 __le32 id;
0198 __le32 value;
0199 } __packed __aligned(4) msg = {
0200 .id = cpu_to_le32(cal),
0201 .value = cpu_to_le32(val),
0202 };
0203
0204 skb = mt7601u_mcu_msg_alloc(&msg, sizeof(msg));
0205 if (!skb)
0206 return -ENOMEM;
0207 return mt7601u_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true);
0208 }
0209
0210 int mt7601u_write_reg_pairs(struct mt7601u_dev *dev, u32 base,
0211 const struct mt76_reg_pair *data, int n)
0212 {
0213 const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8;
0214 struct sk_buff *skb;
0215 int cnt, i, ret;
0216
0217 if (!n)
0218 return 0;
0219
0220 cnt = min(max_vals_per_cmd, n);
0221
0222 skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
0223 if (!skb)
0224 return -ENOMEM;
0225 skb_reserve(skb, MT_DMA_HDR_LEN);
0226
0227 for (i = 0; i < cnt; i++) {
0228 skb_put_le32(skb, base + data[i].reg);
0229 skb_put_le32(skb, data[i].value);
0230 }
0231
0232 ret = mt7601u_mcu_msg_send(dev, skb, CMD_RANDOM_WRITE, cnt == n);
0233 if (ret)
0234 return ret;
0235
0236 return mt7601u_write_reg_pairs(dev, base, data + cnt, n - cnt);
0237 }
0238
0239 int mt7601u_burst_write_regs(struct mt7601u_dev *dev, u32 offset,
0240 const u32 *data, int n)
0241 {
0242 const int max_regs_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1;
0243 struct sk_buff *skb;
0244 int cnt, i, ret;
0245
0246 if (!n)
0247 return 0;
0248
0249 cnt = min(max_regs_per_cmd, n);
0250
0251 skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
0252 if (!skb)
0253 return -ENOMEM;
0254 skb_reserve(skb, MT_DMA_HDR_LEN);
0255
0256 skb_put_le32(skb, MT_MCU_MEMMAP_WLAN + offset);
0257 for (i = 0; i < cnt; i++)
0258 skb_put_le32(skb, data[i]);
0259
0260 ret = mt7601u_mcu_msg_send(dev, skb, CMD_BURST_WRITE, cnt == n);
0261 if (ret)
0262 return ret;
0263
0264 return mt7601u_burst_write_regs(dev, offset + cnt * 4,
0265 data + cnt, n - cnt);
0266 }
0267
0268 struct mt76_fw_header {
0269 __le32 ilm_len;
0270 __le32 dlm_len;
0271 __le16 build_ver;
0272 __le16 fw_ver;
0273 u8 pad[4];
0274 char build_time[16];
0275 };
0276
0277 struct mt76_fw {
0278 struct mt76_fw_header hdr;
0279 u8 ivb[MT_MCU_IVB_SIZE];
0280 u8 ilm[];
0281 };
0282
0283 static int __mt7601u_dma_fw(struct mt7601u_dev *dev,
0284 const struct mt7601u_dma_buf *dma_buf,
0285 const void *data, u32 len, u32 dst_addr)
0286 {
0287 DECLARE_COMPLETION_ONSTACK(cmpl);
0288 struct mt7601u_dma_buf buf = *dma_buf;
0289 __le32 reg;
0290 u32 val;
0291 int ret;
0292
0293 reg = cpu_to_le32(FIELD_PREP(MT_TXD_INFO_TYPE, DMA_PACKET) |
0294 FIELD_PREP(MT_TXD_INFO_D_PORT, CPU_TX_PORT) |
0295 FIELD_PREP(MT_TXD_INFO_LEN, len));
0296 memcpy(buf.buf, ®, sizeof(reg));
0297 memcpy(buf.buf + sizeof(reg), data, len);
0298 memset(buf.buf + sizeof(reg) + len, 0, 8);
0299
0300 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
0301 MT_FCE_DMA_ADDR, dst_addr);
0302 if (ret)
0303 return ret;
0304 len = roundup(len, 4);
0305 ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
0306 MT_FCE_DMA_LEN, len << 16);
0307 if (ret)
0308 return ret;
0309
0310 buf.len = MT_DMA_HDR_LEN + len + 4;
0311 ret = mt7601u_usb_submit_buf(dev, USB_DIR_OUT, MT_EP_OUT_INBAND_CMD,
0312 &buf, GFP_KERNEL,
0313 mt7601u_complete_urb, &cmpl);
0314 if (ret)
0315 return ret;
0316
0317 if (!wait_for_completion_timeout(&cmpl, msecs_to_jiffies(1000))) {
0318 dev_err(dev->dev, "Error: firmware upload timed out\n");
0319 usb_kill_urb(buf.urb);
0320 return -ETIMEDOUT;
0321 }
0322 if (mt7601u_urb_has_error(buf.urb)) {
0323 dev_err(dev->dev, "Error: firmware upload urb failed:%d\n",
0324 buf.urb->status);
0325 return buf.urb->status;
0326 }
0327
0328 val = mt7601u_rr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX);
0329 val++;
0330 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val);
0331
0332 return 0;
0333 }
0334
0335 static int
0336 mt7601u_dma_fw(struct mt7601u_dev *dev, struct mt7601u_dma_buf *dma_buf,
0337 const void *data, int len, u32 dst_addr)
0338 {
0339 int n, ret;
0340
0341 if (len == 0)
0342 return 0;
0343
0344 n = min(MCU_FW_URB_MAX_PAYLOAD, len);
0345 ret = __mt7601u_dma_fw(dev, dma_buf, data, n, dst_addr);
0346 if (ret)
0347 return ret;
0348
0349 if (!mt76_poll_msec(dev, MT_MCU_COM_REG1, BIT(31), BIT(31), 500))
0350 return -ETIMEDOUT;
0351
0352 return mt7601u_dma_fw(dev, dma_buf, data + n, len - n, dst_addr + n);
0353 }
0354
0355 static int
0356 mt7601u_upload_firmware(struct mt7601u_dev *dev, const struct mt76_fw *fw)
0357 {
0358 struct mt7601u_dma_buf dma_buf;
0359 void *ivb;
0360 u32 ilm_len, dlm_len;
0361 int i, ret;
0362
0363 ivb = kmemdup(fw->ivb, sizeof(fw->ivb), GFP_KERNEL);
0364 if (!ivb)
0365 return -ENOMEM;
0366 if (mt7601u_usb_alloc_buf(dev, MCU_FW_URB_SIZE, &dma_buf)) {
0367 ret = -ENOMEM;
0368 goto error;
0369 }
0370
0371 ilm_len = le32_to_cpu(fw->hdr.ilm_len) - sizeof(fw->ivb);
0372 dev_dbg(dev->dev, "loading FW - ILM %u + IVB %zu\n",
0373 ilm_len, sizeof(fw->ivb));
0374 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm, ilm_len, sizeof(fw->ivb));
0375 if (ret)
0376 goto error;
0377
0378 dlm_len = le32_to_cpu(fw->hdr.dlm_len);
0379 dev_dbg(dev->dev, "loading FW - DLM %u\n", dlm_len);
0380 ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm + ilm_len,
0381 dlm_len, MT_MCU_DLM_OFFSET);
0382 if (ret)
0383 goto error;
0384
0385 ret = mt7601u_vendor_request(dev, MT_VEND_DEV_MODE, USB_DIR_OUT,
0386 0x12, 0, ivb, sizeof(fw->ivb));
0387 if (ret < 0)
0388 goto error;
0389 ret = 0;
0390
0391 for (i = 100; i && !firmware_running(dev); i--)
0392 msleep(10);
0393 if (!i) {
0394 ret = -ETIMEDOUT;
0395 goto error;
0396 }
0397
0398 dev_dbg(dev->dev, "Firmware running!\n");
0399 error:
0400 kfree(ivb);
0401 mt7601u_usb_free_buf(dev, &dma_buf);
0402
0403 return ret;
0404 }
0405
0406 static int mt7601u_load_firmware(struct mt7601u_dev *dev)
0407 {
0408 const struct firmware *fw;
0409 const struct mt76_fw_header *hdr;
0410 int len, ret;
0411 u32 val;
0412
0413 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
0414 MT_USB_DMA_CFG_TX_BULK_EN));
0415
0416 if (firmware_running(dev))
0417 return firmware_request_cache(dev->dev, MT7601U_FIRMWARE);
0418
0419 ret = request_firmware(&fw, MT7601U_FIRMWARE, dev->dev);
0420 if (ret)
0421 return ret;
0422
0423 if (!fw || !fw->data || fw->size < sizeof(*hdr))
0424 goto err_inv_fw;
0425
0426 hdr = (const struct mt76_fw_header *) fw->data;
0427
0428 if (le32_to_cpu(hdr->ilm_len) <= MT_MCU_IVB_SIZE)
0429 goto err_inv_fw;
0430
0431 len = sizeof(*hdr);
0432 len += le32_to_cpu(hdr->ilm_len);
0433 len += le32_to_cpu(hdr->dlm_len);
0434
0435 if (fw->size != len)
0436 goto err_inv_fw;
0437
0438 val = le16_to_cpu(hdr->fw_ver);
0439 dev_info(dev->dev,
0440 "Firmware Version: %d.%d.%02d Build: %x Build time: %.16s\n",
0441 (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf,
0442 le16_to_cpu(hdr->build_ver), hdr->build_time);
0443
0444 len = le32_to_cpu(hdr->ilm_len);
0445
0446 mt7601u_wr(dev, 0x94c, 0);
0447 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 0);
0448
0449 mt7601u_vendor_reset(dev);
0450 msleep(5);
0451
0452 mt7601u_wr(dev, 0xa44, 0);
0453 mt7601u_wr(dev, 0x230, 0x84210);
0454 mt7601u_wr(dev, 0x400, 0x80c00);
0455 mt7601u_wr(dev, 0x800, 1);
0456
0457 mt7601u_rmw(dev, MT_PBF_CFG, 0, (MT_PBF_CFG_TX0Q_EN |
0458 MT_PBF_CFG_TX1Q_EN |
0459 MT_PBF_CFG_TX2Q_EN |
0460 MT_PBF_CFG_TX3Q_EN));
0461
0462 mt7601u_wr(dev, MT_FCE_PSE_CTRL, 1);
0463
0464 mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
0465 MT_USB_DMA_CFG_TX_BULK_EN));
0466 val = mt76_set(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_TX_CLR);
0467 val &= ~MT_USB_DMA_CFG_TX_CLR;
0468 mt7601u_wr(dev, MT_USB_DMA_CFG, val);
0469
0470
0471 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230);
0472
0473 mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1);
0474
0475 mt7601u_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44);
0476
0477 mt7601u_wr(dev, MT_FCE_SKIP_FS, 3);
0478
0479 ret = mt7601u_upload_firmware(dev, (const struct mt76_fw *)fw->data);
0480
0481 release_firmware(fw);
0482
0483 return ret;
0484
0485 err_inv_fw:
0486 dev_err(dev->dev, "Invalid firmware image\n");
0487 release_firmware(fw);
0488 return -ENOENT;
0489 }
0490
0491 int mt7601u_mcu_init(struct mt7601u_dev *dev)
0492 {
0493 int ret;
0494
0495 mutex_init(&dev->mcu.mutex);
0496
0497 ret = mt7601u_load_firmware(dev);
0498 if (ret)
0499 return ret;
0500
0501 set_bit(MT7601U_STATE_MCU_RUNNING, &dev->state);
0502
0503 return 0;
0504 }
0505
0506 int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev)
0507 {
0508 int ret;
0509
0510 ret = mt7601u_mcu_function_select(dev, Q_SELECT, 1);
0511 if (ret)
0512 return ret;
0513
0514 init_completion(&dev->mcu.resp_cmpl);
0515 if (mt7601u_usb_alloc_buf(dev, MCU_RESP_URB_SIZE, &dev->mcu.resp)) {
0516 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
0517 return -ENOMEM;
0518 }
0519
0520 ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
0521 &dev->mcu.resp, GFP_KERNEL,
0522 mt7601u_complete_urb, &dev->mcu.resp_cmpl);
0523 if (ret) {
0524 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
0525 return ret;
0526 }
0527
0528 return 0;
0529 }
0530
0531 void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev)
0532 {
0533 usb_kill_urb(dev->mcu.resp.urb);
0534 mt7601u_usb_free_buf(dev, &dev->mcu.resp);
0535 }