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0007 #include <linux/of.h>
0008 #include <linux/mtd/mtd.h>
0009 #include <linux/mtd/partitions.h>
0010 #include <linux/etherdevice.h>
0011 #include <asm/unaligned.h>
0012 #include "mt7601u.h"
0013 #include "eeprom.h"
0014 #include "mac.h"
0015
0016 static bool
0017 field_valid(u8 val)
0018 {
0019 return val != 0xff;
0020 }
0021
0022 static s8
0023 field_validate(u8 val)
0024 {
0025 if (!field_valid(val))
0026 return 0;
0027
0028 return val;
0029 }
0030
0031 static int
0032 mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data,
0033 enum mt7601u_eeprom_access_modes mode)
0034 {
0035 u32 val;
0036 int i;
0037
0038 val = mt76_rr(dev, MT_EFUSE_CTRL);
0039 val &= ~(MT_EFUSE_CTRL_AIN |
0040 MT_EFUSE_CTRL_MODE);
0041 val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf) |
0042 FIELD_PREP(MT_EFUSE_CTRL_MODE, mode) |
0043 MT_EFUSE_CTRL_KICK;
0044 mt76_wr(dev, MT_EFUSE_CTRL, val);
0045
0046 if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
0047 return -ETIMEDOUT;
0048
0049 val = mt76_rr(dev, MT_EFUSE_CTRL);
0050 if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) {
0051
0052
0053
0054 memset(data, 0xff, 16);
0055 return 0;
0056 }
0057
0058 for (i = 0; i < 4; i++) {
0059 val = mt76_rr(dev, MT_EFUSE_DATA(i));
0060 put_unaligned_le32(val, data + 4 * i);
0061 }
0062
0063 return 0;
0064 }
0065
0066 static int
0067 mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev)
0068 {
0069 const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16);
0070 u8 data[round_up(MT_EFUSE_USAGE_MAP_SIZE, 16)];
0071 int ret, i;
0072 u32 start = 0, end = 0, cnt_free;
0073
0074 for (i = 0; i < map_reads; i++) {
0075 ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16,
0076 data + i * 16, MT_EE_PHYSICAL_READ);
0077 if (ret)
0078 return ret;
0079 }
0080
0081 for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
0082 if (!data[i]) {
0083 if (!start)
0084 start = MT_EE_USAGE_MAP_START + i;
0085 end = MT_EE_USAGE_MAP_START + i;
0086 }
0087 cnt_free = end - start + 1;
0088
0089 if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
0090 dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n");
0091 return -EINVAL;
0092 }
0093
0094 return 0;
0095 }
0096
0097 static bool
0098 mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)
0099 {
0100 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
0101
0102 return (u16)~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN);
0103 }
0104
0105 static void
0106 mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom)
0107 {
0108 u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0);
0109 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
0110
0111 if (!field_valid(nic_conf1 & 0xff))
0112 nic_conf1 &= 0xff00;
0113
0114 dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) &&
0115 !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC);
0116
0117 if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
0118 dev_err(dev->dev,
0119 "Error: this driver does not support HW RF ctrl\n");
0120
0121 if (!field_valid(nic_conf0 >> 8))
0122 return;
0123
0124 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
0125 FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
0126 dev_err(dev->dev,
0127 "Error: device has more than 1 RX/TX stream!\n");
0128 }
0129
0130 static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev,
0131 u8 *eeprom, u8 max_pwr)
0132 {
0133 u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER];
0134
0135 if (trgt_pwr > max_pwr || !trgt_pwr) {
0136 dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n",
0137 trgt_pwr);
0138 trgt_pwr = 0x20;
0139 }
0140
0141 memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr));
0142 }
0143
0144 static void
0145 mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom)
0146 {
0147 u32 i, val;
0148 u8 max_pwr;
0149
0150 val = mt7601u_rr(dev, MT_TX_ALC_CFG_0);
0151 max_pwr = FIELD_GET(MT_TX_ALC_CFG_0_LIMIT_0, val);
0152
0153 if (mt7601u_has_tssi(dev, eeprom)) {
0154 mt7601u_set_channel_target_power(dev, eeprom, max_pwr);
0155 return;
0156 }
0157
0158 for (i = 0; i < 14; i++) {
0159 s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]);
0160
0161 if (power > max_pwr || power < 0)
0162 power = MT7601U_DEFAULT_TX_POWER;
0163
0164 dev->ee->chan_pwr[i] = power;
0165 }
0166 }
0167
0168 static void
0169 mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom)
0170 {
0171
0172
0173
0174 static const struct reg_channel_bounds chan_bounds[] = {
0175
0176 { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 },
0177 { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 },
0178
0179 { 1, 11 }, { 1, 14 }
0180 };
0181 u8 val = eeprom[MT_EE_COUNTRY_REGION];
0182 int idx = -1;
0183
0184 if (val < 8)
0185 idx = val;
0186 if (val > 31 && val < 33)
0187 idx = val - 32 + 8;
0188
0189 if (idx != -1)
0190 dev_info(dev->dev,
0191 "EEPROM country region %02x (channels %d-%d)\n",
0192 val, chan_bounds[idx].start,
0193 chan_bounds[idx].start + chan_bounds[idx].num - 1);
0194 else
0195 idx = 5;
0196
0197 dev->ee->reg = chan_bounds[idx];
0198
0199
0200
0201
0202 }
0203
0204 static void
0205 mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom)
0206 {
0207 u8 comp;
0208
0209 dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]);
0210 comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]);
0211
0212 if (comp & BIT(7))
0213 dev->ee->rf_freq_off -= comp & 0x7f;
0214 else
0215 dev->ee->rf_freq_off += comp;
0216 }
0217
0218 static void
0219 mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom)
0220 {
0221 int i;
0222 s8 *rssi_offset = dev->ee->rssi_offset;
0223
0224 for (i = 0; i < 2; i++) {
0225 rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i];
0226
0227 if (rssi_offset[i] < -10 || rssi_offset[i] > 10) {
0228 dev_warn(dev->dev,
0229 "Warning: EEPROM RSSI is invalid %02hhx\n",
0230 rssi_offset[i]);
0231 rssi_offset[i] = 0;
0232 }
0233 }
0234 }
0235
0236 static void
0237 mt7601u_extra_power_over_mac(struct mt7601u_dev *dev)
0238 {
0239 u32 val;
0240
0241 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8);
0242 val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);
0243 mt7601u_wr(dev, MT_TX_PWR_CFG_7, val);
0244
0245 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8);
0246 mt7601u_wr(dev, MT_TX_PWR_CFG_9, val);
0247 }
0248
0249 static void
0250 mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value)
0251 {
0252
0253 if (value == 0xff)
0254 return;
0255
0256 rate->raw = s6_validate(value);
0257 rate->bw20 = s6_to_int(value);
0258
0259 rate->bw40 = rate->bw20 + delta;
0260 }
0261
0262 static void
0263 mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i)
0264 {
0265 struct mt7601u_rate_power *t = &dev->ee->power_rate_table;
0266
0267 switch (i) {
0268 case 0:
0269 mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff);
0270 mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff);
0271
0272 dev->ee->real_cck_bw20[0] = t->cck[0].bw20;
0273 dev->ee->real_cck_bw20[1] = t->cck[1].bw20;
0274
0275 mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff);
0276 mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff);
0277 break;
0278 case 1:
0279 mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff);
0280 mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff);
0281 mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff);
0282 mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff);
0283 break;
0284 case 2:
0285 mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff);
0286 mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff);
0287 break;
0288 }
0289 }
0290
0291 static s8
0292 get_delta(u8 val)
0293 {
0294 s8 ret;
0295
0296 if (!field_valid(val) || !(val & BIT(7)))
0297 return 0;
0298
0299 ret = val & 0x1f;
0300 if (ret > 8)
0301 ret = 8;
0302 if (val & BIT(6))
0303 ret = -ret;
0304
0305 return ret;
0306 }
0307
0308 static void
0309 mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom)
0310 {
0311 u32 val;
0312 s8 bw40_delta;
0313 int i;
0314
0315 bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
0316
0317 for (i = 0; i < 5; i++) {
0318 val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));
0319
0320 mt7601u_save_power_rate(dev, bw40_delta, val, i);
0321
0322 if (~val)
0323 mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
0324 }
0325
0326 mt7601u_extra_power_over_mac(dev);
0327 }
0328
0329 static void
0330 mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom)
0331 {
0332 struct tssi_data *d = &dev->ee->tssi_data;
0333
0334 if (!dev->ee->tssi_enabled)
0335 return;
0336
0337 d->slope = eeprom[MT_EE_TX_TSSI_SLOPE];
0338 d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024;
0339 d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP];
0340 d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1];
0341 d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2];
0342 }
0343
0344 int
0345 mt7601u_eeprom_init(struct mt7601u_dev *dev)
0346 {
0347 u8 *eeprom;
0348 int i, ret;
0349
0350 ret = mt7601u_efuse_physical_size_check(dev);
0351 if (ret)
0352 return ret;
0353
0354 dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL);
0355 if (!dev->ee)
0356 return -ENOMEM;
0357
0358 eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL);
0359 if (!eeprom)
0360 return -ENOMEM;
0361
0362 for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) {
0363 ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ);
0364 if (ret)
0365 goto out;
0366 }
0367
0368 if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER)
0369 dev_warn(dev->dev,
0370 "Warning: unsupported EEPROM version %02hhx\n",
0371 eeprom[MT_EE_VERSION_EE]);
0372 dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n",
0373 eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]);
0374
0375 mt7601u_set_macaddr(dev, eeprom + MT_EE_MAC_ADDR);
0376 mt7601u_set_chip_cap(dev, eeprom);
0377 mt7601u_set_channel_power(dev, eeprom);
0378 mt7601u_set_country_reg(dev, eeprom);
0379 mt7601u_set_rf_freq_off(dev, eeprom);
0380 mt7601u_set_rssi_offset(dev, eeprom);
0381 dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP];
0382 dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN];
0383
0384 mt7601u_config_tx_power_per_rate(dev, eeprom);
0385
0386 mt7601u_init_tssi_params(dev, eeprom);
0387 out:
0388 kfree(eeprom);
0389 return ret;
0390 }