mt76/mt7921/pci_mcu.c

0001 // SPDX-License-Identifier: ISC
0002 /* Copyright (C) 2021 MediaTek Inc. */
0003
0004 #include "mt7921.h"
0005 #include "mcu.h"
0006
0007 int mt7921e_driver_own(struct mt7921_dev *dev)
0008 {
0009     u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0);
0010
0011     mt76_wr(dev, reg, MT_TOP_LPCR_HOST_DRV_OWN);
0012     if (!mt76_poll_msec(dev, reg, MT_TOP_LPCR_HOST_FW_OWN,
0013                 0, 500)) {
0014         dev_err(dev->mt76.dev, "Timeout for driver own\n");
0015         return -EIO;
0016     }
0017
0018     return 0;
0019 }
0020
0021 static int
0022 mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
0023             int cmd, int *seq)
0024 {
0025     struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
0026     enum mt76_mcuq_id txq = MT_MCUQ_WM;
0027     int ret;
0028
0029     ret = mt76_connac2_mcu_fill_message(mdev, skb, cmd, seq);
0030     if (ret)
0031         return ret;
0032
0033     if (cmd == MCU_UNI_CMD(HIF_CTRL) ||
0034         cmd == MCU_UNI_CMD(SUSPEND) ||
0035         cmd == MCU_UNI_CMD(OFFLOAD))
0036         mdev->mcu.timeout = HZ;
0037     else
0038         mdev->mcu.timeout = 3 * HZ;
0039
0040     if (cmd == MCU_CMD(FW_SCATTER))
0041         txq = MT_MCUQ_FWDL;
0042
0043     return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0);
0044 }
0045
0046 int mt7921e_mcu_init(struct mt7921_dev *dev)
0047 {
0048     static const struct mt76_mcu_ops mt7921_mcu_ops = {
0049         .headroom = sizeof(struct mt76_connac2_mcu_txd),
0050         .mcu_skb_send_msg = mt7921_mcu_send_message,
0051         .mcu_parse_response = mt7921_mcu_parse_response,
0052         .mcu_restart = mt76_connac_mcu_restart,
0053     };
0054     int err;
0055
0056     dev->mt76.mcu_ops = &mt7921_mcu_ops;
0057
0058     err = mt7921e_driver_own(dev);
0059     if (err)
0060         return err;
0061
0062     err = mt7921_run_firmware(dev);
0063
0064     mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
0065
0066     return err;
0067 }
0068
0069 int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
0070 {
0071     int i, err = 0;
0072
0073     for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
0074         mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN);
0075         if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL,
0076                    PCIE_LPCR_HOST_OWN_SYNC, 0, 50))
0077             break;
0078     }
0079
0080     if (i == MT7921_DRV_OWN_RETRY_COUNT) {
0081         dev_err(dev->mt76.dev, "driver own failed\n");
0082         err = -EIO;
0083     }
0084
0085     return err;
0086 }
0087
0088 int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
0089 {
0090     struct mt76_phy *mphy = &dev->mt76.phy;
0091     struct mt76_connac_pm *pm = &dev->pm;
0092     int err;
0093
0094     err = __mt7921e_mcu_drv_pmctrl(dev);
0095     if (err < 0)
0096         goto out;
0097
0098     mt7921_wpdma_reinit_cond(dev);
0099     clear_bit(MT76_STATE_PM, &mphy->state);
0100
0101     pm->stats.last_wake_event = jiffies;
0102     pm->stats.doze_time += pm->stats.last_wake_event -
0103                    pm->stats.last_doze_event;
0104 out:
0105     return err;
0106 }
0107
0108 int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev)
0109 {
0110     struct mt76_phy *mphy = &dev->mt76.phy;
0111     struct mt76_connac_pm *pm = &dev->pm;
0112     int i;
0113
0114     for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
0115         mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN);
0116         if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL,
0117                    PCIE_LPCR_HOST_OWN_SYNC, 4, 50))
0118             break;
0119     }
0120
0121     if (i == MT7921_DRV_OWN_RETRY_COUNT) {
0122         dev_err(dev->mt76.dev, "firmware own failed\n");
0123         clear_bit(MT76_STATE_PM, &mphy->state);
0124         return -EIO;
0125     }
0126
0127     pm->stats.last_doze_event = jiffies;
0128     pm->stats.awake_time += pm->stats.last_doze_event -
0129                 pm->stats.last_wake_event;
0130
0131     return 0;
0132 }