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0001 // SPDX-License-Identifier: ISC
0002 /* Copyright (C) 2020 MediaTek Inc. */
0003 
0004 #include <linux/etherdevice.h>
0005 #include <linux/hwmon.h>
0006 #include <linux/hwmon-sysfs.h>
0007 #include <linux/thermal.h>
0008 #include "mt7915.h"
0009 #include "mac.h"
0010 #include "mcu.h"
0011 #include "eeprom.h"
0012 
0013 static const struct ieee80211_iface_limit if_limits[] = {
0014     {
0015         .max = 1,
0016         .types = BIT(NL80211_IFTYPE_ADHOC)
0017     }, {
0018         .max = 16,
0019         .types = BIT(NL80211_IFTYPE_AP)
0020 #ifdef CONFIG_MAC80211_MESH
0021              | BIT(NL80211_IFTYPE_MESH_POINT)
0022 #endif
0023     }, {
0024         .max = MT7915_MAX_INTERFACES,
0025         .types = BIT(NL80211_IFTYPE_STATION)
0026     }
0027 };
0028 
0029 static const struct ieee80211_iface_combination if_comb[] = {
0030     {
0031         .limits = if_limits,
0032         .n_limits = ARRAY_SIZE(if_limits),
0033         .max_interfaces = MT7915_MAX_INTERFACES,
0034         .num_different_channels = 1,
0035         .beacon_int_infra_match = true,
0036         .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
0037                        BIT(NL80211_CHAN_WIDTH_20) |
0038                        BIT(NL80211_CHAN_WIDTH_40) |
0039                        BIT(NL80211_CHAN_WIDTH_80) |
0040                        BIT(NL80211_CHAN_WIDTH_160) |
0041                        BIT(NL80211_CHAN_WIDTH_80P80),
0042     }
0043 };
0044 
0045 static ssize_t mt7915_thermal_temp_show(struct device *dev,
0046                     struct device_attribute *attr,
0047                     char *buf)
0048 {
0049     struct mt7915_phy *phy = dev_get_drvdata(dev);
0050     int i = to_sensor_dev_attr(attr)->index;
0051     int temperature;
0052 
0053     switch (i) {
0054     case 0:
0055         temperature = mt7915_mcu_get_temperature(phy);
0056         if (temperature < 0)
0057             return temperature;
0058         /* display in millidegree celcius */
0059         return sprintf(buf, "%u\n", temperature * 1000);
0060     case 1:
0061     case 2:
0062         return sprintf(buf, "%u\n",
0063                    phy->throttle_temp[i - 1] * 1000);
0064     case 3:
0065         return sprintf(buf, "%hhu\n", phy->throttle_state);
0066     default:
0067         return -EINVAL;
0068     }
0069 }
0070 
0071 static ssize_t mt7915_thermal_temp_store(struct device *dev,
0072                      struct device_attribute *attr,
0073                      const char *buf, size_t count)
0074 {
0075     struct mt7915_phy *phy = dev_get_drvdata(dev);
0076     int ret, i = to_sensor_dev_attr(attr)->index;
0077     long val;
0078 
0079     ret = kstrtol(buf, 10, &val);
0080     if (ret < 0)
0081         return ret;
0082 
0083     mutex_lock(&phy->dev->mt76.mutex);
0084     val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130);
0085     phy->throttle_temp[i - 1] = val;
0086     mutex_unlock(&phy->dev->mt76.mutex);
0087 
0088     return count;
0089 }
0090 
0091 static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
0092 static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
0093 static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
0094 static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
0095 
0096 static struct attribute *mt7915_hwmon_attrs[] = {
0097     &sensor_dev_attr_temp1_input.dev_attr.attr,
0098     &sensor_dev_attr_temp1_crit.dev_attr.attr,
0099     &sensor_dev_attr_temp1_max.dev_attr.attr,
0100     &sensor_dev_attr_throttle1.dev_attr.attr,
0101     NULL,
0102 };
0103 ATTRIBUTE_GROUPS(mt7915_hwmon);
0104 
0105 static int
0106 mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
0107                       unsigned long *state)
0108 {
0109     *state = MT7915_CDEV_THROTTLE_MAX;
0110 
0111     return 0;
0112 }
0113 
0114 static int
0115 mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
0116                       unsigned long *state)
0117 {
0118     struct mt7915_phy *phy = cdev->devdata;
0119 
0120     *state = phy->cdev_state;
0121 
0122     return 0;
0123 }
0124 
0125 static int
0126 mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
0127                       unsigned long state)
0128 {
0129     struct mt7915_phy *phy = cdev->devdata;
0130     u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
0131     int ret;
0132 
0133     if (state > MT7915_CDEV_THROTTLE_MAX)
0134         return -EINVAL;
0135 
0136     if (phy->throttle_temp[0] > phy->throttle_temp[1])
0137         return 0;
0138 
0139     if (state == phy->cdev_state)
0140         return 0;
0141 
0142     /*
0143      * cooling_device convention: 0 = no cooling, more = more cooling
0144      * mcu convention: 1 = max cooling, more = less cooling
0145      */
0146     ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
0147     if (ret)
0148         return ret;
0149 
0150     phy->cdev_state = state;
0151 
0152     return 0;
0153 }
0154 
0155 static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
0156     .get_max_state = mt7915_thermal_get_max_throttle_state,
0157     .get_cur_state = mt7915_thermal_get_cur_throttle_state,
0158     .set_cur_state = mt7915_thermal_set_cur_throttle_state,
0159 };
0160 
0161 static void mt7915_unregister_thermal(struct mt7915_phy *phy)
0162 {
0163     struct wiphy *wiphy = phy->mt76->hw->wiphy;
0164 
0165     if (!phy->cdev)
0166         return;
0167 
0168     sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
0169     thermal_cooling_device_unregister(phy->cdev);
0170 }
0171 
0172 static int mt7915_thermal_init(struct mt7915_phy *phy)
0173 {
0174     struct wiphy *wiphy = phy->mt76->hw->wiphy;
0175     struct thermal_cooling_device *cdev;
0176     struct device *hwmon;
0177     const char *name;
0178 
0179     name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
0180                   wiphy_name(wiphy));
0181 
0182     cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
0183     if (!IS_ERR(cdev)) {
0184         if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
0185                       "cooling_device") < 0)
0186             thermal_cooling_device_unregister(cdev);
0187         else
0188             phy->cdev = cdev;
0189     }
0190 
0191     if (!IS_REACHABLE(CONFIG_HWMON))
0192         return 0;
0193 
0194     hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
0195                                mt7915_hwmon_groups);
0196     if (IS_ERR(hwmon))
0197         return PTR_ERR(hwmon);
0198 
0199     /* initialize critical/maximum high temperature */
0200     phy->throttle_temp[0] = 110;
0201     phy->throttle_temp[1] = 120;
0202 
0203     return mt7915_mcu_set_thermal_throttling(phy,
0204                          MT7915_THERMAL_THROTTLE_MAX);
0205 }
0206 
0207 static void mt7915_led_set_config(struct led_classdev *led_cdev,
0208                   u8 delay_on, u8 delay_off)
0209 {
0210     struct mt7915_dev *dev;
0211     struct mt76_dev *mt76;
0212     u32 val;
0213 
0214     mt76 = container_of(led_cdev, struct mt76_dev, led_cdev);
0215     dev = container_of(mt76, struct mt7915_dev, mt76);
0216 
0217     /* select TX blink mode, 2: only data frames */
0218     mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2);
0219 
0220     /* enable LED */
0221     mt76_wr(dev, MT_LED_EN(0), 1);
0222 
0223     /* set LED Tx blink on/off time */
0224     val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |
0225           FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);
0226     mt76_wr(dev, MT_LED_TX_BLINK(0), val);
0227 
0228     /* control LED */
0229     val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK;
0230     if (dev->mt76.led_al)
0231         val |= MT_LED_CTRL_POLARITY;
0232 
0233     mt76_wr(dev, MT_LED_CTRL(0), val);
0234     mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK);
0235 }
0236 
0237 static int mt7915_led_set_blink(struct led_classdev *led_cdev,
0238                 unsigned long *delay_on,
0239                 unsigned long *delay_off)
0240 {
0241     u16 delta_on = 0, delta_off = 0;
0242 
0243 #define HW_TICK     10
0244 #define TO_HW_TICK(_t)  (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
0245 
0246     if (*delay_on)
0247         delta_on = TO_HW_TICK(*delay_on);
0248     if (*delay_off)
0249         delta_off = TO_HW_TICK(*delay_off);
0250 
0251     mt7915_led_set_config(led_cdev, delta_on, delta_off);
0252 
0253     return 0;
0254 }
0255 
0256 static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
0257                       enum led_brightness brightness)
0258 {
0259     if (!brightness)
0260         mt7915_led_set_config(led_cdev, 0, 0xff);
0261     else
0262         mt7915_led_set_config(led_cdev, 0xff, 0);
0263 }
0264 
0265 static void
0266 mt7915_init_txpower(struct mt7915_dev *dev,
0267             struct ieee80211_supported_band *sband)
0268 {
0269     int i, n_chains = hweight8(dev->mphy.antenna_mask);
0270     int nss_delta = mt76_tx_power_nss_delta(n_chains);
0271     int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
0272     struct mt76_power_limits limits;
0273 
0274     for (i = 0; i < sband->n_channels; i++) {
0275         struct ieee80211_channel *chan = &sband->channels[i];
0276         u32 target_power = 0;
0277         int j;
0278 
0279         for (j = 0; j < n_chains; j++) {
0280             u32 val;
0281 
0282             val = mt7915_eeprom_get_target_power(dev, chan, j);
0283             target_power = max(target_power, val);
0284         }
0285 
0286         target_power += pwr_delta;
0287         target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
0288                               &limits,
0289                               target_power);
0290         target_power += nss_delta;
0291         target_power = DIV_ROUND_UP(target_power, 2);
0292         chan->max_power = min_t(int, chan->max_reg_power,
0293                     target_power);
0294         chan->orig_mpwr = target_power;
0295     }
0296 }
0297 
0298 static void
0299 mt7915_regd_notifier(struct wiphy *wiphy,
0300              struct regulatory_request *request)
0301 {
0302     struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
0303     struct mt7915_dev *dev = mt7915_hw_dev(hw);
0304     struct mt76_phy *mphy = hw->priv;
0305     struct mt7915_phy *phy = mphy->priv;
0306 
0307     memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
0308     dev->mt76.region = request->dfs_region;
0309 
0310     if (dev->mt76.region == NL80211_DFS_UNSET)
0311         mt7915_mcu_rdd_background_enable(phy, NULL);
0312 
0313     mt7915_init_txpower(dev, &mphy->sband_2g.sband);
0314     mt7915_init_txpower(dev, &mphy->sband_5g.sband);
0315     mt7915_init_txpower(dev, &mphy->sband_6g.sband);
0316 
0317     mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
0318     mt7915_dfs_init_radar_detector(phy);
0319 }
0320 
0321 static void
0322 mt7915_init_wiphy(struct ieee80211_hw *hw)
0323 {
0324     struct mt7915_phy *phy = mt7915_hw_phy(hw);
0325     struct mt76_dev *mdev = &phy->dev->mt76;
0326     struct wiphy *wiphy = hw->wiphy;
0327     struct mt7915_dev *dev = phy->dev;
0328 
0329     hw->queues = 4;
0330     hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
0331     hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
0332     hw->netdev_features = NETIF_F_RXCSUM;
0333 
0334     hw->radiotap_timestamp.units_pos =
0335         IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
0336 
0337     phy->slottime = 9;
0338 
0339     hw->sta_data_size = sizeof(struct mt7915_sta);
0340     hw->vif_data_size = sizeof(struct mt7915_vif);
0341 
0342     wiphy->iface_combinations = if_comb;
0343     wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
0344     wiphy->reg_notifier = mt7915_regd_notifier;
0345     wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
0346     wiphy->mbssid_max_interfaces = 16;
0347 
0348     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
0349     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
0350     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
0351     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
0352     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
0353     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
0354     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
0355     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
0356 
0357     if (!mdev->dev->of_node ||
0358         !of_property_read_bool(mdev->dev->of_node,
0359                    "mediatek,disable-radar-background"))
0360         wiphy_ext_feature_set(wiphy,
0361                       NL80211_EXT_FEATURE_RADAR_BACKGROUND);
0362 
0363     ieee80211_hw_set(hw, HAS_RATE_CONTROL);
0364     ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
0365     ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
0366     ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
0367     ieee80211_hw_set(hw, WANT_MONITOR_VIF);
0368     ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
0369 
0370     hw->max_tx_fragments = 4;
0371 
0372     if (phy->mt76->cap.has_2ghz) {
0373         phy->mt76->sband_2g.sband.ht_cap.cap |=
0374             IEEE80211_HT_CAP_LDPC_CODING |
0375             IEEE80211_HT_CAP_MAX_AMSDU;
0376         phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
0377             IEEE80211_HT_MPDU_DENSITY_4;
0378     }
0379 
0380     if (phy->mt76->cap.has_5ghz) {
0381         phy->mt76->sband_5g.sband.ht_cap.cap |=
0382             IEEE80211_HT_CAP_LDPC_CODING |
0383             IEEE80211_HT_CAP_MAX_AMSDU;
0384         phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
0385             IEEE80211_HT_MPDU_DENSITY_4;
0386 
0387         if (is_mt7915(&dev->mt76)) {
0388             phy->mt76->sband_5g.sband.vht_cap.cap |=
0389                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
0390                 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
0391 
0392             if (!dev->dbdc_support)
0393                 phy->mt76->sband_5g.sband.vht_cap.cap |=
0394                     IEEE80211_VHT_CAP_SHORT_GI_160 |
0395                     IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
0396         } else {
0397             phy->mt76->sband_5g.sband.vht_cap.cap |=
0398                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
0399                 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
0400 
0401             /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
0402             phy->mt76->sband_5g.sband.vht_cap.cap |=
0403                 IEEE80211_VHT_CAP_SHORT_GI_160 |
0404                 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
0405         }
0406     }
0407 
0408     mt76_set_stream_caps(phy->mt76, true);
0409     mt7915_set_stream_vht_txbf_caps(phy);
0410     mt7915_set_stream_he_caps(phy);
0411 
0412     wiphy->available_antennas_rx = phy->mt76->antenna_mask;
0413     wiphy->available_antennas_tx = phy->mt76->antenna_mask;
0414 }
0415 
0416 static void
0417 mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
0418 {
0419     u32 mask, set;
0420 
0421     mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
0422                MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
0423     mt76_set(dev, MT_TMAC_CTCR0(band),
0424          MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
0425          MT_TMAC_CTCR0_INS_DDLMT_EN);
0426 
0427     mask = MT_MDP_RCFR0_MCU_RX_MGMT |
0428            MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
0429            MT_MDP_RCFR0_MCU_RX_CTL_BAR;
0430     set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
0431           FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
0432           FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
0433     mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
0434 
0435     mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
0436            MT_MDP_RCFR1_RX_DROPPED_UCAST |
0437            MT_MDP_RCFR1_RX_DROPPED_MCAST;
0438     set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
0439           FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
0440           FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
0441     mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
0442 
0443     mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
0444 
0445     /* mt7915: disable rx rate report by default due to hw issues */
0446     mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
0447 }
0448 
0449 static void mt7915_mac_init(struct mt7915_dev *dev)
0450 {
0451     int i;
0452     u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
0453 
0454     /* config pse qid6 wfdma port selection */
0455     if (!is_mt7915(&dev->mt76) && dev->hif2)
0456         mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
0457              MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
0458 
0459     mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
0460 
0461     if (!is_mt7915(&dev->mt76))
0462         mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
0463 
0464     /* enable hardware de-agg */
0465     mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
0466 
0467     for (i = 0; i < mt7915_wtbl_size(dev); i++)
0468         mt7915_mac_wtbl_update(dev, i,
0469                        MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
0470     for (i = 0; i < 2; i++)
0471         mt7915_mac_init_band(dev, i);
0472 
0473     if (IS_ENABLED(CONFIG_MT76_LEDS)) {
0474         i = dev->mt76.led_pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2;
0475         mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4);
0476     }
0477 }
0478 
0479 static int mt7915_txbf_init(struct mt7915_dev *dev)
0480 {
0481     int ret;
0482 
0483     if (dev->dbdc_support) {
0484         ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
0485         if (ret)
0486             return ret;
0487     }
0488 
0489     /* trigger sounding packets */
0490     ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
0491     if (ret)
0492         return ret;
0493 
0494     /* enable eBF */
0495     return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
0496 }
0497 
0498 static struct mt7915_phy *
0499 mt7915_alloc_ext_phy(struct mt7915_dev *dev)
0500 {
0501     struct mt7915_phy *phy;
0502     struct mt76_phy *mphy;
0503 
0504     if (!dev->dbdc_support)
0505         return NULL;
0506 
0507     mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
0508     if (!mphy)
0509         return ERR_PTR(-ENOMEM);
0510 
0511     phy = mphy->priv;
0512     phy->dev = dev;
0513     phy->mt76 = mphy;
0514 
0515     /* Bind main phy to band0 and ext_phy to band1 for dbdc case */
0516     phy->band_idx = 1;
0517 
0518     return phy;
0519 }
0520 
0521 static int
0522 mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
0523 {
0524     struct mt76_phy *mphy = phy->mt76;
0525     int ret;
0526 
0527     INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
0528 
0529     mt7915_eeprom_parse_hw_cap(dev, phy);
0530 
0531     memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
0532            ETH_ALEN);
0533     /* Make the secondary PHY MAC address local without overlapping with
0534      * the usual MAC address allocation scheme on multiple virtual interfaces
0535      */
0536     if (!is_valid_ether_addr(mphy->macaddr)) {
0537         memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
0538                ETH_ALEN);
0539         mphy->macaddr[0] |= 2;
0540         mphy->macaddr[0] ^= BIT(7);
0541     }
0542     mt76_eeprom_override(mphy);
0543 
0544     /* init wiphy according to mphy and phy */
0545     mt7915_init_wiphy(mphy->hw);
0546 
0547     ret = mt76_register_phy(mphy, true, mt76_rates,
0548                 ARRAY_SIZE(mt76_rates));
0549     if (ret)
0550         return ret;
0551 
0552     ret = mt7915_thermal_init(phy);
0553     if (ret)
0554         goto unreg;
0555 
0556     mt7915_init_debugfs(phy);
0557 
0558     return 0;
0559 
0560 unreg:
0561     mt76_unregister_phy(mphy);
0562     return ret;
0563 }
0564 
0565 static void mt7915_init_work(struct work_struct *work)
0566 {
0567     struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
0568                  init_work);
0569 
0570     mt7915_mcu_set_eeprom(dev);
0571     mt7915_mac_init(dev);
0572     mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband);
0573     mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
0574     mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
0575     mt7915_txbf_init(dev);
0576 }
0577 
0578 void mt7915_wfsys_reset(struct mt7915_dev *dev)
0579 {
0580 #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
0581 #define MT_MCU_DUMMY_DEFAULT    GENMASK(31, 16)
0582 
0583     if (is_mt7915(&dev->mt76)) {
0584         u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
0585 
0586         mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
0587 
0588         /* change to software control */
0589         val |= MT_TOP_PWR_SW_RST;
0590         mt76_wr(dev, MT_TOP_PWR_CTRL, val);
0591 
0592         /* reset wfsys */
0593         val &= ~MT_TOP_PWR_SW_RST;
0594         mt76_wr(dev, MT_TOP_PWR_CTRL, val);
0595 
0596         /* release wfsys then mcu re-executes romcode */
0597         val |= MT_TOP_PWR_SW_RST;
0598         mt76_wr(dev, MT_TOP_PWR_CTRL, val);
0599 
0600         /* switch to hw control */
0601         val &= ~MT_TOP_PWR_SW_RST;
0602         val |= MT_TOP_PWR_HW_CTRL;
0603         mt76_wr(dev, MT_TOP_PWR_CTRL, val);
0604 
0605         /* check whether mcu resets to default */
0606         if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
0607                     MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
0608                     1000)) {
0609             dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
0610             return;
0611         }
0612 
0613         /* wfsys reset won't clear host registers */
0614         mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
0615 
0616         msleep(100);
0617     } else if (is_mt7986(&dev->mt76)) {
0618         mt7986_wmac_disable(dev);
0619         msleep(20);
0620 
0621         mt7986_wmac_enable(dev);
0622         msleep(20);
0623     } else {
0624         mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
0625         msleep(20);
0626 
0627         mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
0628         msleep(20);
0629     }
0630 }
0631 
0632 static bool mt7915_band_config(struct mt7915_dev *dev)
0633 {
0634     bool ret = true;
0635 
0636     dev->phy.band_idx = 0;
0637 
0638     if (is_mt7986(&dev->mt76)) {
0639         u32 sku = mt7915_check_adie(dev, true);
0640 
0641         /*
0642          * for mt7986, dbdc support is determined by the number
0643          * of adie chips and the main phy is bound to band1 when
0644          * dbdc is disabled.
0645          */
0646         if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
0647             dev->phy.band_idx = 1;
0648             ret = false;
0649         }
0650     } else {
0651         ret = is_mt7915(&dev->mt76) ?
0652               !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
0653     }
0654 
0655     return ret;
0656 }
0657 
0658 static int
0659 mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
0660 {
0661     int ret, idx;
0662 
0663     mt76_wr(dev, MT_INT_MASK_CSR, 0);
0664     mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
0665 
0666     INIT_WORK(&dev->init_work, mt7915_init_work);
0667 
0668     ret = mt7915_dma_init(dev, phy2);
0669     if (ret)
0670         return ret;
0671 
0672     set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
0673 
0674     ret = mt7915_mcu_init(dev);
0675     if (ret)
0676         return ret;
0677 
0678     ret = mt7915_eeprom_init(dev);
0679     if (ret < 0)
0680         return ret;
0681 
0682     if (dev->flash_mode) {
0683         ret = mt7915_mcu_apply_group_cal(dev);
0684         if (ret)
0685             return ret;
0686     }
0687 
0688     /* Beacon and mgmt frames should occupy wcid 0 */
0689     idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
0690     if (idx)
0691         return -ENOSPC;
0692 
0693     dev->mt76.global_wcid.idx = idx;
0694     dev->mt76.global_wcid.hw_key_idx = -1;
0695     dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
0696     rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
0697 
0698     return 0;
0699 }
0700 
0701 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
0702 {
0703     int nss;
0704     u32 *cap;
0705 
0706     if (!phy->mt76->cap.has_5ghz)
0707         return;
0708 
0709     nss = hweight8(phy->mt76->chainmask);
0710     cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
0711 
0712     *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
0713         IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
0714         (3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
0715 
0716     *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
0717           IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
0718           IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
0719 
0720     if (nss < 2)
0721         return;
0722 
0723     *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
0724         IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
0725         FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
0726                nss - 1);
0727 }
0728 
0729 static void
0730 mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev,
0731                    struct ieee80211_sta_he_cap *he_cap,
0732                    int vif, int nss)
0733 {
0734     struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
0735     u8 c, nss_160;
0736 
0737     /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
0738     if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
0739         nss_160 = nss / 2;
0740     else
0741         nss_160 = nss;
0742 
0743 #ifdef CONFIG_MAC80211_MESH
0744     if (vif == NL80211_IFTYPE_MESH_POINT)
0745         return;
0746 #endif
0747 
0748     elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
0749     elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
0750 
0751     c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK |
0752         IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
0753     elem->phy_cap_info[5] &= ~c;
0754 
0755     c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
0756         IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
0757     elem->phy_cap_info[6] &= ~c;
0758 
0759     elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
0760 
0761     c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
0762     if (!is_mt7915(&dev->mt76))
0763         c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
0764              IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
0765     elem->phy_cap_info[2] |= c;
0766 
0767     c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
0768         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 |
0769         IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
0770     elem->phy_cap_info[4] |= c;
0771 
0772     /* do not support NG16 due to spec D4.0 changes subcarrier idx */
0773     c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
0774         IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
0775 
0776     if (vif == NL80211_IFTYPE_STATION)
0777         c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
0778 
0779     elem->phy_cap_info[6] |= c;
0780 
0781     if (nss < 2)
0782         return;
0783 
0784     /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
0785     elem->phy_cap_info[7] |= min_t(int, nss - 1, 2) << 3;
0786 
0787     if (vif != NL80211_IFTYPE_AP)
0788         return;
0789 
0790     elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
0791     elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
0792 
0793     /* num_snd_dim
0794      * for mt7915, max supported nss is 2 for bw > 80MHz
0795      */
0796     c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
0797                nss - 1) |
0798         FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
0799                nss_160 - 1);
0800     elem->phy_cap_info[5] |= c;
0801 
0802     c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
0803         IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
0804     elem->phy_cap_info[6] |= c;
0805 
0806     if (!is_mt7915(&dev->mt76)) {
0807         c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
0808             IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
0809         elem->phy_cap_info[7] |= c;
0810     }
0811 }
0812 
0813 static void
0814 mt7915_gen_ppe_thresh(u8 *he_ppet, int nss)
0815 {
0816     u8 i, ppet_bits, ppet_size, ru_bit_mask = 0x7; /* HE80 */
0817     static const u8 ppet16_ppet8_ru3_ru0[] = {0x1c, 0xc7, 0x71};
0818 
0819     he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
0820              FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
0821                 ru_bit_mask);
0822 
0823     ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
0824             nss * hweight8(ru_bit_mask) * 2;
0825     ppet_size = DIV_ROUND_UP(ppet_bits, 8);
0826 
0827     for (i = 0; i < ppet_size - 1; i++)
0828         he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
0829 
0830     he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
0831              (0xff >> (8 - (ppet_bits - 1) % 8));
0832 }
0833 
0834 static int
0835 mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
0836             struct ieee80211_sband_iftype_data *data)
0837 {
0838     struct mt7915_dev *dev = phy->dev;
0839     int i, idx = 0, nss = hweight8(phy->mt76->chainmask);
0840     u16 mcs_map = 0;
0841     u16 mcs_map_160 = 0;
0842     u8 nss_160;
0843 
0844     /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
0845     if (is_mt7915(&dev->mt76) && !dev->dbdc_support)
0846         nss_160 = nss / 2;
0847     else
0848         nss_160 = nss;
0849 
0850     for (i = 0; i < 8; i++) {
0851         if (i < nss)
0852             mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
0853         else
0854             mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
0855 
0856         if (i < nss_160)
0857             mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
0858         else
0859             mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
0860     }
0861 
0862     for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
0863         struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
0864         struct ieee80211_he_cap_elem *he_cap_elem =
0865                 &he_cap->he_cap_elem;
0866         struct ieee80211_he_mcs_nss_supp *he_mcs =
0867                 &he_cap->he_mcs_nss_supp;
0868 
0869         switch (i) {
0870         case NL80211_IFTYPE_STATION:
0871         case NL80211_IFTYPE_AP:
0872 #ifdef CONFIG_MAC80211_MESH
0873         case NL80211_IFTYPE_MESH_POINT:
0874 #endif
0875             break;
0876         default:
0877             continue;
0878         }
0879 
0880         data[idx].types_mask = BIT(i);
0881         he_cap->has_he = true;
0882 
0883         he_cap_elem->mac_cap_info[0] =
0884             IEEE80211_HE_MAC_CAP0_HTC_HE;
0885         he_cap_elem->mac_cap_info[3] =
0886             IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
0887             IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
0888         he_cap_elem->mac_cap_info[4] =
0889             IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
0890 
0891         if (band == NL80211_BAND_2GHZ)
0892             he_cap_elem->phy_cap_info[0] =
0893                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
0894         else
0895             he_cap_elem->phy_cap_info[0] =
0896                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
0897                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |
0898                 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
0899 
0900         he_cap_elem->phy_cap_info[1] =
0901             IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
0902         he_cap_elem->phy_cap_info[2] =
0903             IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
0904             IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
0905 
0906         switch (i) {
0907         case NL80211_IFTYPE_AP:
0908             he_cap_elem->mac_cap_info[0] |=
0909                 IEEE80211_HE_MAC_CAP0_TWT_RES;
0910             he_cap_elem->mac_cap_info[2] |=
0911                 IEEE80211_HE_MAC_CAP2_BSR;
0912             he_cap_elem->mac_cap_info[4] |=
0913                 IEEE80211_HE_MAC_CAP4_BQR;
0914             he_cap_elem->mac_cap_info[5] |=
0915                 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
0916             he_cap_elem->phy_cap_info[3] |=
0917                 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
0918                 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
0919             he_cap_elem->phy_cap_info[6] |=
0920                 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
0921                 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
0922             he_cap_elem->phy_cap_info[9] |=
0923                 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
0924                 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
0925             break;
0926         case NL80211_IFTYPE_STATION:
0927             he_cap_elem->mac_cap_info[1] |=
0928                 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
0929 
0930             if (band == NL80211_BAND_2GHZ)
0931                 he_cap_elem->phy_cap_info[0] |=
0932                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
0933             else
0934                 he_cap_elem->phy_cap_info[0] |=
0935                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
0936 
0937             he_cap_elem->phy_cap_info[1] |=
0938                 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
0939                 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
0940             he_cap_elem->phy_cap_info[3] |=
0941                 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
0942                 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
0943             he_cap_elem->phy_cap_info[6] |=
0944                 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
0945                 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
0946                 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
0947             he_cap_elem->phy_cap_info[7] |=
0948                 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
0949                 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
0950             he_cap_elem->phy_cap_info[8] |=
0951                 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
0952                 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
0953                 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
0954                 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
0955             he_cap_elem->phy_cap_info[9] |=
0956                 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
0957                 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
0958                 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
0959                 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
0960                 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
0961                 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
0962             break;
0963         }
0964 
0965         he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
0966         he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
0967         he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
0968         he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
0969         he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160);
0970         he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160);
0971 
0972         mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss);
0973 
0974         memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
0975         if (he_cap_elem->phy_cap_info[6] &
0976             IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
0977             mt7915_gen_ppe_thresh(he_cap->ppe_thres, nss);
0978         } else {
0979             he_cap_elem->phy_cap_info[9] |=
0980                 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
0981                            IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
0982         }
0983 
0984         if (band == NL80211_BAND_6GHZ) {
0985             u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
0986                   IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
0987 
0988             cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
0989                            IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
0990                    u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
0991                            IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
0992                    u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
0993                            IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
0994 
0995             data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
0996         }
0997 
0998         idx++;
0999     }
1000 
1001     return idx;
1002 }
1003 
1004 void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
1005 {
1006     struct ieee80211_sband_iftype_data *data;
1007     struct ieee80211_supported_band *band;
1008     int n;
1009 
1010     if (phy->mt76->cap.has_2ghz) {
1011         data = phy->iftype[NL80211_BAND_2GHZ];
1012         n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1013 
1014         band = &phy->mt76->sband_2g.sband;
1015         band->iftype_data = data;
1016         band->n_iftype_data = n;
1017     }
1018 
1019     if (phy->mt76->cap.has_5ghz) {
1020         data = phy->iftype[NL80211_BAND_5GHZ];
1021         n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1022 
1023         band = &phy->mt76->sband_5g.sband;
1024         band->iftype_data = data;
1025         band->n_iftype_data = n;
1026     }
1027 
1028     if (phy->mt76->cap.has_6ghz) {
1029         data = phy->iftype[NL80211_BAND_6GHZ];
1030         n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1031 
1032         band = &phy->mt76->sband_6g.sband;
1033         band->iftype_data = data;
1034         band->n_iftype_data = n;
1035     }
1036 }
1037 
1038 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1039 {
1040     struct mt7915_phy *phy = mt7915_ext_phy(dev);
1041     struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
1042 
1043     if (!phy)
1044         return;
1045 
1046     mt7915_unregister_thermal(phy);
1047     mt76_unregister_phy(mphy);
1048     ieee80211_free_hw(mphy->hw);
1049 }
1050 
1051 static void mt7915_stop_hardware(struct mt7915_dev *dev)
1052 {
1053     mt7915_mcu_exit(dev);
1054     mt7915_tx_token_put(dev);
1055     mt7915_dma_cleanup(dev);
1056     tasklet_disable(&dev->irq_tasklet);
1057 
1058     if (is_mt7986(&dev->mt76))
1059         mt7986_wmac_disable(dev);
1060 }
1061 
1062 
1063 int mt7915_register_device(struct mt7915_dev *dev)
1064 {
1065     struct ieee80211_hw *hw = mt76_hw(dev);
1066     struct mt7915_phy *phy2;
1067     int ret;
1068 
1069     dev->phy.dev = dev;
1070     dev->phy.mt76 = &dev->mt76.phy;
1071     dev->mt76.phy.priv = &dev->phy;
1072     INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1073     INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1074     INIT_LIST_HEAD(&dev->sta_rc_list);
1075     INIT_LIST_HEAD(&dev->sta_poll_list);
1076     INIT_LIST_HEAD(&dev->twt_list);
1077     spin_lock_init(&dev->sta_poll_lock);
1078 
1079     init_waitqueue_head(&dev->reset_wait);
1080     INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1081 
1082     dev->dbdc_support = mt7915_band_config(dev);
1083 
1084     phy2 = mt7915_alloc_ext_phy(dev);
1085     if (IS_ERR(phy2))
1086         return PTR_ERR(phy2);
1087 
1088     ret = mt7915_init_hardware(dev, phy2);
1089     if (ret)
1090         goto free_phy2;
1091 
1092     mt7915_init_wiphy(hw);
1093 
1094 #ifdef CONFIG_NL80211_TESTMODE
1095     dev->mt76.test_ops = &mt7915_testmode_ops;
1096 #endif
1097 
1098     /* init led callbacks */
1099     if (IS_ENABLED(CONFIG_MT76_LEDS)) {
1100         dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
1101         dev->mt76.led_cdev.blink_set = mt7915_led_set_blink;
1102     }
1103 
1104     ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1105                    ARRAY_SIZE(mt76_rates));
1106     if (ret)
1107         goto stop_hw;
1108 
1109     ret = mt7915_thermal_init(&dev->phy);
1110     if (ret)
1111         goto unreg_dev;
1112 
1113     ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1114 
1115     if (phy2) {
1116         ret = mt7915_register_ext_phy(dev, phy2);
1117         if (ret)
1118             goto unreg_thermal;
1119     }
1120 
1121     mt7915_init_debugfs(&dev->phy);
1122 
1123     return 0;
1124 
1125 unreg_thermal:
1126     mt7915_unregister_thermal(&dev->phy);
1127 unreg_dev:
1128     mt76_unregister_device(&dev->mt76);
1129 stop_hw:
1130     mt7915_stop_hardware(dev);
1131 free_phy2:
1132     if (phy2)
1133         ieee80211_free_hw(phy2->mt76->hw);
1134     return ret;
1135 }
1136 
1137 void mt7915_unregister_device(struct mt7915_dev *dev)
1138 {
1139     mt7915_unregister_ext_phy(dev);
1140     mt7915_unregister_thermal(&dev->phy);
1141     mt76_unregister_device(&dev->mt76);
1142     mt7915_stop_hardware(dev);
1143 
1144     mt76_free_device(&dev->mt76);
1145 }
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