mt76/mt76x2/pci_phy.c

0001 // SPDX-License-Identifier: ISC
0002 /*
0003  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
0004  */
0005
0006 #include <linux/delay.h>
0007 #include "mt76x2.h"
0008 #include "mcu.h"
0009 #include "eeprom.h"
0010 #include "../mt76x02_phy.h"
0011
0012 static bool
0013 mt76x2_phy_tssi_init_cal(struct mt76x02_dev *dev)
0014 {
0015     struct ieee80211_channel *chan = dev->mphy.chandef.chan;
0016     u32 flag = 0;
0017
0018     if (!mt76x2_tssi_enabled(dev))
0019         return false;
0020
0021     if (mt76x2_channel_silent(dev))
0022         return false;
0023
0024     if (chan->band == NL80211_BAND_5GHZ)
0025         flag |= BIT(0);
0026
0027     if (mt76x02_ext_pa_enabled(dev, chan->band))
0028         flag |= BIT(8);
0029
0030     mt76x02_mcu_calibrate(dev, MCU_CAL_TSSI, flag);
0031     dev->cal.tssi_cal_done = true;
0032     return true;
0033 }
0034
0035 static void
0036 mt76x2_phy_channel_calibrate(struct mt76x02_dev *dev, bool mac_stopped)
0037 {
0038     struct ieee80211_channel *chan = dev->mphy.chandef.chan;
0039     bool is_5ghz = chan->band == NL80211_BAND_5GHZ;
0040
0041     if (dev->cal.channel_cal_done)
0042         return;
0043
0044     if (mt76x2_channel_silent(dev))
0045         return;
0046
0047     if (!dev->cal.tssi_cal_done)
0048         mt76x2_phy_tssi_init_cal(dev);
0049
0050     if (!mac_stopped)
0051         mt76x2_mac_stop(dev, false);
0052
0053     if (is_5ghz)
0054         mt76x02_mcu_calibrate(dev, MCU_CAL_LC, 0);
0055
0056     mt76x02_mcu_calibrate(dev, MCU_CAL_TX_LOFT, is_5ghz);
0057     mt76x02_mcu_calibrate(dev, MCU_CAL_TXIQ, is_5ghz);
0058     mt76x02_mcu_calibrate(dev, MCU_CAL_RXIQC_FI, is_5ghz);
0059     mt76x02_mcu_calibrate(dev, MCU_CAL_TEMP_SENSOR, 0);
0060     mt76x02_mcu_calibrate(dev, MCU_CAL_TX_SHAPING, 0);
0061
0062     if (!mac_stopped)
0063         mt76x2_mac_resume(dev);
0064
0065     mt76x2_apply_gain_adj(dev);
0066     mt76x02_edcca_init(dev);
0067
0068     dev->cal.channel_cal_done = true;
0069 }
0070
0071 void mt76x2_phy_set_antenna(struct mt76x02_dev *dev)
0072 {
0073     u32 val;
0074
0075     val = mt76_rr(dev, MT_BBP(AGC, 0));
0076     val &= ~(BIT(4) | BIT(1));
0077     switch (dev->mphy.antenna_mask) {
0078     case 1:
0079         /* disable mac DAC control */
0080         mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
0081         mt76_clear(dev, MT_BBP(TXBE, 5), 3);
0082         mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0x3);
0083         mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 2);
0084         /* disable DAC 1 */
0085         mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 4);
0086
0087         val &= ~(BIT(3) | BIT(0));
0088         break;
0089     case 2:
0090         /* disable mac DAC control */
0091         mt76_clear(dev, MT_BBP(IBI, 9), BIT(11));
0092         mt76_rmw_field(dev, MT_BBP(TXBE, 5), 3, 1);
0093         mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xc);
0094         mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 1);
0095         /* disable DAC 0 */
0096         mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 1);
0097
0098         val &= ~BIT(3);
0099         val |= BIT(0);
0100         break;
0101     case 3:
0102     default:
0103         /* enable mac DAC control */
0104         mt76_set(dev, MT_BBP(IBI, 9), BIT(11));
0105         mt76_set(dev, MT_BBP(TXBE, 5), 3);
0106         mt76_rmw_field(dev, MT_TX_PIN_CFG, MT_TX_PIN_CFG_TXANT, 0xf);
0107         mt76_clear(dev, MT_BBP(CORE, 32), GENMASK(21, 20));
0108         mt76_clear(dev, MT_BBP(CORE, 33), GENMASK(12, 9));
0109
0110         val &= ~BIT(0);
0111         val |= BIT(3);
0112         break;
0113     }
0114     mt76_wr(dev, MT_BBP(AGC, 0), val);
0115 }
0116
0117 int mt76x2_phy_set_channel(struct mt76x02_dev *dev,
0118                struct cfg80211_chan_def *chandef)
0119 {
0120     struct ieee80211_channel *chan = chandef->chan;
0121     bool scan = test_bit(MT76_SCANNING, &dev->mphy.state);
0122     enum nl80211_band band = chan->band;
0123     u8 channel;
0124
0125     u32 ext_cca_chan[4] = {
0126         [0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |
0127               FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |
0128               FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
0129               FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
0130               FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),
0131         [1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |
0132               FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |
0133               FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |
0134               FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |
0135               FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),
0136         [2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |
0137               FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |
0138               FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
0139               FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
0140               FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),
0141         [3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |
0142               FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |
0143               FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |
0144               FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |
0145               FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),
0146     };
0147     int ch_group_index;
0148     u8 bw, bw_index;
0149     int freq, freq1;
0150     int ret;
0151
0152     dev->cal.channel_cal_done = false;
0153     freq = chandef->chan->center_freq;
0154     freq1 = chandef->center_freq1;
0155     channel = chan->hw_value;
0156
0157     switch (chandef->width) {
0158     case NL80211_CHAN_WIDTH_40:
0159         bw = 1;
0160         if (freq1 > freq) {
0161             bw_index = 1;
0162             ch_group_index = 0;
0163         } else {
0164             bw_index = 3;
0165             ch_group_index = 1;
0166         }
0167         channel += 2 - ch_group_index * 4;
0168         break;
0169     case NL80211_CHAN_WIDTH_80:
0170         ch_group_index = (freq - freq1 + 30) / 20;
0171         if (WARN_ON(ch_group_index < 0 || ch_group_index > 3))
0172             ch_group_index = 0;
0173         bw = 2;
0174         bw_index = ch_group_index;
0175         channel += 6 - ch_group_index * 4;
0176         break;
0177     default:
0178         bw = 0;
0179         bw_index = 0;
0180         ch_group_index = 0;
0181         break;
0182     }
0183
0184     mt76x2_read_rx_gain(dev);
0185     mt76x2_phy_set_txpower_regs(dev, band);
0186     mt76x2_configure_tx_delay(dev, band, bw);
0187     mt76x2_phy_set_txpower(dev);
0188
0189     mt76x02_phy_set_band(dev, chan->band, ch_group_index & 1);
0190     mt76x02_phy_set_bw(dev, chandef->width, ch_group_index);
0191
0192     mt76_rmw(dev, MT_EXT_CCA_CFG,
0193          (MT_EXT_CCA_CFG_CCA0 |
0194           MT_EXT_CCA_CFG_CCA1 |
0195           MT_EXT_CCA_CFG_CCA2 |
0196           MT_EXT_CCA_CFG_CCA3 |
0197           MT_EXT_CCA_CFG_CCA_MASK),
0198          ext_cca_chan[ch_group_index]);
0199
0200     ret = mt76x2_mcu_set_channel(dev, channel, bw, bw_index, scan);
0201     if (ret)
0202         return ret;
0203
0204     mt76x2_mcu_init_gain(dev, channel, dev->cal.rx.mcu_gain, true);
0205
0206     mt76x2_phy_set_antenna(dev);
0207
0208     /* Enable LDPC Rx */
0209     if (mt76xx_rev(dev) >= MT76XX_REV_E3)
0210         mt76_set(dev, MT_BBP(RXO, 13), BIT(10));
0211
0212     if (!dev->cal.init_cal_done) {
0213         u8 val = mt76x02_eeprom_get(dev, MT_EE_BT_RCAL_RESULT);
0214
0215         if (val != 0xff)
0216             mt76x02_mcu_calibrate(dev, MCU_CAL_R, 0);
0217     }
0218
0219     mt76x02_mcu_calibrate(dev, MCU_CAL_RXDCOC, channel);
0220
0221     /* Rx LPF calibration */
0222     if (!dev->cal.init_cal_done)
0223         mt76x02_mcu_calibrate(dev, MCU_CAL_RC, 0);
0224
0225     dev->cal.init_cal_done = true;
0226
0227     mt76_wr(dev, MT_BBP(AGC, 61), 0xFF64A4E2);
0228     mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010);
0229     mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404);
0230     mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070);
0231     mt76_wr(dev, MT_TXOP_CTRL_CFG, 0x04101B3F);
0232
0233     if (scan)
0234         return 0;
0235
0236     mt76x2_phy_channel_calibrate(dev, true);
0237     mt76x02_init_agc_gain(dev);
0238
0239     /* init default values for temp compensation */
0240     if (mt76x2_tssi_enabled(dev)) {
0241         mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
0242                    0x38);
0243         mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
0244                    0x38);
0245     }
0246
0247     ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
0248                      MT_CALIBRATE_INTERVAL);
0249
0250     return 0;
0251 }
0252
0253 static void
0254 mt76x2_phy_temp_compensate(struct mt76x02_dev *dev)
0255 {
0256     struct mt76x2_temp_comp t;
0257     int temp, db_diff;
0258
0259     if (mt76x2_get_temp_comp(dev, &t))
0260         return;
0261
0262     temp = mt76_get_field(dev, MT_TEMP_SENSOR, MT_TEMP_SENSOR_VAL);
0263     temp -= t.temp_25_ref;
0264     temp = (temp * 1789) / 1000 + 25;
0265     dev->cal.temp = temp;
0266
0267     if (temp > 25)
0268         db_diff = (temp - 25) / t.high_slope;
0269     else
0270         db_diff = (25 - temp) / t.low_slope;
0271
0272     db_diff = min(db_diff, t.upper_bound);
0273     db_diff = max(db_diff, t.lower_bound);
0274
0275     mt76_rmw_field(dev, MT_TX_ALC_CFG_1, MT_TX_ALC_CFG_1_TEMP_COMP,
0276                db_diff * 2);
0277     mt76_rmw_field(dev, MT_TX_ALC_CFG_2, MT_TX_ALC_CFG_2_TEMP_COMP,
0278                db_diff * 2);
0279 }
0280
0281 void mt76x2_phy_calibrate(struct work_struct *work)
0282 {
0283     struct mt76x02_dev *dev;
0284
0285     dev = container_of(work, struct mt76x02_dev, cal_work.work);
0286
0287     mutex_lock(&dev->mt76.mutex);
0288
0289     mt76x2_phy_channel_calibrate(dev, false);
0290     mt76x2_phy_tssi_compensate(dev);
0291     mt76x2_phy_temp_compensate(dev);
0292     mt76x2_phy_update_channel_gain(dev);
0293
0294     mutex_unlock(&dev->mt76.mutex);
0295
0296     ieee80211_queue_delayed_work(mt76_hw(dev), &dev->cal_work,
0297                      MT_CALIBRATE_INTERVAL);
0298 }
0299
0300 int mt76x2_phy_start(struct mt76x02_dev *dev)
0301 {
0302     int ret;
0303
0304     ret = mt76x02_mcu_set_radio_state(dev, true);
0305     if (ret)
0306         return ret;
0307
0308     mt76x2_mcu_load_cr(dev, MT_RF_BBP_CR, 0, 0);
0309
0310     return ret;
0311 }