mt76/mt76x2/mcu.h

0001 /* SPDX-License-Identifier: ISC */
0002 /*
0003  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
0004  */
0005
0006 #ifndef __MT76x2_MCU_H
0007 #define __MT76x2_MCU_H
0008
0009 #include "../mt76x02_mcu.h"
0010
0011 /* Register definitions */
0012 #define MT_MCU_CPU_CTL          0x0704
0013 #define MT_MCU_CLOCK_CTL        0x0708
0014 #define MT_MCU_PCIE_REMAP_BASE1     0x0740
0015 #define MT_MCU_PCIE_REMAP_BASE2     0x0744
0016 #define MT_MCU_PCIE_REMAP_BASE3     0x0748
0017
0018 #define MT_MCU_ROM_PATCH_OFFSET     0x80000
0019 #define MT_MCU_ROM_PATCH_ADDR       0x90000
0020
0021 #define MT_MCU_ILM_OFFSET       0x80000
0022
0023 #define MT_MCU_DLM_OFFSET       0x100000
0024 #define MT_MCU_DLM_ADDR         0x90000
0025 #define MT_MCU_DLM_ADDR_E3      0x90800
0026
0027 enum mcu_calibration {
0028     MCU_CAL_R = 1,
0029     MCU_CAL_TEMP_SENSOR,
0030     MCU_CAL_RXDCOC,
0031     MCU_CAL_RC,
0032     MCU_CAL_SX_LOGEN,
0033     MCU_CAL_LC,
0034     MCU_CAL_TX_LOFT,
0035     MCU_CAL_TXIQ,
0036     MCU_CAL_TSSI,
0037     MCU_CAL_TSSI_COMP,
0038     MCU_CAL_DPD,
0039     MCU_CAL_RXIQC_FI,
0040     MCU_CAL_RXIQC_FD,
0041     MCU_CAL_PWRON,
0042     MCU_CAL_TX_SHAPING,
0043 };
0044
0045 enum mt76x2_mcu_cr_mode {
0046     MT_RF_CR,
0047     MT_BBP_CR,
0048     MT_RF_BBP_CR,
0049     MT_HL_TEMP_CR_UPDATE,
0050 };
0051
0052 struct mt76x2_tssi_comp {
0053     u8 pa_mode;
0054     u8 cal_mode;
0055     u16 pad;
0056
0057     u8 slope0;
0058     u8 slope1;
0059     u8 offset0;
0060     u8 offset1;
0061 } __packed __aligned(4);
0062
0063 int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev,
0064              struct mt76x2_tssi_comp *tssi_data);
0065 int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
0066              bool force);
0067
0068 #endif