0001
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0005
0006
0007 #include <linux/module.h>
0008 #include "mt76x02.h"
0009
0010 #define MT76x02_CCK_RATE(_idx, _rate) { \
0011 .bitrate = _rate, \
0012 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
0013 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
0014 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
0015 }
0016
0017 struct ieee80211_rate mt76x02_rates[] = {
0018 MT76x02_CCK_RATE(0, 10),
0019 MT76x02_CCK_RATE(1, 20),
0020 MT76x02_CCK_RATE(2, 55),
0021 MT76x02_CCK_RATE(3, 110),
0022 OFDM_RATE(0, 60),
0023 OFDM_RATE(1, 90),
0024 OFDM_RATE(2, 120),
0025 OFDM_RATE(3, 180),
0026 OFDM_RATE(4, 240),
0027 OFDM_RATE(5, 360),
0028 OFDM_RATE(6, 480),
0029 OFDM_RATE(7, 540),
0030 };
0031 EXPORT_SYMBOL_GPL(mt76x02_rates);
0032
0033 static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
0034 {
0035 .max = 1,
0036 .types = BIT(NL80211_IFTYPE_ADHOC)
0037 }, {
0038 .max = 8,
0039 .types = BIT(NL80211_IFTYPE_STATION) |
0040 #ifdef CONFIG_MAC80211_MESH
0041 BIT(NL80211_IFTYPE_MESH_POINT) |
0042 #endif
0043 BIT(NL80211_IFTYPE_P2P_CLIENT) |
0044 BIT(NL80211_IFTYPE_P2P_GO) |
0045 BIT(NL80211_IFTYPE_AP)
0046 },
0047 };
0048
0049 static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
0050 {
0051 .max = 1,
0052 .types = BIT(NL80211_IFTYPE_ADHOC)
0053 }, {
0054 .max = 2,
0055 .types = BIT(NL80211_IFTYPE_STATION) |
0056 #ifdef CONFIG_MAC80211_MESH
0057 BIT(NL80211_IFTYPE_MESH_POINT) |
0058 #endif
0059 BIT(NL80211_IFTYPE_P2P_CLIENT) |
0060 BIT(NL80211_IFTYPE_P2P_GO) |
0061 BIT(NL80211_IFTYPE_AP)
0062 },
0063 };
0064
0065 static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
0066 {
0067 .limits = mt76x02_if_limits,
0068 .n_limits = ARRAY_SIZE(mt76x02_if_limits),
0069 .max_interfaces = 8,
0070 .num_different_channels = 1,
0071 .beacon_int_infra_match = true,
0072 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
0073 BIT(NL80211_CHAN_WIDTH_20) |
0074 BIT(NL80211_CHAN_WIDTH_40) |
0075 BIT(NL80211_CHAN_WIDTH_80),
0076 }
0077 };
0078
0079 static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
0080 {
0081 .limits = mt76x02u_if_limits,
0082 .n_limits = ARRAY_SIZE(mt76x02u_if_limits),
0083 .max_interfaces = 2,
0084 .num_different_channels = 1,
0085 .beacon_int_infra_match = true,
0086 }
0087 };
0088
0089 static void
0090 mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on,
0091 u8 delay_off)
0092 {
0093 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev,
0094 mt76);
0095 u32 val;
0096
0097 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |
0098 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
0099 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
0100
0101 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val);
0102 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val);
0103
0104 val = MT_LED_CTRL_REPLAY(mdev->led_pin) |
0105 MT_LED_CTRL_KICK(mdev->led_pin);
0106 if (mdev->led_al)
0107 val |= MT_LED_CTRL_POLARITY(mdev->led_pin);
0108 mt76_wr(dev, MT_LED_CTRL, val);
0109 }
0110
0111 static int
0112 mt76x02_led_set_blink(struct led_classdev *led_cdev,
0113 unsigned long *delay_on,
0114 unsigned long *delay_off)
0115 {
0116 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
0117 led_cdev);
0118 u8 delta_on, delta_off;
0119
0120 delta_off = max_t(u8, *delay_off / 10, 1);
0121 delta_on = max_t(u8, *delay_on / 10, 1);
0122
0123 mt76x02_led_set_config(mdev, delta_on, delta_off);
0124
0125 return 0;
0126 }
0127
0128 static void
0129 mt76x02_led_set_brightness(struct led_classdev *led_cdev,
0130 enum led_brightness brightness)
0131 {
0132 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
0133 led_cdev);
0134
0135 if (!brightness)
0136 mt76x02_led_set_config(mdev, 0, 0xff);
0137 else
0138 mt76x02_led_set_config(mdev, 0xff, 0);
0139 }
0140
0141 int mt76x02_init_device(struct mt76x02_dev *dev)
0142 {
0143 struct ieee80211_hw *hw = mt76_hw(dev);
0144 struct wiphy *wiphy = hw->wiphy;
0145
0146 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
0147
0148 hw->queues = 4;
0149 hw->max_rates = 1;
0150 hw->max_report_rates = 7;
0151 hw->max_rate_tries = 1;
0152 hw->extra_tx_headroom = 2;
0153
0154 if (mt76_is_usb(&dev->mt76)) {
0155 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
0156 MT_DMA_HDR_LEN;
0157 wiphy->iface_combinations = mt76x02u_if_comb;
0158 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
0159 } else {
0160 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
0161
0162 mt76x02_dfs_init_detector(dev);
0163
0164 wiphy->reg_notifier = mt76x02_regd_notifier;
0165 wiphy->iface_combinations = mt76x02_if_comb;
0166 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
0167
0168
0169 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
0170 dev->mt76.led_cdev.brightness_set =
0171 mt76x02_led_set_brightness;
0172 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink;
0173 }
0174 }
0175
0176 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
0177
0178 hw->sta_data_size = sizeof(struct mt76x02_sta);
0179 hw->vif_data_size = sizeof(struct mt76x02_vif);
0180
0181 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
0182 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
0183 ieee80211_hw_set(hw, NEEDS_UNIQUE_STA_ADDR);
0184
0185 dev->mt76.global_wcid.idx = 255;
0186 dev->mt76.global_wcid.hw_key_idx = -1;
0187 dev->slottime = 9;
0188
0189 if (is_mt76x2(dev)) {
0190 dev->mphy.sband_2g.sband.ht_cap.cap |=
0191 IEEE80211_HT_CAP_LDPC_CODING;
0192 dev->mphy.sband_5g.sband.ht_cap.cap |=
0193 IEEE80211_HT_CAP_LDPC_CODING;
0194 dev->mphy.chainmask = 0x202;
0195 dev->mphy.antenna_mask = 3;
0196 } else {
0197 dev->mphy.chainmask = 0x101;
0198 dev->mphy.antenna_mask = 1;
0199 }
0200
0201 return 0;
0202 }
0203 EXPORT_SYMBOL_GPL(mt76x02_init_device);
0204
0205 void mt76x02_configure_filter(struct ieee80211_hw *hw,
0206 unsigned int changed_flags,
0207 unsigned int *total_flags, u64 multicast)
0208 {
0209 struct mt76x02_dev *dev = hw->priv;
0210 u32 flags = 0;
0211
0212 #define MT76_FILTER(_flag, _hw) do { \
0213 flags |= *total_flags & FIF_##_flag; \
0214 dev->mt76.rxfilter &= ~(_hw); \
0215 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \
0216 } while (0)
0217
0218 mutex_lock(&dev->mt76.mutex);
0219
0220 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
0221
0222 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
0223 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
0224 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
0225 MT_RX_FILTR_CFG_CTS |
0226 MT_RX_FILTR_CFG_CFEND |
0227 MT_RX_FILTR_CFG_CFACK |
0228 MT_RX_FILTR_CFG_BA |
0229 MT_RX_FILTR_CFG_CTRL_RSV);
0230 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
0231
0232 *total_flags = flags;
0233 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
0234
0235 mutex_unlock(&dev->mt76.mutex);
0236 }
0237 EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
0238
0239 int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0240 struct ieee80211_sta *sta)
0241 {
0242 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
0243 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
0244 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
0245 int idx = 0;
0246
0247 memset(msta, 0, sizeof(*msta));
0248
0249 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT76x02_N_WCIDS);
0250 if (idx < 0)
0251 return -ENOSPC;
0252
0253 msta->vif = mvif;
0254 msta->wcid.sta = 1;
0255 msta->wcid.idx = idx;
0256 msta->wcid.hw_key_idx = -1;
0257 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
0258 mt76x02_mac_wcid_set_drop(dev, idx, false);
0259 ewma_pktlen_init(&msta->pktlen);
0260
0261 if (vif->type == NL80211_IFTYPE_AP)
0262 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
0263
0264 return 0;
0265 }
0266 EXPORT_SYMBOL_GPL(mt76x02_sta_add);
0267
0268 void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0269 struct ieee80211_sta *sta)
0270 {
0271 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
0272 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
0273 int idx = wcid->idx;
0274
0275 mt76x02_mac_wcid_set_drop(dev, idx, true);
0276 mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
0277 }
0278 EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
0279
0280 static void
0281 mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
0282 unsigned int idx)
0283 {
0284 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
0285 struct mt76_txq *mtxq;
0286
0287 memset(mvif, 0, sizeof(*mvif));
0288
0289 mvif->idx = idx;
0290 mvif->group_wcid.idx = MT_VIF_WCID(idx);
0291 mvif->group_wcid.hw_key_idx = -1;
0292 mt76_packet_id_init(&mvif->group_wcid);
0293
0294 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
0295 rcu_assign_pointer(dev->mt76.wcid[MT_VIF_WCID(idx)], &mvif->group_wcid);
0296 mtxq->wcid = MT_VIF_WCID(idx);
0297 }
0298
0299 int
0300 mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
0301 {
0302 struct mt76x02_dev *dev = hw->priv;
0303 unsigned int idx = 0;
0304
0305
0306 if (!dev->mt76.vif_mask &&
0307 (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
0308 memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
0309 mt76x02_mac_setaddr(dev, vif->addr);
0310
0311 if (vif->addr[0] & BIT(1))
0312 idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
0313
0314
0315
0316
0317
0318
0319
0320
0321
0322
0323
0324
0325
0326
0327 if (vif->type == NL80211_IFTYPE_STATION)
0328 idx += 8;
0329
0330
0331 if (dev->mt76.vif_mask & BIT_ULL(idx) ||
0332 (vif->type != NL80211_IFTYPE_STATION && idx > 7))
0333 return -EBUSY;
0334
0335 dev->mt76.vif_mask |= BIT_ULL(idx);
0336
0337 mt76x02_vif_init(dev, vif, idx);
0338 return 0;
0339 }
0340 EXPORT_SYMBOL_GPL(mt76x02_add_interface);
0341
0342 void mt76x02_remove_interface(struct ieee80211_hw *hw,
0343 struct ieee80211_vif *vif)
0344 {
0345 struct mt76x02_dev *dev = hw->priv;
0346 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
0347
0348 dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx);
0349 rcu_assign_pointer(dev->mt76.wcid[mvif->group_wcid.idx], NULL);
0350 mt76_packet_id_flush(&dev->mt76, &mvif->group_wcid);
0351 }
0352 EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
0353
0354 int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0355 struct ieee80211_ampdu_params *params)
0356 {
0357 enum ieee80211_ampdu_mlme_action action = params->action;
0358 struct ieee80211_sta *sta = params->sta;
0359 struct mt76x02_dev *dev = hw->priv;
0360 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
0361 struct ieee80211_txq *txq = sta->txq[params->tid];
0362 u16 tid = params->tid;
0363 u16 ssn = params->ssn;
0364 struct mt76_txq *mtxq;
0365 int ret = 0;
0366
0367 if (!txq)
0368 return -EINVAL;
0369
0370 mtxq = (struct mt76_txq *)txq->drv_priv;
0371
0372 mutex_lock(&dev->mt76.mutex);
0373 switch (action) {
0374 case IEEE80211_AMPDU_RX_START:
0375 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
0376 ssn, params->buf_size);
0377 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
0378 break;
0379 case IEEE80211_AMPDU_RX_STOP:
0380 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
0381 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
0382 BIT(16 + tid));
0383 break;
0384 case IEEE80211_AMPDU_TX_OPERATIONAL:
0385 mtxq->aggr = true;
0386 mtxq->send_bar = false;
0387 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
0388 break;
0389 case IEEE80211_AMPDU_TX_STOP_FLUSH:
0390 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
0391 mtxq->aggr = false;
0392 break;
0393 case IEEE80211_AMPDU_TX_START:
0394 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
0395 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
0396 break;
0397 case IEEE80211_AMPDU_TX_STOP_CONT:
0398 mtxq->aggr = false;
0399 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
0400 break;
0401 }
0402 mutex_unlock(&dev->mt76.mutex);
0403
0404 return ret;
0405 }
0406 EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
0407
0408 int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
0409 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
0410 struct ieee80211_key_conf *key)
0411 {
0412 struct mt76x02_dev *dev = hw->priv;
0413 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
0414 struct mt76x02_sta *msta;
0415 struct mt76_wcid *wcid;
0416 int idx = key->keyidx;
0417 int ret;
0418
0419
0420 switch (key->cipher) {
0421 case WLAN_CIPHER_SUITE_WEP40:
0422 case WLAN_CIPHER_SUITE_WEP104:
0423 case WLAN_CIPHER_SUITE_TKIP:
0424 case WLAN_CIPHER_SUITE_CCMP:
0425 break;
0426 default:
0427 return -EOPNOTSUPP;
0428 }
0429
0430
0431
0432
0433
0434 if ((vif->type == NL80211_IFTYPE_ADHOC ||
0435 vif->type == NL80211_IFTYPE_MESH_POINT) &&
0436 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
0437 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
0438 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
0439 return -EOPNOTSUPP;
0440
0441
0442
0443
0444
0445
0446 if (mt76_is_usb(&dev->mt76) &&
0447 vif->type == NL80211_IFTYPE_AP &&
0448 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
0449 return -EOPNOTSUPP;
0450
0451
0452 if (is_mt76x0(dev) && !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
0453 return -EOPNOTSUPP;
0454
0455 msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
0456 wcid = msta ? &msta->wcid : &mvif->group_wcid;
0457
0458 if (cmd == SET_KEY) {
0459 key->hw_key_idx = wcid->idx;
0460 wcid->hw_key_idx = idx;
0461 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
0462 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
0463 wcid->sw_iv = true;
0464 }
0465 } else {
0466 if (idx == wcid->hw_key_idx) {
0467 wcid->hw_key_idx = -1;
0468 wcid->sw_iv = false;
0469 }
0470
0471 key = NULL;
0472 }
0473 mt76_wcid_key_setup(&dev->mt76, wcid, key);
0474
0475 if (!msta) {
0476 if (key || wcid->hw_key_idx == idx) {
0477 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
0478 if (ret)
0479 return ret;
0480 }
0481
0482 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
0483 }
0484
0485 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
0486 }
0487 EXPORT_SYMBOL_GPL(mt76x02_set_key);
0488
0489 int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0490 unsigned int link_id, u16 queue,
0491 const struct ieee80211_tx_queue_params *params)
0492 {
0493 struct mt76x02_dev *dev = hw->priv;
0494 u8 cw_min = 5, cw_max = 10, qid;
0495 u32 val;
0496
0497 qid = dev->mphy.q_tx[queue]->hw_idx;
0498
0499 if (params->cw_min)
0500 cw_min = fls(params->cw_min);
0501 if (params->cw_max)
0502 cw_max = fls(params->cw_max);
0503
0504 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
0505 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
0506 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
0507 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
0508 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
0509
0510 val = mt76_rr(dev, MT_WMM_TXOP(qid));
0511 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
0512 val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
0513 mt76_wr(dev, MT_WMM_TXOP(qid), val);
0514
0515 val = mt76_rr(dev, MT_WMM_AIFSN);
0516 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
0517 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
0518 mt76_wr(dev, MT_WMM_AIFSN, val);
0519
0520 val = mt76_rr(dev, MT_WMM_CWMIN);
0521 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
0522 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
0523 mt76_wr(dev, MT_WMM_CWMIN, val);
0524
0525 val = mt76_rr(dev, MT_WMM_CWMAX);
0526 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
0527 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
0528 mt76_wr(dev, MT_WMM_CWMAX, val);
0529
0530 return 0;
0531 }
0532 EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
0533
0534 void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
0535 {
0536 u8 ackto, sifs, slottime = dev->slottime;
0537
0538
0539 slottime += 3 * dev->coverage_class;
0540 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
0541 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
0542
0543 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
0544 MT_XIFS_TIME_CFG_OFDM_SIFS);
0545
0546 ackto = slottime + sifs;
0547 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
0548 MT_TX_TIMEOUT_CFG_ACKTO, ackto);
0549 }
0550 EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
0551
0552 void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
0553 s16 coverage_class)
0554 {
0555 struct mt76x02_dev *dev = hw->priv;
0556
0557 mutex_lock(&dev->mt76.mutex);
0558 dev->coverage_class = max_t(s16, coverage_class, 0);
0559 mt76x02_set_tx_ackto(dev);
0560 mutex_unlock(&dev->mt76.mutex);
0561 }
0562 EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
0563
0564 int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
0565 {
0566 struct mt76x02_dev *dev = hw->priv;
0567
0568 if (val != ~0 && val > 0xffff)
0569 return -EINVAL;
0570
0571 mutex_lock(&dev->mt76.mutex);
0572 mt76x02_mac_set_rts_thresh(dev, val);
0573 mutex_unlock(&dev->mt76.mutex);
0574
0575 return 0;
0576 }
0577 EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
0578
0579 void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
0580 struct ieee80211_vif *vif,
0581 struct ieee80211_sta *sta)
0582 {
0583 struct mt76x02_dev *dev = hw->priv;
0584 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
0585 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
0586 struct ieee80211_tx_rate rate = {};
0587
0588 if (!rates)
0589 return;
0590
0591 rate.idx = rates->rate[0].idx;
0592 rate.flags = rates->rate[0].flags;
0593 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
0594 }
0595 EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
0596
0597 void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
0598 {
0599 int hdrlen;
0600
0601 if (!len)
0602 return;
0603
0604 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
0605 memmove(skb->data + len, skb->data, hdrlen);
0606 skb_pull(skb, len);
0607 }
0608 EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
0609
0610 void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
0611 struct ieee80211_vif *vif)
0612 {
0613 struct mt76x02_dev *dev = hw->priv;
0614
0615 clear_bit(MT76_SCANNING, &dev->mphy.state);
0616 if (dev->cal.gain_init_done) {
0617
0618 dev->cal.low_gain = -1;
0619 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
0620 }
0621 }
0622 EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
0623
0624 void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
0625 bool ps)
0626 {
0627 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
0628 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
0629 int idx = msta->wcid.idx;
0630
0631 mt76_stop_tx_queues(&dev->mphy, sta, true);
0632 if (mt76_is_mmio(mdev))
0633 mt76x02_mac_wcid_set_drop(dev, idx, ps);
0634 }
0635 EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
0636
0637 void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
0638 struct ieee80211_vif *vif,
0639 struct ieee80211_bss_conf *info,
0640 u64 changed)
0641 {
0642 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
0643 struct mt76x02_dev *dev = hw->priv;
0644
0645 mutex_lock(&dev->mt76.mutex);
0646
0647 if (changed & BSS_CHANGED_BSSID)
0648 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
0649
0650 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
0651 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
0652 info->ht_operation_mode);
0653
0654 if (changed & BSS_CHANGED_BEACON_INT) {
0655 mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
0656 MT_BEACON_TIME_CFG_INTVAL,
0657 info->beacon_int << 4);
0658 dev->mt76.beacon_int = info->beacon_int;
0659 }
0660
0661 if (changed & BSS_CHANGED_BEACON_ENABLED)
0662 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
0663
0664 if (changed & BSS_CHANGED_ERP_PREAMBLE)
0665 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
0666
0667 if (changed & BSS_CHANGED_ERP_SLOT) {
0668 int slottime = info->use_short_slot ? 9 : 20;
0669
0670 dev->slottime = slottime;
0671 mt76x02_set_tx_ackto(dev);
0672 }
0673
0674 mutex_unlock(&dev->mt76.mutex);
0675 }
0676 EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
0677
0678 void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
0679 {
0680 struct ieee80211_hw *hw = mt76_hw(dev);
0681 struct wiphy *wiphy = hw->wiphy;
0682 int i;
0683
0684 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
0685 u8 *addr = dev->macaddr_list[i].addr;
0686
0687 memcpy(addr, dev->mphy.macaddr, ETH_ALEN);
0688
0689 if (!i)
0690 continue;
0691
0692 addr[0] |= BIT(1);
0693 addr[0] ^= ((i - 1) << 2);
0694 }
0695 wiphy->addresses = dev->macaddr_list;
0696 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
0697 }
0698 EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
0699
0700 MODULE_LICENSE("Dual BSD/GPL");