mt76/mt7615/usb_sdio.c

0001 // SPDX-License-Identifier: ISC
0002 /* Copyright (C) 2020 MediaTek Inc.
0003  *
0004  * Author: Lorenzo Bianconi <lorenzo@kernel.org>
0005  *     Sean Wang <sean.wang@mediatek.com>
0006  */
0007
0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/usb.h>
0011
0012 #include "mt7615.h"
0013 #include "mac.h"
0014 #include "mcu.h"
0015 #include "regs.h"
0016
0017 const u32 mt7663_usb_sdio_reg_map[] = {
0018     [MT_TOP_CFG_BASE]   = 0x80020000,
0019     [MT_HW_BASE]        = 0x80000000,
0020     [MT_DMA_SHDL_BASE]  = 0x5000a000,
0021     [MT_HIF_BASE]       = 0x50000000,
0022     [MT_CSR_BASE]       = 0x40000000,
0023     [MT_EFUSE_ADDR_BASE]    = 0x78011000,
0024     [MT_TOP_MISC_BASE]  = 0x81020000,
0025     [MT_PLE_BASE]       = 0x82060000,
0026     [MT_PSE_BASE]       = 0x82068000,
0027     [MT_PP_BASE]        = 0x8206c000,
0028     [MT_WTBL_BASE_ADDR] = 0x820e0000,
0029     [MT_CFG_BASE]       = 0x820f0000,
0030     [MT_AGG_BASE]       = 0x820f2000,
0031     [MT_ARB_BASE]       = 0x820f3000,
0032     [MT_TMAC_BASE]      = 0x820f4000,
0033     [MT_RMAC_BASE]      = 0x820f5000,
0034     [MT_DMA_BASE]       = 0x820f7000,
0035     [MT_PF_BASE]        = 0x820f8000,
0036     [MT_WTBL_BASE_ON]   = 0x820f9000,
0037     [MT_WTBL_BASE_OFF]  = 0x820f9800,
0038     [MT_LPON_BASE]      = 0x820fb000,
0039     [MT_MIB_BASE]       = 0x820fd000,
0040 };
0041 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_reg_map);
0042
0043 static void
0044 mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid,
0045                enum mt76_txq_id qid, struct ieee80211_sta *sta,
0046                struct ieee80211_key_conf *key, int pid,
0047                struct sk_buff *skb)
0048 {
0049     __le32 *txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE);
0050
0051     memset(txwi, 0, MT_USB_TXD_SIZE);
0052     mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, qid, false);
0053     skb_push(skb, MT_USB_TXD_SIZE);
0054 }
0055
0056 static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev,
0057                      struct mt7615_wtbl_rate_desc *wrd)
0058 {
0059     struct mt7615_rate_desc *rate = &wrd->rate;
0060     struct mt7615_sta *sta = wrd->sta;
0061     u32 w5, w27, addr, val;
0062     u16 idx;
0063
0064     lockdep_assert_held(&dev->mt76.mutex);
0065
0066     if (!sta)
0067         return -EINVAL;
0068
0069     if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
0070         return -ETIMEDOUT;
0071
0072     addr = mt7615_mac_wtbl_addr(dev, sta->wcid.idx);
0073
0074     w27 = mt76_rr(dev, addr + 27 * 4);
0075     w27 &= ~MT_WTBL_W27_CC_BW_SEL;
0076     w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw);
0077
0078     w5 = mt76_rr(dev, addr + 5 * 4);
0079     w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE |
0080         MT_WTBL_W5_MPDU_OK_COUNT |
0081         MT_WTBL_W5_MPDU_FAIL_COUNT |
0082         MT_WTBL_W5_RATE_IDX);
0083     w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) |
0084           FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,
0085              rate->bw_idx ? rate->bw_idx - 1 : 7);
0086
0087     mt76_wr(dev, MT_WTBL_RIUCR0, w5);
0088
0089     mt76_wr(dev, MT_WTBL_RIUCR1,
0090         FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) |
0091         FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) |
0092         FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1]));
0093
0094     mt76_wr(dev, MT_WTBL_RIUCR2,
0095         FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) |
0096         FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) |
0097         FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) |
0098         FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2]));
0099
0100     mt76_wr(dev, MT_WTBL_RIUCR3,
0101         FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rate->val[2] >> 4) |
0102         FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rate->val[3]) |
0103         FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rate->val[3]));
0104
0105     mt76_wr(dev, MT_WTBL_UPDATE,
0106         FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, sta->wcid.idx) |
0107         MT_WTBL_UPDATE_RATE_UPDATE |
0108         MT_WTBL_UPDATE_TX_COUNT_CLEAR);
0109
0110     mt76_wr(dev, addr + 27 * 4, w27);
0111
0112     sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1;
0113
0114     idx = sta->vif->mt76.omac_idx;
0115     idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
0116     addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
0117
0118     mt76_rmw(dev, addr, MT_LPON_TCR_MODE, MT_LPON_TCR_READ); /* TSF read */
0119     val = mt76_rr(dev, MT_LPON_UTTR0);
0120     sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset;
0121
0122     if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET))
0123         mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000);
0124
0125     sta->rate_count = 2 * MT7615_RATE_RETRY * sta->n_rates;
0126     sta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
0127
0128     return 0;
0129 }
0130
0131 static void mt7663_usb_sdio_rate_work(struct work_struct *work)
0132 {
0133     struct mt7615_wtbl_rate_desc *wrd, *wrd_next;
0134     struct list_head wrd_list;
0135     struct mt7615_dev *dev;
0136
0137     dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
0138                         rate_work);
0139
0140     INIT_LIST_HEAD(&wrd_list);
0141     spin_lock_bh(&dev->mt76.lock);
0142     list_splice_init(&dev->wrd_head, &wrd_list);
0143     spin_unlock_bh(&dev->mt76.lock);
0144
0145     list_for_each_entry_safe(wrd, wrd_next, &wrd_list, node) {
0146         list_del(&wrd->node);
0147
0148         mt7615_mutex_acquire(dev);
0149         mt7663_usb_sdio_set_rates(dev, wrd);
0150         mt7615_mutex_release(dev);
0151
0152         kfree(wrd);
0153     }
0154 }
0155
0156 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
0157 {
0158     struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
0159
0160     mt7615_mutex_acquire(dev);
0161     mt7615_mac_sta_poll(dev);
0162     mt7615_mutex_release(dev);
0163
0164     return false;
0165 }
0166 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_status_data);
0167
0168 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
0169                      struct mt76_queue_entry *e)
0170 {
0171     unsigned int headroom = MT_USB_TXD_SIZE;
0172
0173     if (mt76_is_usb(mdev))
0174         headroom += MT_USB_HDR_SIZE;
0175     skb_pull(e->skb, headroom);
0176
0177     mt76_tx_complete_skb(mdev, e->wcid, e->skb);
0178 }
0179 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_complete_skb);
0180
0181 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
0182                    enum mt76_txq_id qid, struct mt76_wcid *wcid,
0183                    struct ieee80211_sta *sta,
0184                    struct mt76_tx_info *tx_info)
0185 {
0186     struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
0187     struct sk_buff *skb = tx_info->skb;
0188     struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
0189     struct ieee80211_key_conf *key = info->control.hw_key;
0190     struct mt7615_sta *msta;
0191     int pad, err, pktid;
0192
0193     msta = wcid ? container_of(wcid, struct mt7615_sta, wcid) : NULL;
0194     if (!wcid)
0195         wcid = &dev->mt76.global_wcid;
0196
0197     if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) &&
0198         msta && !msta->rate_probe) {
0199         /* request to configure sampling rate */
0200         spin_lock_bh(&dev->mt76.lock);
0201         mt7615_mac_set_rates(&dev->phy, msta, &info->control.rates[0],
0202                      msta->rates);
0203         spin_unlock_bh(&dev->mt76.lock);
0204     }
0205
0206     pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
0207     mt7663_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
0208     if (mt76_is_usb(mdev)) {
0209         u32 len = skb->len;
0210
0211         put_unaligned_le32(len, skb_push(skb, sizeof(len)));
0212         pad = round_up(skb->len, 4) + 4 - skb->len;
0213     } else {
0214         pad = round_up(skb->len, 4) - skb->len;
0215     }
0216
0217     err = mt76_skb_adjust_pad(skb, pad);
0218     if (err)
0219         /* Release pktid in case of error. */
0220         idr_remove(&wcid->pktid, pktid);
0221
0222     return err;
0223 }
0224 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_prepare_skb);
0225
0226 static int mt7663u_dma_sched_init(struct mt7615_dev *dev)
0227 {
0228     int i;
0229
0230     mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE),
0231          MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE,
0232          FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |
0233          FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));
0234
0235     /* disable refill group 5 - group 15 and raise group 2
0236      * and 3 as high priority.
0237      */
0238     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006);
0239     mt76_clear(dev, MT_DMA_SHDL(MT_DMASHDL_PAGE), BIT(16));
0240
0241     for (i = 0; i < 5; i++)
0242         mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)),
0243             FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |
0244             FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x1ff));
0245
0246     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210);
0247     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210);
0248
0249     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x4444);
0250
0251     /* group pririority from high to low:
0252      * 15 (cmd groups) > 4 > 3 > 2 > 1 > 0.
0253      */
0254     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6501234f);
0255     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987);
0256     mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x7004801c);
0257
0258     mt76_wr(dev, MT_UDMA_WLCFG_1,
0259         FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) |
0260         FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1));
0261
0262     /* setup UDMA Rx Flush */
0263     mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
0264     /* hif reset */
0265     mt76_set(dev, MT_HIF_RST, MT_HIF_LOGIC_RST_N);
0266
0267     mt76_set(dev, MT_UDMA_WLCFG_0,
0268          MT_WL_RX_AGG_EN | MT_WL_RX_EN | MT_WL_TX_EN |
0269          MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN |
0270          MT_WL_TX_TMOUT_FUNC_EN);
0271     mt76_rmw(dev, MT_UDMA_WLCFG_0, MT_WL_RX_AGG_LMT | MT_WL_RX_AGG_TO,
0272          FIELD_PREP(MT_WL_RX_AGG_LMT, 32) |
0273          FIELD_PREP(MT_WL_RX_AGG_TO, 100));
0274
0275     return 0;
0276 }
0277
0278 static int mt7663_usb_sdio_init_hardware(struct mt7615_dev *dev)
0279 {
0280     int ret, idx;
0281
0282     ret = mt7615_eeprom_init(dev, MT_EFUSE_BASE);
0283     if (ret < 0)
0284         return ret;
0285
0286     if (mt76_is_usb(&dev->mt76)) {
0287         ret = mt7663u_dma_sched_init(dev);
0288         if (ret)
0289             return ret;
0290     }
0291
0292     set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
0293
0294     /* Beacon and mgmt frames should occupy wcid 0 */
0295     idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
0296     if (idx)
0297         return -ENOSPC;
0298
0299     dev->mt76.global_wcid.idx = idx;
0300     dev->mt76.global_wcid.hw_key_idx = -1;
0301     rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
0302
0303     return 0;
0304 }
0305
0306 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev)
0307 {
0308     struct ieee80211_hw *hw = mt76_hw(dev);
0309     int err;
0310
0311     INIT_WORK(&dev->rate_work, mt7663_usb_sdio_rate_work);
0312     INIT_LIST_HEAD(&dev->wrd_head);
0313     mt7615_init_device(dev);
0314
0315     err = mt7663_usb_sdio_init_hardware(dev);
0316     if (err)
0317         return err;
0318
0319     hw->extra_tx_headroom += MT_USB_TXD_SIZE;
0320     if (mt76_is_usb(&dev->mt76)) {
0321         hw->extra_tx_headroom += MT_USB_HDR_SIZE;
0322         /* check hw sg support in order to enable AMSDU */
0323         if (dev->mt76.usb.sg_en)
0324             hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
0325         else
0326             hw->max_tx_fragments = 1;
0327     }
0328
0329     err = mt76_register_device(&dev->mt76, true, mt76_rates,
0330                    ARRAY_SIZE(mt76_rates));
0331     if (err < 0)
0332         return err;
0333
0334     if (!dev->mt76.usb.sg_en) {
0335         struct ieee80211_sta_vht_cap *vht_cap;
0336
0337         /* decrease max A-MSDU size if SG is not supported */
0338         vht_cap = &dev->mphy.sband_5g.sband.vht_cap;
0339         vht_cap->cap &= ~IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
0340     }
0341
0342     ieee80211_queue_work(hw, &dev->mcu_work);
0343     mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband);
0344     mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband);
0345
0346     return mt7615_init_debugfs(dev);
0347 }
0348 EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device);
0349
0350 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
0351 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
0352 MODULE_LICENSE("Dual BSD/GPL");