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0001 /* SPDX-License-Identifier: ISC */
0002 /* Copyright (C) 2019 MediaTek Inc. */
0003 
0004 #ifndef __MT7615_H
0005 #define __MT7615_H
0006 
0007 #include <linux/completion.h>
0008 #include <linux/interrupt.h>
0009 #include <linux/ktime.h>
0010 #include <linux/regmap.h>
0011 #include "../mt76_connac_mcu.h"
0012 #include "regs.h"
0013 
0014 #define MT7615_MAX_INTERFACES       16
0015 #define MT7615_MAX_WMM_SETS     4
0016 #define MT7663_WTBL_SIZE        32
0017 #define MT7615_WTBL_SIZE        128
0018 #define MT7615_WTBL_RESERVED        (mt7615_wtbl_size(dev) - 1)
0019 #define MT7615_WTBL_STA         (MT7615_WTBL_RESERVED - \
0020                      MT7615_MAX_INTERFACES)
0021 
0022 #define MT7615_PM_TIMEOUT       (HZ / 12)
0023 #define MT7615_HW_SCAN_TIMEOUT      (HZ / 10)
0024 #define MT7615_RESET_TIMEOUT        (30 * HZ)
0025 #define MT7615_RATE_RETRY       2
0026 
0027 #define MT7615_TX_RING_SIZE     1024
0028 #define MT7615_TX_MGMT_RING_SIZE    128
0029 #define MT7615_TX_MCU_RING_SIZE     128
0030 #define MT7615_TX_FWDL_RING_SIZE    128
0031 
0032 #define MT7615_RX_RING_SIZE     1024
0033 #define MT7615_RX_MCU_RING_SIZE     512
0034 
0035 #define MT7615_DRV_OWN_RETRY_COUNT  10
0036 
0037 #define MT7615_FIRMWARE_CR4     "mediatek/mt7615_cr4.bin"
0038 #define MT7615_FIRMWARE_N9      "mediatek/mt7615_n9.bin"
0039 #define MT7615_ROM_PATCH        "mediatek/mt7615_rom_patch.bin"
0040 
0041 #define MT7622_FIRMWARE_N9      "mediatek/mt7622_n9.bin"
0042 #define MT7622_ROM_PATCH        "mediatek/mt7622_rom_patch.bin"
0043 
0044 #define MT7615_FIRMWARE_V1      1
0045 #define MT7615_FIRMWARE_V2      2
0046 #define MT7615_FIRMWARE_V3      3
0047 
0048 #define MT7663_OFFLOAD_ROM_PATCH    "mediatek/mt7663pr2h.bin"
0049 #define MT7663_OFFLOAD_FIRMWARE_N9  "mediatek/mt7663_n9_v3.bin"
0050 #define MT7663_ROM_PATCH        "mediatek/mt7663pr2h_rebb.bin"
0051 #define MT7663_FIRMWARE_N9      "mediatek/mt7663_n9_rebb.bin"
0052 
0053 #define MT7615_EEPROM_SIZE      1024
0054 #define MT7615_TOKEN_SIZE       4096
0055 
0056 #define MT_FRAC_SCALE       12
0057 #define MT_FRAC(val, div)   (((val) << MT_FRAC_SCALE) / (div))
0058 
0059 #define MT_CHFREQ_VALID     BIT(7)
0060 #define MT_CHFREQ_DBDC_IDX  BIT(6)
0061 #define MT_CHFREQ_SEQ       GENMASK(5, 0)
0062 
0063 #define MT7615_BAR_RATE_DEFAULT     0x4b /* OFDM 6M */
0064 #define MT7615_CFEND_RATE_DEFAULT   0x49 /* OFDM 24M */
0065 #define MT7615_CFEND_RATE_11B       0x03 /* 11B LP, 11M */
0066 
0067 struct mt7615_vif;
0068 struct mt7615_sta;
0069 struct mt7615_dfs_pulse;
0070 struct mt7615_dfs_pattern;
0071 enum mt7615_cipher_type;
0072 
0073 enum mt7615_hw_txq_id {
0074     MT7615_TXQ_MAIN,
0075     MT7615_TXQ_EXT,
0076     MT7615_TXQ_MCU,
0077     MT7615_TXQ_FWDL,
0078 };
0079 
0080 enum mt7622_hw_txq_id {
0081     MT7622_TXQ_AC0,
0082     MT7622_TXQ_AC1,
0083     MT7622_TXQ_AC2,
0084     MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
0085     MT7622_TXQ_AC3,
0086     MT7622_TXQ_MGMT,
0087     MT7622_TXQ_MCU = 15,
0088 };
0089 
0090 struct mt7615_rate_set {
0091     struct ieee80211_tx_rate probe_rate;
0092     struct ieee80211_tx_rate rates[4];
0093 };
0094 
0095 struct mt7615_rate_desc {
0096     bool rateset;
0097     u16 probe_val;
0098     u16 val[4];
0099     u8 bw_idx;
0100     u8 bw;
0101 };
0102 
0103 struct mt7615_wtbl_rate_desc {
0104     struct list_head node;
0105 
0106     struct mt7615_rate_desc rate;
0107     struct mt7615_sta *sta;
0108 };
0109 
0110 struct mt7663s_intr {
0111     u32 isr;
0112     struct {
0113         u32 wtqcr[8];
0114     } tx;
0115     struct {
0116         u16 num[2];
0117         u16 len[2][16];
0118     } rx;
0119     u32 rec_mb[2];
0120 } __packed;
0121 
0122 struct mt7615_sta {
0123     struct mt76_wcid wcid; /* must be first */
0124 
0125     struct mt7615_vif *vif;
0126 
0127     struct list_head poll_list;
0128     u32 airtime_ac[8];
0129 
0130     struct ieee80211_tx_rate rates[4];
0131 
0132     struct mt7615_rate_set rateset[2];
0133     u32 rate_set_tsf;
0134 
0135     u8 rate_count;
0136     u8 n_rates;
0137 
0138     u8 rate_probe;
0139 };
0140 
0141 struct mt7615_vif {
0142     struct mt76_vif mt76; /* must be first */
0143     struct mt7615_sta sta;
0144     bool sta_added;
0145 };
0146 
0147 struct mib_stats {
0148     u32 ack_fail_cnt;
0149     u32 fcs_err_cnt;
0150     u32 rts_cnt;
0151     u32 rts_retries_cnt;
0152     u32 ba_miss_cnt;
0153     unsigned long aggr_per;
0154 };
0155 
0156 struct mt7615_phy {
0157     struct mt76_phy *mt76;
0158     struct mt7615_dev *dev;
0159 
0160     struct ieee80211_vif *monitor_vif;
0161 
0162     u8 n_beacon_vif;
0163 
0164     u32 rxfilter;
0165     u64 omac_mask;
0166 
0167     u16 noise;
0168 
0169     bool scs_en;
0170 
0171     unsigned long last_cca_adj;
0172     int false_cca_ofdm, false_cca_cck;
0173     s8 ofdm_sensitivity;
0174     s8 cck_sensitivity;
0175 
0176     s16 coverage_class;
0177     u8 slottime;
0178 
0179     u8 chfreq;
0180     u8 rdd_state;
0181 
0182     u32 rx_ampdu_ts;
0183     u32 ampdu_ref;
0184 
0185     struct mib_stats mib;
0186 
0187     struct sk_buff_head scan_event_list;
0188     struct delayed_work scan_work;
0189 
0190     struct work_struct roc_work;
0191     struct timer_list roc_timer;
0192     wait_queue_head_t roc_wait;
0193     bool roc_grant;
0194 
0195 #ifdef CONFIG_NL80211_TESTMODE
0196     struct {
0197         u32 *reg_backup;
0198 
0199         s16 last_freq_offset;
0200         u8 last_rcpi[4];
0201         s8 last_ib_rssi[4];
0202         s8 last_wb_rssi[4];
0203     } test;
0204 #endif
0205 };
0206 
0207 #define mt7615_mcu_add_tx_ba(dev, ...)  (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
0208 #define mt7615_mcu_add_rx_ba(dev, ...)  (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
0209 #define mt7615_mcu_sta_add(phy, ...)    ((phy)->dev)->mcu_ops->sta_add((phy),  __VA_ARGS__)
0210 #define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy),  __VA_ARGS__)
0211 #define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy),  __VA_ARGS__)
0212 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev),  __VA_ARGS__)
0213 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev),  __VA_ARGS__)
0214 #define mt7615_mcu_set_drv_ctrl(dev)    (dev)->mcu_ops->set_drv_ctrl((dev))
0215 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
0216 #define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__)
0217 struct mt7615_mcu_ops {
0218     int (*add_tx_ba)(struct mt7615_dev *dev,
0219              struct ieee80211_ampdu_params *params,
0220              bool enable);
0221     int (*add_rx_ba)(struct mt7615_dev *dev,
0222              struct ieee80211_ampdu_params *params,
0223              bool enable);
0224     int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
0225                struct ieee80211_sta *sta, bool enable);
0226     int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
0227                 bool enable);
0228     int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
0229                 struct ieee80211_sta *sta, bool enable);
0230     int (*add_beacon_offload)(struct mt7615_dev *dev,
0231                   struct ieee80211_hw *hw,
0232                   struct ieee80211_vif *vif, bool enable);
0233     int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
0234     int (*set_drv_ctrl)(struct mt7615_dev *dev);
0235     int (*set_fw_ctrl)(struct mt7615_dev *dev);
0236     int (*set_sta_decap_offload)(struct mt7615_dev *dev,
0237                      struct ieee80211_vif *vif,
0238                      struct ieee80211_sta *sta);
0239 };
0240 
0241 struct mt7615_dev {
0242     union { /* must be first */
0243         struct mt76_dev mt76;
0244         struct mt76_phy mphy;
0245     };
0246 
0247     const struct mt76_bus_ops *bus_ops;
0248     struct tasklet_struct irq_tasklet;
0249 
0250     struct mt7615_phy phy;
0251     u64 omac_mask;
0252 
0253     u16 chainmask;
0254 
0255     struct ieee80211_ops *ops;
0256     const struct mt7615_mcu_ops *mcu_ops;
0257     struct regmap *infracfg;
0258     const u32 *reg_map;
0259 
0260     struct work_struct mcu_work;
0261 
0262     struct work_struct reset_work;
0263     wait_queue_head_t reset_wait;
0264     u32 reset_state;
0265 
0266     struct list_head sta_poll_list;
0267     spinlock_t sta_poll_lock;
0268 
0269     struct {
0270         u8 n_pulses;
0271         u32 period;
0272         u16 width;
0273         s16 power;
0274     } radar_pattern;
0275     u32 hw_pattern;
0276 
0277     bool fw_debug;
0278     bool flash_eeprom;
0279     bool dbdc_support;
0280 
0281     u8 fw_ver;
0282 
0283     struct work_struct rate_work;
0284     struct list_head wrd_head;
0285 
0286     u32 debugfs_rf_wf;
0287     u32 debugfs_rf_reg;
0288 
0289     u32 muar_mask;
0290 
0291     struct mt76_connac_pm pm;
0292     struct mt76_connac_coredump coredump;
0293 };
0294 
0295 enum tx_pkt_queue_idx {
0296     MT_LMAC_AC00,
0297     MT_LMAC_AC01,
0298     MT_LMAC_AC02,
0299     MT_LMAC_AC03,
0300     MT_LMAC_ALTX0 = 0x10,
0301     MT_LMAC_BMC0,
0302     MT_LMAC_BCN0,
0303     MT_LMAC_PSMP0,
0304     MT_LMAC_ALTX1,
0305     MT_LMAC_BMC1,
0306     MT_LMAC_BCN1,
0307     MT_LMAC_PSMP1,
0308 };
0309 
0310 enum {
0311     MT_RX_SEL0,
0312     MT_RX_SEL1,
0313 };
0314 
0315 enum mt7615_rdd_cmd {
0316     RDD_STOP,
0317     RDD_START,
0318     RDD_DET_MODE,
0319     RDD_DET_STOP,
0320     RDD_CAC_START,
0321     RDD_CAC_END,
0322     RDD_NORMAL_START,
0323     RDD_DISABLE_DFS_CAL,
0324     RDD_PULSE_DBG,
0325     RDD_READ_PULSE,
0326     RDD_RESUME_BF,
0327 };
0328 
0329 static inline struct mt7615_phy *
0330 mt7615_hw_phy(struct ieee80211_hw *hw)
0331 {
0332     struct mt76_phy *phy = hw->priv;
0333 
0334     return phy->priv;
0335 }
0336 
0337 static inline struct mt7615_dev *
0338 mt7615_hw_dev(struct ieee80211_hw *hw)
0339 {
0340     struct mt76_phy *phy = hw->priv;
0341 
0342     return container_of(phy->dev, struct mt7615_dev, mt76);
0343 }
0344 
0345 static inline struct mt7615_phy *
0346 mt7615_ext_phy(struct mt7615_dev *dev)
0347 {
0348     struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
0349 
0350     if (!phy)
0351         return NULL;
0352 
0353     return phy->priv;
0354 }
0355 
0356 extern struct ieee80211_rate mt7615_rates[12];
0357 extern const struct ieee80211_ops mt7615_ops;
0358 extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
0359 extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
0360 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
0361 extern struct pci_driver mt7615_pci_driver;
0362 extern struct platform_driver mt7622_wmac_driver;
0363 extern const struct mt76_testmode_ops mt7615_testmode_ops;
0364 
0365 #ifdef CONFIG_MT7622_WMAC
0366 int mt7622_wmac_init(struct mt7615_dev *dev);
0367 #else
0368 static inline int mt7622_wmac_init(struct mt7615_dev *dev)
0369 {
0370     return 0;
0371 }
0372 #endif
0373 
0374 int mt7615_thermal_init(struct mt7615_dev *dev);
0375 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
0376               int irq, const u32 *map);
0377 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
0378 
0379 void mt7615_init_device(struct mt7615_dev *dev);
0380 int mt7615_register_device(struct mt7615_dev *dev);
0381 void mt7615_unregister_device(struct mt7615_dev *dev);
0382 int mt7615_register_ext_phy(struct mt7615_dev *dev);
0383 void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
0384 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
0385 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
0386                      struct ieee80211_channel *chan,
0387                      u8 chain_idx);
0388 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
0389                     enum nl80211_band band);
0390 int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
0391 int mt7615_dma_init(struct mt7615_dev *dev);
0392 void mt7615_dma_start(struct mt7615_dev *dev);
0393 void mt7615_dma_cleanup(struct mt7615_dev *dev);
0394 int mt7615_mcu_init(struct mt7615_dev *dev);
0395 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
0396 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
0397               struct ieee80211_tx_rate *probe_rate,
0398               struct ieee80211_tx_rate *rates);
0399 void mt7615_pm_wake_work(struct work_struct *work);
0400 void mt7615_pm_power_save_work(struct work_struct *work);
0401 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
0402 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
0403 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
0404                const struct ieee80211_tx_queue_params *params);
0405 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
0406 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
0407 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
0408 
0409 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
0410 {
0411     mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
0412 
0413     tasklet_schedule(&dev->irq_tasklet);
0414 }
0415 
0416 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
0417 {
0418     return dev->fw_ver > MT7615_FIRMWARE_V2;
0419 }
0420 
0421 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
0422 {
0423     if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
0424         return MT7663_WTBL_SIZE;
0425     else
0426         return MT7615_WTBL_SIZE;
0427 }
0428 
0429 #define mt7615_mutex_acquire(dev)   \
0430     mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
0431 #define mt7615_mutex_release(dev)   \
0432     mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
0433 
0434 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
0435 {
0436     static const u8 lmac_queue_map[] = {
0437         [IEEE80211_AC_BK] = MT_LMAC_AC00,
0438         [IEEE80211_AC_BE] = MT_LMAC_AC01,
0439         [IEEE80211_AC_VI] = MT_LMAC_AC02,
0440         [IEEE80211_AC_VO] = MT_LMAC_AC03,
0441     };
0442 
0443     if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
0444         return MT_LMAC_AC01; /* BE */
0445 
0446     return lmac_queue_map[ac];
0447 }
0448 
0449 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
0450 {
0451     return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
0452 }
0453 
0454 static inline unsigned long
0455 mt7615_get_macwork_timeout(struct mt7615_dev *dev)
0456 {
0457     return dev->pm.enable ? HZ / 3 : HZ / 10;
0458 }
0459 
0460 void mt7615_dma_reset(struct mt7615_dev *dev);
0461 void mt7615_scan_work(struct work_struct *work);
0462 void mt7615_roc_work(struct work_struct *work);
0463 void mt7615_roc_timer(struct timer_list *timer);
0464 void mt7615_init_txpower(struct mt7615_dev *dev,
0465              struct ieee80211_supported_band *sband);
0466 int mt7615_set_channel(struct mt7615_phy *phy);
0467 void mt7615_init_work(struct mt7615_dev *dev);
0468 
0469 int mt7615_mcu_restart(struct mt76_dev *dev);
0470 void mt7615_update_channel(struct mt76_phy *mphy);
0471 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
0472 void mt7615_mac_reset_counters(struct mt7615_dev *dev);
0473 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
0474 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
0475 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
0476 void mt7615_mac_sta_poll(struct mt7615_dev *dev);
0477 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
0478               struct sk_buff *skb, struct mt76_wcid *wcid,
0479               struct ieee80211_sta *sta, int pid,
0480               struct ieee80211_key_conf *key,
0481               enum mt76_txq_id qid, bool beacon);
0482 void mt7615_mac_set_timing(struct mt7615_phy *phy);
0483 int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
0484                   struct mt76_wcid *wcid,
0485                   struct ieee80211_key_conf *key,
0486                   enum set_key_cmd cmd);
0487 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
0488                 struct ieee80211_key_conf *key,
0489                 enum set_key_cmd cmd);
0490 void mt7615_mac_reset_work(struct work_struct *work);
0491 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
0492 
0493 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
0494                   struct sk_buff *skb, int seq);
0495 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
0496 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
0497 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
0498 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
0499 int mt7615_mcu_get_temperature(struct mt7615_dev *dev);
0500 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
0501 void mt7615_mcu_exit(struct mt7615_dev *dev);
0502 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
0503              int cmd, int *wait_seq);
0504 
0505 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
0506               enum mt76_txq_id qid, struct mt76_wcid *wcid,
0507               struct ieee80211_sta *sta,
0508               struct mt76_tx_info *tx_info);
0509 
0510 void mt7615_tx_worker(struct mt76_worker *w);
0511 void mt7615_tx_token_put(struct mt7615_dev *dev);
0512 bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len);
0513 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
0514              struct sk_buff *skb);
0515 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
0516 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0517                struct ieee80211_sta *sta);
0518 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0519                struct ieee80211_sta *sta);
0520 void mt7615_mac_work(struct work_struct *work);
0521 int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);
0522 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
0523 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
0524                 const struct mt7615_dfs_pulse *pulse);
0525 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
0526                 const struct mt7615_dfs_pattern *pattern);
0527 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
0528                   u32 val);
0529 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
0530 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
0531 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
0532 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
0533 
0534 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
0535                struct ieee80211_channel *chan, int duration);
0536 
0537 int mt7615_init_debugfs(struct mt7615_dev *dev);
0538 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
0539 
0540 int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
0541                  struct ieee80211_vif *vif,
0542                  bool enable);
0543 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
0544               bool enable);
0545 int __mt7663_load_firmware(struct mt7615_dev *dev);
0546 void mt7615_coredump_work(struct work_struct *work);
0547 
0548 void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en);
0549 
0550 /* usb */
0551 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
0552                    enum mt76_txq_id qid, struct mt76_wcid *wcid,
0553                    struct ieee80211_sta *sta,
0554                    struct mt76_tx_info *tx_info);
0555 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
0556 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
0557                      struct mt76_queue_entry *e);
0558 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
0559 int mt7663u_mcu_init(struct mt7615_dev *dev);
0560 int mt7663u_mcu_power_on(struct mt7615_dev *dev);
0561 
0562 /* sdio */
0563 int mt7663s_mcu_init(struct mt7615_dev *dev);
0564 
0565 #endif
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