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0001 // SPDX-License-Identifier: ISC
0002 /* Copyright (C) 2019 MediaTek Inc.
0003  *
0004  * Author: Roy Luo <royluo@google.com>
0005  *         Ryder Lee <ryder.lee@mediatek.com>
0006  *         Felix Fietkau <nbd@nbd.name>
0007  *         Lorenzo Bianconi <lorenzo@kernel.org>
0008  */
0009 
0010 #include <linux/etherdevice.h>
0011 #include <linux/hwmon.h>
0012 #include <linux/hwmon-sysfs.h>
0013 #include "mt7615.h"
0014 #include "mac.h"
0015 #include "mcu.h"
0016 #include "eeprom.h"
0017 
0018 static ssize_t mt7615_thermal_show_temp(struct device *dev,
0019                     struct device_attribute *attr,
0020                     char *buf)
0021 {
0022     struct mt7615_dev *mdev = dev_get_drvdata(dev);
0023     int temperature;
0024 
0025     if (!mt7615_wait_for_mcu_init(mdev))
0026         return 0;
0027 
0028     mt7615_mutex_acquire(mdev);
0029     temperature = mt7615_mcu_get_temperature(mdev);
0030     mt7615_mutex_release(mdev);
0031 
0032     if (temperature < 0)
0033         return temperature;
0034 
0035     /* display in millidegree celcius */
0036     return sprintf(buf, "%u\n", temperature * 1000);
0037 }
0038 
0039 static SENSOR_DEVICE_ATTR(temp1_input, 0444, mt7615_thermal_show_temp,
0040               NULL, 0);
0041 
0042 static struct attribute *mt7615_hwmon_attrs[] = {
0043     &sensor_dev_attr_temp1_input.dev_attr.attr,
0044     NULL,
0045 };
0046 ATTRIBUTE_GROUPS(mt7615_hwmon);
0047 
0048 int mt7615_thermal_init(struct mt7615_dev *dev)
0049 {
0050     struct wiphy *wiphy = mt76_hw(dev)->wiphy;
0051     struct device *hwmon;
0052     const char *name;
0053 
0054     if (!IS_REACHABLE(CONFIG_HWMON))
0055         return 0;
0056 
0057     name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7615_%s",
0058                   wiphy_name(wiphy));
0059     hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, dev,
0060                                mt7615_hwmon_groups);
0061     if (IS_ERR(hwmon))
0062         return PTR_ERR(hwmon);
0063 
0064     return 0;
0065 }
0066 EXPORT_SYMBOL_GPL(mt7615_thermal_init);
0067 
0068 static void
0069 mt7615_phy_init(struct mt7615_dev *dev)
0070 {
0071     /* disable rf low power beacon mode */
0072     mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
0073     mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
0074 }
0075 
0076 static void
0077 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
0078 {
0079     u32 val;
0080 
0081     if (!chain)
0082         val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
0083     else
0084         val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
0085 
0086     /* enable band 0/1 clk */
0087     mt76_set(dev, MT_CFG_CCR, val);
0088 
0089     mt76_rmw(dev, MT_TMAC_TRCR(chain),
0090          MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
0091          FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
0092          FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
0093 
0094     mt76_wr(dev, MT_AGG_ACR(chain),
0095         MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
0096         FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
0097         FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
0098 
0099     mt76_wr(dev, MT_AGG_ARUCR(chain),
0100         FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
0101         FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
0102         FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
0103         FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
0104         FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
0105         FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
0106         FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
0107         FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
0108 
0109     mt76_wr(dev, MT_AGG_ARDCR(chain),
0110         FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
0111         FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
0112         FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
0113         FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
0114         FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
0115         FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
0116         FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
0117         FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
0118 
0119     mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
0120     if (!mt7615_firmware_offload(dev)) {
0121         u32 mask, set;
0122 
0123         mask = MT_DMA_RCFR0_MCU_RX_MGMT |
0124                MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
0125                MT_DMA_RCFR0_MCU_RX_CTL_BAR |
0126                MT_DMA_RCFR0_MCU_RX_BYPASS |
0127                MT_DMA_RCFR0_RX_DROPPED_UCAST |
0128                MT_DMA_RCFR0_RX_DROPPED_MCAST;
0129         set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
0130               FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
0131         mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
0132     }
0133 }
0134 
0135 static void
0136 mt7615_mac_init(struct mt7615_dev *dev)
0137 {
0138     int i;
0139 
0140     mt7615_init_mac_chain(dev, 0);
0141 
0142     mt76_rmw_field(dev, MT_TMAC_CTCR0,
0143                MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
0144     mt76_rmw_field(dev, MT_TMAC_CTCR0,
0145                MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
0146     mt76_rmw(dev, MT_TMAC_CTCR0,
0147          MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
0148          MT_TMAC_CTCR0_INS_DDLMT_EN,
0149          MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
0150          MT_TMAC_CTCR0_INS_DDLMT_EN);
0151 
0152     mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
0153     mt7615_mac_set_scs(&dev->phy, true);
0154 
0155     mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
0156          MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
0157 
0158     mt76_wr(dev, MT_AGG_ARCR,
0159         FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
0160         MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
0161         FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
0162         FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
0163 
0164     for (i = 0; i < MT7615_WTBL_SIZE; i++)
0165         mt7615_mac_wtbl_update(dev, i,
0166                        MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
0167 
0168     mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
0169     mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
0170 
0171     mt76_wr(dev, MT_DMA_DCR0,
0172         FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
0173         MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
0174         MT_DMA_DCR0_RX_HDR_TRANS_EN);
0175     /* disable TDLS filtering */
0176     mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
0177     mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
0178     if (is_mt7663(&dev->mt76)) {
0179         mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
0180         mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
0181     } else {
0182         mt7615_init_mac_chain(dev, 1);
0183     }
0184     mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
0185 }
0186 
0187 static void
0188 mt7615_check_offload_capability(struct mt7615_dev *dev)
0189 {
0190     struct ieee80211_hw *hw = mt76_hw(dev);
0191     struct wiphy *wiphy = hw->wiphy;
0192 
0193     if (mt7615_firmware_offload(dev)) {
0194         ieee80211_hw_set(hw, SUPPORTS_PS);
0195         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
0196 
0197         wiphy->flags &= ~WIPHY_FLAG_4ADDR_STATION;
0198         wiphy->max_remain_on_channel_duration = 5000;
0199         wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
0200                    NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
0201                    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
0202                    NL80211_FEATURE_P2P_GO_CTWIN |
0203                    NL80211_FEATURE_P2P_GO_OPPPS;
0204     } else {
0205         dev->ops->hw_scan = NULL;
0206         dev->ops->cancel_hw_scan = NULL;
0207         dev->ops->sched_scan_start = NULL;
0208         dev->ops->sched_scan_stop = NULL;
0209         dev->ops->set_rekey_data = NULL;
0210         dev->ops->remain_on_channel = NULL;
0211         dev->ops->cancel_remain_on_channel = NULL;
0212 
0213         wiphy->max_sched_scan_plan_interval = 0;
0214         wiphy->max_sched_scan_ie_len = 0;
0215         wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
0216         wiphy->max_sched_scan_ssids = 0;
0217         wiphy->max_match_sets = 0;
0218         wiphy->max_sched_scan_reqs = 0;
0219     }
0220 }
0221 
0222 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
0223 {
0224     flush_work(&dev->mcu_work);
0225 
0226     return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
0227 }
0228 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
0229 
0230 static const struct ieee80211_iface_limit if_limits[] = {
0231     {
0232         .max = 1,
0233         .types = BIT(NL80211_IFTYPE_ADHOC)
0234     }, {
0235         .max = MT7615_MAX_INTERFACES,
0236         .types = BIT(NL80211_IFTYPE_AP) |
0237 #ifdef CONFIG_MAC80211_MESH
0238              BIT(NL80211_IFTYPE_MESH_POINT) |
0239 #endif
0240              BIT(NL80211_IFTYPE_P2P_CLIENT) |
0241              BIT(NL80211_IFTYPE_P2P_GO) |
0242              BIT(NL80211_IFTYPE_STATION)
0243     }
0244 };
0245 
0246 static const struct ieee80211_iface_combination if_comb_radar[] = {
0247     {
0248         .limits = if_limits,
0249         .n_limits = ARRAY_SIZE(if_limits),
0250         .max_interfaces = MT7615_MAX_INTERFACES,
0251         .num_different_channels = 1,
0252         .beacon_int_infra_match = true,
0253         .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
0254                        BIT(NL80211_CHAN_WIDTH_20) |
0255                        BIT(NL80211_CHAN_WIDTH_40) |
0256                        BIT(NL80211_CHAN_WIDTH_80) |
0257                        BIT(NL80211_CHAN_WIDTH_160) |
0258                        BIT(NL80211_CHAN_WIDTH_80P80),
0259     }
0260 };
0261 
0262 static const struct ieee80211_iface_combination if_comb[] = {
0263     {
0264         .limits = if_limits,
0265         .n_limits = ARRAY_SIZE(if_limits),
0266         .max_interfaces = MT7615_MAX_INTERFACES,
0267         .num_different_channels = 1,
0268         .beacon_int_infra_match = true,
0269     }
0270 };
0271 
0272 void mt7615_init_txpower(struct mt7615_dev *dev,
0273              struct ieee80211_supported_band *sband)
0274 {
0275     int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
0276     int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
0277     u8 *eep = (u8 *)dev->mt76.eeprom.data;
0278     enum nl80211_band band = sband->band;
0279     struct mt76_power_limits limits;
0280     u8 rate_val;
0281 
0282     delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
0283     rate_val = eep[delta_idx];
0284     if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
0285         (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
0286         delta += rate_val & MT_EE_RATE_POWER_MASK;
0287 
0288     if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
0289         target_chains = 1;
0290     else
0291         target_chains = n_chains;
0292 
0293     for (i = 0; i < sband->n_channels; i++) {
0294         struct ieee80211_channel *chan = &sband->channels[i];
0295         u8 target_power = 0;
0296         int j;
0297 
0298         for (j = 0; j < target_chains; j++) {
0299             int index;
0300 
0301             index = mt7615_eeprom_get_target_power_index(dev, chan, j);
0302             if (index < 0)
0303                 continue;
0304 
0305             target_power = max(target_power, eep[index]);
0306         }
0307 
0308         target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
0309                               &limits,
0310                               target_power);
0311         target_power += delta;
0312         target_power = DIV_ROUND_UP(target_power, 2);
0313         chan->max_power = min_t(int, chan->max_reg_power,
0314                     target_power);
0315         chan->orig_mpwr = target_power;
0316     }
0317 }
0318 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
0319 
0320 void mt7615_init_work(struct mt7615_dev *dev)
0321 {
0322     mt7615_mcu_set_eeprom(dev);
0323     mt7615_mac_init(dev);
0324     mt7615_phy_init(dev);
0325     mt7615_mcu_del_wtbl_all(dev);
0326     mt7615_check_offload_capability(dev);
0327 }
0328 EXPORT_SYMBOL_GPL(mt7615_init_work);
0329 
0330 static void
0331 mt7615_regd_notifier(struct wiphy *wiphy,
0332              struct regulatory_request *request)
0333 {
0334     struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
0335     struct mt7615_dev *dev = mt7615_hw_dev(hw);
0336     struct mt76_phy *mphy = hw->priv;
0337     struct mt7615_phy *phy = mphy->priv;
0338     struct cfg80211_chan_def *chandef = &mphy->chandef;
0339 
0340     memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
0341     dev->mt76.region = request->dfs_region;
0342 
0343     mt7615_init_txpower(dev, &mphy->sband_2g.sband);
0344     mt7615_init_txpower(dev, &mphy->sband_5g.sband);
0345 
0346     mt7615_mutex_acquire(dev);
0347 
0348     if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
0349         mt7615_dfs_init_radar_detector(phy);
0350 
0351     if (mt7615_firmware_offload(phy->dev)) {
0352         mt76_connac_mcu_set_channel_domain(mphy);
0353         mt76_connac_mcu_set_rate_txpower(mphy);
0354     }
0355 
0356     mt7615_mutex_release(dev);
0357 }
0358 
0359 static void
0360 mt7615_init_wiphy(struct ieee80211_hw *hw)
0361 {
0362     struct mt7615_phy *phy = mt7615_hw_phy(hw);
0363     struct wiphy *wiphy = hw->wiphy;
0364 
0365     hw->queues = 4;
0366     hw->max_rates = 3;
0367     hw->max_report_rates = 7;
0368     hw->max_rate_tries = 11;
0369     hw->netdev_features = NETIF_F_RXCSUM;
0370 
0371     hw->radiotap_timestamp.units_pos =
0372         IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
0373 
0374     phy->slottime = 9;
0375 
0376     hw->sta_data_size = sizeof(struct mt7615_sta);
0377     hw->vif_data_size = sizeof(struct mt7615_vif);
0378 
0379     if (is_mt7663(&phy->dev->mt76)) {
0380         wiphy->iface_combinations = if_comb;
0381         wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
0382     } else {
0383         wiphy->iface_combinations = if_comb_radar;
0384         wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
0385     }
0386     wiphy->reg_notifier = mt7615_regd_notifier;
0387 
0388     wiphy->max_sched_scan_plan_interval =
0389         MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
0390     wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
0391     wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
0392     wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
0393     wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
0394     wiphy->max_sched_scan_reqs = 1;
0395     wiphy->max_scan_ssids = 4;
0396 
0397     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
0398     wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
0399 
0400     ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
0401     ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
0402     ieee80211_hw_set(hw, WANT_MONITOR_VIF);
0403     ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
0404     ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
0405 
0406     if (is_mt7615(&phy->dev->mt76))
0407         hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
0408     else
0409         hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
0410 
0411     phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
0412     phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
0413     phy->mt76->sband_5g.sband.vht_cap.cap |=
0414             IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
0415 }
0416 
0417 static void
0418 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
0419 {
0420     dev->mphy.sband_5g.sband.vht_cap.cap &=
0421             ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
0422               IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
0423     if (dev->chainmask == 0xf)
0424         dev->mphy.antenna_mask = dev->chainmask >> 2;
0425     else
0426         dev->mphy.antenna_mask = dev->chainmask >> 1;
0427     dev->mphy.chainmask = dev->mphy.antenna_mask;
0428     dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
0429     dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
0430     mt76_set_stream_caps(&dev->mphy, true);
0431 }
0432 
0433 static void
0434 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
0435 {
0436     dev->mphy.sband_5g.sband.vht_cap.cap |=
0437             IEEE80211_VHT_CAP_SHORT_GI_160 |
0438             IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
0439     dev->mphy.antenna_mask = dev->chainmask;
0440     dev->mphy.chainmask = dev->chainmask;
0441     dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
0442     dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
0443     mt76_set_stream_caps(&dev->mphy, true);
0444 }
0445 
0446 int mt7615_register_ext_phy(struct mt7615_dev *dev)
0447 {
0448     struct mt7615_phy *phy = mt7615_ext_phy(dev);
0449     struct mt76_phy *mphy;
0450     int i, ret;
0451 
0452     if (!is_mt7615(&dev->mt76))
0453         return -EOPNOTSUPP;
0454 
0455     if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
0456         return -EINVAL;
0457 
0458     if (phy)
0459         return 0;
0460 
0461     mt7615_cap_dbdc_enable(dev);
0462     mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
0463     if (!mphy)
0464         return -ENOMEM;
0465 
0466     phy = mphy->priv;
0467     phy->dev = dev;
0468     phy->mt76 = mphy;
0469     mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
0470     mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
0471     mt7615_init_wiphy(mphy->hw);
0472 
0473     INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
0474     INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
0475     skb_queue_head_init(&phy->scan_event_list);
0476 
0477     INIT_WORK(&phy->roc_work, mt7615_roc_work);
0478     timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
0479     init_waitqueue_head(&phy->roc_wait);
0480 
0481     mt7615_mac_set_scs(phy, true);
0482 
0483     /*
0484      * Make the secondary PHY MAC address local without overlapping with
0485      * the usual MAC address allocation scheme on multiple virtual interfaces
0486      */
0487     memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
0488            ETH_ALEN);
0489     mphy->macaddr[0] |= 2;
0490     mphy->macaddr[0] ^= BIT(7);
0491     mt76_eeprom_override(mphy);
0492 
0493     /* second phy can only handle 5 GHz */
0494     mphy->cap.has_5ghz = true;
0495 
0496     /* mt7615 second phy shares the same hw queues with the primary one */
0497     for (i = 0; i <= MT_TXQ_PSD ; i++)
0498         mphy->q_tx[i] = dev->mphy.q_tx[i];
0499 
0500     ret = mt76_register_phy(mphy, true, mt76_rates,
0501                 ARRAY_SIZE(mt76_rates));
0502     if (ret)
0503         ieee80211_free_hw(mphy->hw);
0504 
0505     return ret;
0506 }
0507 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
0508 
0509 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
0510 {
0511     struct mt7615_phy *phy = mt7615_ext_phy(dev);
0512     struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
0513 
0514     if (!phy)
0515         return;
0516 
0517     mt7615_cap_dbdc_disable(dev);
0518     mt76_unregister_phy(mphy);
0519     ieee80211_free_hw(mphy->hw);
0520 }
0521 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
0522 
0523 void mt7615_init_device(struct mt7615_dev *dev)
0524 {
0525     struct ieee80211_hw *hw = mt76_hw(dev);
0526 
0527     dev->phy.dev = dev;
0528     dev->phy.mt76 = &dev->mt76.phy;
0529     dev->mt76.phy.priv = &dev->phy;
0530     dev->mt76.tx_worker.fn = mt7615_tx_worker;
0531 
0532     INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
0533     INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
0534     spin_lock_init(&dev->pm.wake.lock);
0535     mutex_init(&dev->pm.mutex);
0536     init_waitqueue_head(&dev->pm.wait);
0537     spin_lock_init(&dev->pm.txq_lock);
0538     INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
0539     INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
0540     INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
0541     skb_queue_head_init(&dev->phy.scan_event_list);
0542     skb_queue_head_init(&dev->coredump.msg_list);
0543     INIT_LIST_HEAD(&dev->sta_poll_list);
0544     spin_lock_init(&dev->sta_poll_lock);
0545     init_waitqueue_head(&dev->reset_wait);
0546     init_waitqueue_head(&dev->phy.roc_wait);
0547 
0548     INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
0549     timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
0550 
0551     mt7615_init_wiphy(hw);
0552     dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
0553     dev->pm.stats.last_wake_event = jiffies;
0554     dev->pm.stats.last_doze_event = jiffies;
0555     mt7615_cap_dbdc_disable(dev);
0556 
0557 #ifdef CONFIG_NL80211_TESTMODE
0558     dev->mt76.test_ops = &mt7615_testmode_ops;
0559 #endif
0560 }
0561 EXPORT_SYMBOL_GPL(mt7615_init_device);
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