mt76/mt7603/mt7603.h

0001 /* SPDX-License-Identifier: ISC */
0002
0003 #ifndef __MT7603_H
0004 #define __MT7603_H
0005
0006 #include <linux/interrupt.h>
0007 #include <linux/ktime.h>
0008 #include "../mt76.h"
0009 #include "regs.h"
0010
0011 #define MT7603_MAX_INTERFACES   4
0012 #define MT7603_WTBL_SIZE    128
0013 #define MT7603_WTBL_RESERVED    (MT7603_WTBL_SIZE - 1)
0014 #define MT7603_WTBL_STA     (MT7603_WTBL_RESERVED - MT7603_MAX_INTERFACES)
0015
0016 #define MT7603_RATE_RETRY   2
0017
0018 #define MT7603_MCU_RX_RING_SIZE 64
0019 #define MT7603_RX_RING_SIZE     128
0020 #define MT7603_TX_RING_SIZE 256
0021 #define MT7603_PSD_RING_SIZE    128
0022
0023 #define MT7603_FIRMWARE_E1  "mt7603_e1.bin"
0024 #define MT7603_FIRMWARE_E2  "mt7603_e2.bin"
0025 #define MT7628_FIRMWARE_E1  "mt7628_e1.bin"
0026 #define MT7628_FIRMWARE_E2  "mt7628_e2.bin"
0027
0028 #define MT7603_EEPROM_SIZE  1024
0029
0030 #define MT_AGG_SIZE_LIMIT(_n)   (((_n) + 1) * 4)
0031
0032 #define MT7603_PRE_TBTT_TIME    5000 /* ms */
0033
0034 #define MT7603_WATCHDOG_TIME    100 /* ms */
0035 #define MT7603_WATCHDOG_TIMEOUT 10 /* number of checks */
0036
0037 #define MT7603_EDCCA_BLOCK_TH   10
0038
0039 #define MT7603_CFEND_RATE_DEFAULT   0x69 /* chip default (24M) */
0040 #define MT7603_CFEND_RATE_11B       0x03 /* 11B LP, 11M */
0041
0042 struct mt7603_vif;
0043 struct mt7603_sta;
0044
0045 enum {
0046     MT7603_REV_E1 = 0x00,
0047     MT7603_REV_E2 = 0x10,
0048     MT7628_REV_E1 = 0x8a00,
0049 };
0050
0051 enum mt7603_bw {
0052     MT_BW_20,
0053     MT_BW_40,
0054     MT_BW_80,
0055 };
0056
0057 struct mt7603_rate_set {
0058     struct ieee80211_tx_rate probe_rate;
0059     struct ieee80211_tx_rate rates[4];
0060 };
0061
0062 struct mt7603_sta {
0063     struct mt76_wcid wcid; /* must be first */
0064
0065     struct mt7603_vif *vif;
0066
0067     struct list_head poll_list;
0068     u32 tx_airtime_ac[4];
0069
0070     struct sk_buff_head psq;
0071
0072     struct ieee80211_tx_rate rates[4];
0073
0074     struct mt7603_rate_set rateset[2];
0075     u32 rate_set_tsf;
0076
0077     u8 rate_count;
0078     u8 n_rates;
0079
0080     u8 rate_probe;
0081     u8 smps;
0082
0083     u8 ps;
0084 };
0085
0086 struct mt7603_vif {
0087     struct mt7603_sta sta; /* must be first */
0088
0089     u8 idx;
0090 };
0091
0092 enum mt7603_reset_cause {
0093     RESET_CAUSE_TX_HANG,
0094     RESET_CAUSE_TX_BUSY,
0095     RESET_CAUSE_RX_BUSY,
0096     RESET_CAUSE_BEACON_STUCK,
0097     RESET_CAUSE_RX_PSE_BUSY,
0098     RESET_CAUSE_MCU_HANG,
0099     RESET_CAUSE_RESET_FAILED,
0100     __RESET_CAUSE_MAX
0101 };
0102
0103 struct mt7603_dev {
0104     union { /* must be first */
0105         struct mt76_dev mt76;
0106         struct mt76_phy mphy;
0107     };
0108
0109     const struct mt76_bus_ops *bus_ops;
0110
0111     u32 rxfilter;
0112
0113     struct list_head sta_poll_list;
0114     spinlock_t sta_poll_lock;
0115
0116     struct mt7603_sta global_sta;
0117
0118     u32 agc0, agc3;
0119     u32 false_cca_ofdm, false_cca_cck;
0120     unsigned long last_cca_adj;
0121
0122     u32 ampdu_ref;
0123     u32 rx_ampdu_ts;
0124     u8 rssi_offset[3];
0125
0126     u8 slottime;
0127     s16 coverage_class;
0128
0129     s8 tx_power_limit;
0130
0131     ktime_t ed_time;
0132
0133     spinlock_t ps_lock;
0134
0135     u8 mcu_running;
0136
0137     u8 ed_monitor_enabled;
0138     u8 ed_monitor;
0139     s8 ed_trigger;
0140     u8 ed_strict_mode;
0141     u8 ed_strong_signal;
0142
0143     bool dynamic_sensitivity;
0144     s8 sensitivity;
0145     u8 sensitivity_limit;
0146
0147     u8 beacon_check;
0148     u8 tx_hang_check;
0149     u8 tx_dma_check;
0150     u8 rx_dma_check;
0151     u8 rx_pse_check;
0152     u8 mcu_hang;
0153
0154     enum mt7603_reset_cause cur_reset_cause;
0155
0156     u16 tx_dma_idx[4];
0157     u16 rx_dma_idx;
0158
0159     u32 reset_test;
0160
0161     unsigned int reset_cause[__RESET_CAUSE_MAX];
0162 };
0163
0164 extern const struct mt76_driver_ops mt7603_drv_ops;
0165 extern const struct ieee80211_ops mt7603_ops;
0166 extern struct pci_driver mt7603_pci_driver;
0167 extern struct platform_driver mt76_wmac_driver;
0168
0169 static inline bool is_mt7603(struct mt7603_dev *dev)
0170 {
0171     return mt76xx_chip(dev) == 0x7603;
0172 }
0173
0174 static inline bool is_mt7628(struct mt7603_dev *dev)
0175 {
0176     return mt76xx_chip(dev) == 0x7628;
0177 }
0178
0179 /* need offset to prevent conflict with ampdu_ack_len */
0180 #define MT_RATE_DRIVER_DATA_OFFSET  4
0181
0182 u32 mt7603_reg_map(struct mt7603_dev *dev, u32 addr);
0183
0184 irqreturn_t mt7603_irq_handler(int irq, void *dev_instance);
0185
0186 int mt7603_register_device(struct mt7603_dev *dev);
0187 void mt7603_unregister_device(struct mt7603_dev *dev);
0188 int mt7603_eeprom_init(struct mt7603_dev *dev);
0189 int mt7603_dma_init(struct mt7603_dev *dev);
0190 void mt7603_dma_cleanup(struct mt7603_dev *dev);
0191 int mt7603_mcu_init(struct mt7603_dev *dev);
0192 void mt7603_init_debugfs(struct mt7603_dev *dev);
0193
0194 static inline void mt7603_irq_enable(struct mt7603_dev *dev, u32 mask)
0195 {
0196     mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
0197 }
0198
0199 static inline void mt7603_irq_disable(struct mt7603_dev *dev, u32 mask)
0200 {
0201     mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
0202 }
0203
0204 void mt7603_mac_reset_counters(struct mt7603_dev *dev);
0205 void mt7603_mac_dma_start(struct mt7603_dev *dev);
0206 void mt7603_mac_start(struct mt7603_dev *dev);
0207 void mt7603_mac_stop(struct mt7603_dev *dev);
0208 void mt7603_mac_work(struct work_struct *work);
0209 void mt7603_mac_set_timing(struct mt7603_dev *dev);
0210 void mt7603_beacon_set_timer(struct mt7603_dev *dev, int idx, int intval);
0211 int mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb);
0212 void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data);
0213 void mt7603_mac_rx_ba_reset(struct mt7603_dev *dev, void *addr, u8 tid);
0214 void mt7603_mac_tx_ba_reset(struct mt7603_dev *dev, int wcid, int tid,
0215                 int ba_size);
0216 void mt7603_mac_sta_poll(struct mt7603_dev *dev);
0217
0218 void mt7603_pse_client_reset(struct mt7603_dev *dev);
0219
0220 int mt7603_mcu_set_channel(struct mt7603_dev *dev);
0221 int mt7603_mcu_set_eeprom(struct mt7603_dev *dev);
0222 void mt7603_mcu_exit(struct mt7603_dev *dev);
0223
0224 void mt7603_wtbl_init(struct mt7603_dev *dev, int idx, int vif,
0225               const u8 *mac_addr);
0226 void mt7603_wtbl_clear(struct mt7603_dev *dev, int idx);
0227 void mt7603_wtbl_update_cap(struct mt7603_dev *dev, struct ieee80211_sta *sta);
0228 void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta,
0229                struct ieee80211_tx_rate *probe_rate,
0230                struct ieee80211_tx_rate *rates);
0231 int mt7603_wtbl_set_key(struct mt7603_dev *dev, int wcid,
0232             struct ieee80211_key_conf *key);
0233 void mt7603_wtbl_set_ps(struct mt7603_dev *dev, struct mt7603_sta *sta,
0234             bool enabled);
0235 void mt7603_wtbl_set_smps(struct mt7603_dev *dev, struct mt7603_sta *sta,
0236               bool enabled);
0237 void mt7603_filter_tx(struct mt7603_dev *dev, int idx, bool abort);
0238
0239 int mt7603_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
0240               enum mt76_txq_id qid, struct mt76_wcid *wcid,
0241               struct ieee80211_sta *sta,
0242               struct mt76_tx_info *tx_info);
0243
0244 void mt7603_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
0245
0246 void mt7603_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
0247              struct sk_buff *skb);
0248 void mt7603_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
0249 void mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
0250 int mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0251            struct ieee80211_sta *sta);
0252 void mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0253               struct ieee80211_sta *sta);
0254 void mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0255                struct ieee80211_sta *sta);
0256
0257 void mt7603_pre_tbtt_tasklet(struct tasklet_struct *t);
0258
0259 void mt7603_update_channel(struct mt76_phy *mphy);
0260
0261 void mt7603_edcca_set_strict(struct mt7603_dev *dev, bool val);
0262 void mt7603_cca_stats_reset(struct mt7603_dev *dev);
0263
0264 void mt7603_init_edcca(struct mt7603_dev *dev);
0265 #endif