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0001 // SPDX-License-Identifier: ISC
0002 
0003 #include <linux/etherdevice.h>
0004 #include <linux/platform_device.h>
0005 #include <linux/pci.h>
0006 #include <linux/module.h>
0007 #include "mt7603.h"
0008 #include "mac.h"
0009 #include "eeprom.h"
0010 
0011 static int
0012 mt7603_start(struct ieee80211_hw *hw)
0013 {
0014     struct mt7603_dev *dev = hw->priv;
0015 
0016     mt7603_mac_reset_counters(dev);
0017     mt7603_mac_start(dev);
0018     dev->mphy.survey_time = ktime_get_boottime();
0019     set_bit(MT76_STATE_RUNNING, &dev->mphy.state);
0020     mt7603_mac_work(&dev->mphy.mac_work.work);
0021 
0022     return 0;
0023 }
0024 
0025 static void
0026 mt7603_stop(struct ieee80211_hw *hw)
0027 {
0028     struct mt7603_dev *dev = hw->priv;
0029 
0030     clear_bit(MT76_STATE_RUNNING, &dev->mphy.state);
0031     cancel_delayed_work_sync(&dev->mphy.mac_work);
0032     mt7603_mac_stop(dev);
0033 }
0034 
0035 static int
0036 mt7603_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
0037 {
0038     struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
0039     struct mt7603_dev *dev = hw->priv;
0040     struct mt76_txq *mtxq;
0041     u8 bc_addr[ETH_ALEN];
0042     int idx;
0043     int ret = 0;
0044 
0045     mutex_lock(&dev->mt76.mutex);
0046 
0047     mvif->idx = __ffs64(~dev->mt76.vif_mask);
0048     if (mvif->idx >= MT7603_MAX_INTERFACES) {
0049         ret = -ENOSPC;
0050         goto out;
0051     }
0052 
0053     mt76_wr(dev, MT_MAC_ADDR0(mvif->idx),
0054         get_unaligned_le32(vif->addr));
0055     mt76_wr(dev, MT_MAC_ADDR1(mvif->idx),
0056         (get_unaligned_le16(vif->addr + 4) |
0057          MT_MAC_ADDR1_VALID));
0058 
0059     if (vif->type == NL80211_IFTYPE_AP) {
0060         mt76_wr(dev, MT_BSSID0(mvif->idx),
0061             get_unaligned_le32(vif->addr));
0062         mt76_wr(dev, MT_BSSID1(mvif->idx),
0063             (get_unaligned_le16(vif->addr + 4) |
0064              MT_BSSID1_VALID));
0065     }
0066 
0067     idx = MT7603_WTBL_RESERVED - 1 - mvif->idx;
0068     dev->mt76.vif_mask |= BIT_ULL(mvif->idx);
0069     INIT_LIST_HEAD(&mvif->sta.poll_list);
0070     mvif->sta.wcid.idx = idx;
0071     mvif->sta.wcid.hw_key_idx = -1;
0072     mt76_packet_id_init(&mvif->sta.wcid);
0073 
0074     eth_broadcast_addr(bc_addr);
0075     mt7603_wtbl_init(dev, idx, mvif->idx, bc_addr);
0076 
0077     mtxq = (struct mt76_txq *)vif->txq->drv_priv;
0078     mtxq->wcid = idx;
0079     rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
0080 
0081 out:
0082     mutex_unlock(&dev->mt76.mutex);
0083 
0084     return ret;
0085 }
0086 
0087 static void
0088 mt7603_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
0089 {
0090     struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
0091     struct mt7603_sta *msta = &mvif->sta;
0092     struct mt7603_dev *dev = hw->priv;
0093     int idx = msta->wcid.idx;
0094 
0095     mt76_wr(dev, MT_MAC_ADDR0(mvif->idx), 0);
0096     mt76_wr(dev, MT_MAC_ADDR1(mvif->idx), 0);
0097     mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
0098     mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
0099     mt7603_beacon_set_timer(dev, mvif->idx, 0);
0100 
0101     rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
0102 
0103     spin_lock_bh(&dev->sta_poll_lock);
0104     if (!list_empty(&msta->poll_list))
0105         list_del_init(&msta->poll_list);
0106     spin_unlock_bh(&dev->sta_poll_lock);
0107 
0108     mutex_lock(&dev->mt76.mutex);
0109     dev->mt76.vif_mask &= ~BIT_ULL(mvif->idx);
0110     mutex_unlock(&dev->mt76.mutex);
0111 
0112     mt76_packet_id_flush(&dev->mt76, &mvif->sta.wcid);
0113 }
0114 
0115 void mt7603_init_edcca(struct mt7603_dev *dev)
0116 {
0117     /* Set lower signal level to -65dBm */
0118     mt76_rmw_field(dev, MT_RXTD(8), MT_RXTD_8_LOWER_SIGNAL, 0x23);
0119 
0120     /* clear previous energy detect monitor results */
0121     mt76_rr(dev, MT_MIB_STAT_ED);
0122 
0123     if (dev->ed_monitor)
0124         mt76_set(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
0125     else
0126         mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_ED_TIME);
0127 
0128     dev->ed_strict_mode = 0xff;
0129     dev->ed_strong_signal = 0;
0130     dev->ed_time = ktime_get_boottime();
0131 
0132     mt7603_edcca_set_strict(dev, false);
0133 }
0134 
0135 static int
0136 mt7603_set_channel(struct ieee80211_hw *hw, struct cfg80211_chan_def *def)
0137 {
0138     struct mt7603_dev *dev = hw->priv;
0139     u8 *rssi_data = (u8 *)dev->mt76.eeprom.data;
0140     int idx, ret;
0141     u8 bw = MT_BW_20;
0142     bool failed = false;
0143 
0144     ieee80211_stop_queues(hw);
0145     cancel_delayed_work_sync(&dev->mphy.mac_work);
0146     tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
0147 
0148     mutex_lock(&dev->mt76.mutex);
0149     set_bit(MT76_RESET, &dev->mphy.state);
0150 
0151     mt7603_beacon_set_timer(dev, -1, 0);
0152     mt76_set_channel(&dev->mphy);
0153     mt7603_mac_stop(dev);
0154 
0155     if (def->width == NL80211_CHAN_WIDTH_40)
0156         bw = MT_BW_40;
0157 
0158     dev->mphy.chandef = *def;
0159     mt76_rmw_field(dev, MT_AGG_BWCR, MT_AGG_BWCR_BW, bw);
0160     ret = mt7603_mcu_set_channel(dev);
0161     if (ret) {
0162         failed = true;
0163         goto out;
0164     }
0165 
0166     if (def->chan->band == NL80211_BAND_5GHZ) {
0167         idx = 1;
0168         rssi_data += MT_EE_RSSI_OFFSET_5G;
0169     } else {
0170         idx = 0;
0171         rssi_data += MT_EE_RSSI_OFFSET_2G;
0172     }
0173 
0174     memcpy(dev->rssi_offset, rssi_data, sizeof(dev->rssi_offset));
0175 
0176     idx |= (def->chan -
0177         mt76_hw(dev)->wiphy->bands[def->chan->band]->channels) << 1;
0178     mt76_wr(dev, MT_WF_RMAC_CH_FREQ, idx);
0179     mt7603_mac_set_timing(dev);
0180     mt7603_mac_start(dev);
0181 
0182     clear_bit(MT76_RESET, &dev->mphy.state);
0183 
0184     mt76_txq_schedule_all(&dev->mphy);
0185 
0186     ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work,
0187                      msecs_to_jiffies(MT7603_WATCHDOG_TIME));
0188 
0189     /* reset channel stats */
0190     mt76_clear(dev, MT_MIB_CTL, MT_MIB_CTL_READ_CLR_DIS);
0191     mt76_set(dev, MT_MIB_CTL,
0192          MT_MIB_CTL_CCA_NAV_TX | MT_MIB_CTL_PSCCA_TIME);
0193     mt76_rr(dev, MT_MIB_STAT_CCA);
0194     mt7603_cca_stats_reset(dev);
0195 
0196     dev->mphy.survey_time = ktime_get_boottime();
0197 
0198     mt7603_init_edcca(dev);
0199 
0200 out:
0201     if (!(mt76_hw(dev)->conf.flags & IEEE80211_CONF_OFFCHANNEL))
0202         mt7603_beacon_set_timer(dev, -1, dev->mt76.beacon_int);
0203     mutex_unlock(&dev->mt76.mutex);
0204 
0205     tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
0206 
0207     if (failed)
0208         mt7603_mac_work(&dev->mphy.mac_work.work);
0209 
0210     ieee80211_wake_queues(hw);
0211 
0212     return ret;
0213 }
0214 
0215 static int mt7603_set_sar_specs(struct ieee80211_hw *hw,
0216                 const struct cfg80211_sar_specs *sar)
0217 {
0218     struct mt7603_dev *dev = hw->priv;
0219     struct mt76_phy *mphy = &dev->mphy;
0220     int err;
0221 
0222     if (!cfg80211_chandef_valid(&mphy->chandef))
0223         return -EINVAL;
0224 
0225     err = mt76_init_sar_power(hw, sar);
0226     if (err)
0227         return err;
0228 
0229     return mt7603_set_channel(hw, &mphy->chandef);
0230 }
0231 
0232 static int
0233 mt7603_config(struct ieee80211_hw *hw, u32 changed)
0234 {
0235     struct mt7603_dev *dev = hw->priv;
0236     int ret = 0;
0237 
0238     if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
0239                IEEE80211_CONF_CHANGE_POWER))
0240         ret = mt7603_set_channel(hw, &hw->conf.chandef);
0241 
0242     if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
0243         mutex_lock(&dev->mt76.mutex);
0244 
0245         if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
0246             dev->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
0247         else
0248             dev->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
0249 
0250         mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
0251 
0252         mutex_unlock(&dev->mt76.mutex);
0253     }
0254 
0255     return ret;
0256 }
0257 
0258 static void
0259 mt7603_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
0260             unsigned int *total_flags, u64 multicast)
0261 {
0262     struct mt7603_dev *dev = hw->priv;
0263     u32 flags = 0;
0264 
0265 #define MT76_FILTER(_flag, _hw) do { \
0266         flags |= *total_flags & FIF_##_flag;            \
0267         dev->rxfilter &= ~(_hw);                \
0268         dev->rxfilter |= !(flags & FIF_##_flag) * (_hw);    \
0269     } while (0)
0270 
0271     dev->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
0272                MT_WF_RFCR_DROP_OTHER_BEACON |
0273                MT_WF_RFCR_DROP_FRAME_REPORT |
0274                MT_WF_RFCR_DROP_PROBEREQ |
0275                MT_WF_RFCR_DROP_MCAST_FILTERED |
0276                MT_WF_RFCR_DROP_MCAST |
0277                MT_WF_RFCR_DROP_BCAST |
0278                MT_WF_RFCR_DROP_DUPLICATE |
0279                MT_WF_RFCR_DROP_A2_BSSID |
0280                MT_WF_RFCR_DROP_UNWANTED_CTL |
0281                MT_WF_RFCR_DROP_STBC_MULTI);
0282 
0283     MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
0284                    MT_WF_RFCR_DROP_A3_MAC |
0285                    MT_WF_RFCR_DROP_A3_BSSID);
0286 
0287     MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
0288 
0289     MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
0290                  MT_WF_RFCR_DROP_RTS |
0291                  MT_WF_RFCR_DROP_CTL_RSV |
0292                  MT_WF_RFCR_DROP_NDPA);
0293 
0294     *total_flags = flags;
0295     mt76_wr(dev, MT_WF_RFCR, dev->rxfilter);
0296 }
0297 
0298 static void
0299 mt7603_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0300             struct ieee80211_bss_conf *info, u64 changed)
0301 {
0302     struct mt7603_dev *dev = hw->priv;
0303     struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
0304 
0305     mutex_lock(&dev->mt76.mutex);
0306 
0307     if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BSSID)) {
0308         if (vif->cfg.assoc || vif->cfg.ibss_joined) {
0309             mt76_wr(dev, MT_BSSID0(mvif->idx),
0310                 get_unaligned_le32(info->bssid));
0311             mt76_wr(dev, MT_BSSID1(mvif->idx),
0312                 (get_unaligned_le16(info->bssid + 4) |
0313                  MT_BSSID1_VALID));
0314         } else {
0315             mt76_wr(dev, MT_BSSID0(mvif->idx), 0);
0316             mt76_wr(dev, MT_BSSID1(mvif->idx), 0);
0317         }
0318     }
0319 
0320     if (changed & BSS_CHANGED_ERP_SLOT) {
0321         int slottime = info->use_short_slot ? 9 : 20;
0322 
0323         if (slottime != dev->slottime) {
0324             dev->slottime = slottime;
0325             mt7603_mac_set_timing(dev);
0326         }
0327     }
0328 
0329     if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON_INT)) {
0330         int beacon_int = !!info->enable_beacon * info->beacon_int;
0331 
0332         tasklet_disable(&dev->mt76.pre_tbtt_tasklet);
0333         mt7603_beacon_set_timer(dev, mvif->idx, beacon_int);
0334         tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
0335     }
0336 
0337     mutex_unlock(&dev->mt76.mutex);
0338 }
0339 
0340 int
0341 mt7603_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0342            struct ieee80211_sta *sta)
0343 {
0344     struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
0345     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0346     struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
0347     int idx;
0348     int ret = 0;
0349 
0350     idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7603_WTBL_STA - 1);
0351     if (idx < 0)
0352         return -ENOSPC;
0353 
0354     INIT_LIST_HEAD(&msta->poll_list);
0355     __skb_queue_head_init(&msta->psq);
0356     msta->ps = ~0;
0357     msta->smps = ~0;
0358     msta->wcid.sta = 1;
0359     msta->wcid.idx = idx;
0360     mt7603_wtbl_init(dev, idx, mvif->idx, sta->addr);
0361     mt7603_wtbl_set_ps(dev, msta, false);
0362 
0363     if (vif->type == NL80211_IFTYPE_AP)
0364         set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
0365 
0366     return ret;
0367 }
0368 
0369 void
0370 mt7603_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0371          struct ieee80211_sta *sta)
0372 {
0373     struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
0374 
0375     mt7603_wtbl_update_cap(dev, sta);
0376 }
0377 
0378 void
0379 mt7603_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
0380           struct ieee80211_sta *sta)
0381 {
0382     struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
0383     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0384     struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
0385 
0386     spin_lock_bh(&dev->ps_lock);
0387     __skb_queue_purge(&msta->psq);
0388     mt7603_filter_tx(dev, wcid->idx, true);
0389     spin_unlock_bh(&dev->ps_lock);
0390 
0391     spin_lock_bh(&dev->sta_poll_lock);
0392     if (!list_empty(&msta->poll_list))
0393         list_del_init(&msta->poll_list);
0394     spin_unlock_bh(&dev->sta_poll_lock);
0395 
0396     mt7603_wtbl_clear(dev, wcid->idx);
0397 }
0398 
0399 static void
0400 mt7603_ps_tx_list(struct mt7603_dev *dev, struct sk_buff_head *list)
0401 {
0402     struct sk_buff *skb;
0403 
0404     while ((skb = __skb_dequeue(list)) != NULL) {
0405         int qid = skb_get_queue_mapping(skb);
0406 
0407         mt76_tx_queue_skb_raw(dev, dev->mphy.q_tx[qid], skb, 0);
0408     }
0409 }
0410 
0411 void
0412 mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
0413 {
0414     struct mt7603_dev *dev = container_of(mdev, struct mt7603_dev, mt76);
0415     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0416     struct sk_buff_head list;
0417 
0418     mt76_stop_tx_queues(&dev->mphy, sta, true);
0419     mt7603_wtbl_set_ps(dev, msta, ps);
0420     if (ps)
0421         return;
0422 
0423     __skb_queue_head_init(&list);
0424 
0425     spin_lock_bh(&dev->ps_lock);
0426     skb_queue_splice_tail_init(&msta->psq, &list);
0427     spin_unlock_bh(&dev->ps_lock);
0428 
0429     mt7603_ps_tx_list(dev, &list);
0430 }
0431 
0432 static void
0433 mt7603_ps_set_more_data(struct sk_buff *skb)
0434 {
0435     struct ieee80211_hdr *hdr;
0436 
0437     hdr = (struct ieee80211_hdr *)&skb->data[MT_TXD_SIZE];
0438     hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
0439 }
0440 
0441 static void
0442 mt7603_release_buffered_frames(struct ieee80211_hw *hw,
0443                    struct ieee80211_sta *sta,
0444                    u16 tids, int nframes,
0445                    enum ieee80211_frame_release_type reason,
0446                    bool more_data)
0447 {
0448     struct mt7603_dev *dev = hw->priv;
0449     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0450     struct sk_buff_head list;
0451     struct sk_buff *skb, *tmp;
0452 
0453     __skb_queue_head_init(&list);
0454 
0455     mt7603_wtbl_set_ps(dev, msta, false);
0456 
0457     spin_lock_bh(&dev->ps_lock);
0458     skb_queue_walk_safe(&msta->psq, skb, tmp) {
0459         if (!nframes)
0460             break;
0461 
0462         if (!(tids & BIT(skb->priority)))
0463             continue;
0464 
0465         skb_set_queue_mapping(skb, MT_TXQ_PSD);
0466         __skb_unlink(skb, &msta->psq);
0467         mt7603_ps_set_more_data(skb);
0468         __skb_queue_tail(&list, skb);
0469         nframes--;
0470     }
0471     spin_unlock_bh(&dev->ps_lock);
0472 
0473     if (!skb_queue_empty(&list))
0474         ieee80211_sta_eosp(sta);
0475 
0476     mt7603_ps_tx_list(dev, &list);
0477 
0478     if (nframes)
0479         mt76_release_buffered_frames(hw, sta, tids, nframes, reason,
0480                          more_data);
0481 }
0482 
0483 static int
0484 mt7603_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
0485            struct ieee80211_vif *vif, struct ieee80211_sta *sta,
0486            struct ieee80211_key_conf *key)
0487 {
0488     struct mt7603_dev *dev = hw->priv;
0489     struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
0490     struct mt7603_sta *msta = sta ? (struct mt7603_sta *)sta->drv_priv :
0491                   &mvif->sta;
0492     struct mt76_wcid *wcid = &msta->wcid;
0493     int idx = key->keyidx;
0494 
0495     /* fall back to sw encryption for unsupported ciphers */
0496     switch (key->cipher) {
0497     case WLAN_CIPHER_SUITE_TKIP:
0498     case WLAN_CIPHER_SUITE_CCMP:
0499         break;
0500     default:
0501         return -EOPNOTSUPP;
0502     }
0503 
0504     /*
0505      * The hardware does not support per-STA RX GTK, fall back
0506      * to software mode for these.
0507      */
0508     if ((vif->type == NL80211_IFTYPE_ADHOC ||
0509          vif->type == NL80211_IFTYPE_MESH_POINT) &&
0510         (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
0511          key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
0512         !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
0513         return -EOPNOTSUPP;
0514 
0515     if (cmd == SET_KEY) {
0516         key->hw_key_idx = wcid->idx;
0517         wcid->hw_key_idx = idx;
0518     } else {
0519         if (idx == wcid->hw_key_idx)
0520             wcid->hw_key_idx = -1;
0521 
0522         key = NULL;
0523     }
0524     mt76_wcid_key_setup(&dev->mt76, wcid, key);
0525 
0526     return mt7603_wtbl_set_key(dev, wcid->idx, key);
0527 }
0528 
0529 static int
0530 mt7603_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0531            unsigned int link_id, u16 queue,
0532            const struct ieee80211_tx_queue_params *params)
0533 {
0534     struct mt7603_dev *dev = hw->priv;
0535     u16 cw_min = (1 << 5) - 1;
0536     u16 cw_max = (1 << 10) - 1;
0537     u32 val;
0538 
0539     queue = dev->mphy.q_tx[queue]->hw_idx;
0540 
0541     if (params->cw_min)
0542         cw_min = params->cw_min;
0543     if (params->cw_max)
0544         cw_max = params->cw_max;
0545 
0546     mutex_lock(&dev->mt76.mutex);
0547     mt7603_mac_stop(dev);
0548 
0549     val = mt76_rr(dev, MT_WMM_TXOP(queue));
0550     val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(queue));
0551     val |= params->txop << MT_WMM_TXOP_SHIFT(queue);
0552     mt76_wr(dev, MT_WMM_TXOP(queue), val);
0553 
0554     val = mt76_rr(dev, MT_WMM_AIFSN);
0555     val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(queue));
0556     val |= params->aifs << MT_WMM_AIFSN_SHIFT(queue);
0557     mt76_wr(dev, MT_WMM_AIFSN, val);
0558 
0559     val = mt76_rr(dev, MT_WMM_CWMIN);
0560     val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(queue));
0561     val |= cw_min << MT_WMM_CWMIN_SHIFT(queue);
0562     mt76_wr(dev, MT_WMM_CWMIN, val);
0563 
0564     val = mt76_rr(dev, MT_WMM_CWMAX(queue));
0565     val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(queue));
0566     val |= cw_max << MT_WMM_CWMAX_SHIFT(queue);
0567     mt76_wr(dev, MT_WMM_CWMAX(queue), val);
0568 
0569     mt7603_mac_start(dev);
0570     mutex_unlock(&dev->mt76.mutex);
0571 
0572     return 0;
0573 }
0574 
0575 static void
0576 mt7603_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0577          u32 queues, bool drop)
0578 {
0579 }
0580 
0581 static int
0582 mt7603_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0583             struct ieee80211_ampdu_params *params)
0584 {
0585     enum ieee80211_ampdu_mlme_action action = params->action;
0586     struct mt7603_dev *dev = hw->priv;
0587     struct ieee80211_sta *sta = params->sta;
0588     struct ieee80211_txq *txq = sta->txq[params->tid];
0589     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0590     u16 tid = params->tid;
0591     u16 ssn = params->ssn;
0592     u8 ba_size = params->buf_size;
0593     struct mt76_txq *mtxq;
0594     int ret = 0;
0595 
0596     if (!txq)
0597         return -EINVAL;
0598 
0599     mtxq = (struct mt76_txq *)txq->drv_priv;
0600 
0601     mutex_lock(&dev->mt76.mutex);
0602     switch (action) {
0603     case IEEE80211_AMPDU_RX_START:
0604         mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
0605                    params->buf_size);
0606         mt7603_mac_rx_ba_reset(dev, sta->addr, tid);
0607         break;
0608     case IEEE80211_AMPDU_RX_STOP:
0609         mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
0610         break;
0611     case IEEE80211_AMPDU_TX_OPERATIONAL:
0612         mtxq->aggr = true;
0613         mtxq->send_bar = false;
0614         mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, ba_size);
0615         break;
0616     case IEEE80211_AMPDU_TX_STOP_FLUSH:
0617     case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
0618         mtxq->aggr = false;
0619         mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
0620         break;
0621     case IEEE80211_AMPDU_TX_START:
0622         mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
0623         ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
0624         break;
0625     case IEEE80211_AMPDU_TX_STOP_CONT:
0626         mtxq->aggr = false;
0627         mt7603_mac_tx_ba_reset(dev, msta->wcid.idx, tid, -1);
0628         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
0629         break;
0630     }
0631     mutex_unlock(&dev->mt76.mutex);
0632 
0633     return ret;
0634 }
0635 
0636 static void
0637 mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
0638                struct ieee80211_sta *sta)
0639 {
0640     struct mt7603_dev *dev = hw->priv;
0641     struct mt7603_sta *msta = (struct mt7603_sta *)sta->drv_priv;
0642     struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
0643     int i;
0644 
0645     if (!sta_rates)
0646         return;
0647 
0648     spin_lock_bh(&dev->mt76.lock);
0649     for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
0650         msta->rates[i].idx = sta_rates->rate[i].idx;
0651         msta->rates[i].count = sta_rates->rate[i].count;
0652         msta->rates[i].flags = sta_rates->rate[i].flags;
0653 
0654         if (msta->rates[i].idx < 0 || !msta->rates[i].count)
0655             break;
0656     }
0657     msta->n_rates = i;
0658     mt7603_wtbl_set_rates(dev, msta, NULL, msta->rates);
0659     msta->rate_probe = false;
0660     mt7603_wtbl_set_smps(dev, msta,
0661                  sta->smps_mode == IEEE80211_SMPS_DYNAMIC);
0662     spin_unlock_bh(&dev->mt76.lock);
0663 }
0664 
0665 static void
0666 mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
0667 {
0668     struct mt7603_dev *dev = hw->priv;
0669 
0670     mutex_lock(&dev->mt76.mutex);
0671     dev->coverage_class = max_t(s16, coverage_class, 0);
0672     mt7603_mac_set_timing(dev);
0673     mutex_unlock(&dev->mt76.mutex);
0674 }
0675 
0676 static void mt7603_tx(struct ieee80211_hw *hw,
0677               struct ieee80211_tx_control *control,
0678               struct sk_buff *skb)
0679 {
0680     struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
0681     struct ieee80211_vif *vif = info->control.vif;
0682     struct mt7603_dev *dev = hw->priv;
0683     struct mt76_wcid *wcid = &dev->global_sta.wcid;
0684 
0685     if (control->sta) {
0686         struct mt7603_sta *msta;
0687 
0688         msta = (struct mt7603_sta *)control->sta->drv_priv;
0689         wcid = &msta->wcid;
0690     } else if (vif) {
0691         struct mt7603_vif *mvif;
0692 
0693         mvif = (struct mt7603_vif *)vif->drv_priv;
0694         wcid = &mvif->sta.wcid;
0695     }
0696 
0697     mt76_tx(&dev->mphy, control->sta, wcid, skb);
0698 }
0699 
0700 const struct ieee80211_ops mt7603_ops = {
0701     .tx = mt7603_tx,
0702     .start = mt7603_start,
0703     .stop = mt7603_stop,
0704     .add_interface = mt7603_add_interface,
0705     .remove_interface = mt7603_remove_interface,
0706     .config = mt7603_config,
0707     .configure_filter = mt7603_configure_filter,
0708     .bss_info_changed = mt7603_bss_info_changed,
0709     .sta_state = mt76_sta_state,
0710     .sta_pre_rcu_remove = mt76_sta_pre_rcu_remove,
0711     .set_key = mt7603_set_key,
0712     .conf_tx = mt7603_conf_tx,
0713     .sw_scan_start = mt76_sw_scan,
0714     .sw_scan_complete = mt76_sw_scan_complete,
0715     .flush = mt7603_flush,
0716     .ampdu_action = mt7603_ampdu_action,
0717     .get_txpower = mt76_get_txpower,
0718     .wake_tx_queue = mt76_wake_tx_queue,
0719     .sta_rate_tbl_update = mt7603_sta_rate_tbl_update,
0720     .release_buffered_frames = mt7603_release_buffered_frames,
0721     .set_coverage_class = mt7603_set_coverage_class,
0722     .set_tim = mt76_set_tim,
0723     .get_survey = mt76_get_survey,
0724     .get_antenna = mt76_get_antenna,
0725     .set_sar_specs = mt7603_set_sar_specs,
0726 };
0727 
0728 MODULE_LICENSE("Dual BSD/GPL");
0729 
0730 static int __init mt7603_init(void)
0731 {
0732     int ret;
0733 
0734     ret = platform_driver_register(&mt76_wmac_driver);
0735     if (ret)
0736         return ret;
0737 
0738 #ifdef CONFIG_PCI
0739     ret = pci_register_driver(&mt7603_pci_driver);
0740     if (ret)
0741         platform_driver_unregister(&mt76_wmac_driver);
0742 #endif
0743     return ret;
0744 }
0745 
0746 static void __exit mt7603_exit(void)
0747 {
0748 #ifdef CONFIG_PCI
0749     pci_unregister_driver(&mt7603_pci_driver);
0750 #endif
0751     platform_driver_unregister(&mt76_wmac_driver);
0752 }
0753 
0754 module_init(mt7603_init);
0755 module_exit(mt7603_exit);
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