mediatek/mt76/dma.h

0001 /* SPDX-License-Identifier: ISC */
0002 /*
0003  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
0004  */
0005 #ifndef __MT76_DMA_H
0006 #define __MT76_DMA_H
0007
0008 #define DMA_DUMMY_DATA          ((void *)~0)
0009
0010 #define MT_RING_SIZE            0x10
0011
0012 #define MT_DMA_CTL_SD_LEN1      GENMASK(13, 0)
0013 #define MT_DMA_CTL_LAST_SEC1        BIT(14)
0014 #define MT_DMA_CTL_BURST        BIT(15)
0015 #define MT_DMA_CTL_SD_LEN0      GENMASK(29, 16)
0016 #define MT_DMA_CTL_LAST_SEC0        BIT(30)
0017 #define MT_DMA_CTL_DMA_DONE     BIT(31)
0018
0019 #define MT_DMA_HDR_LEN          4
0020 #define MT_RX_INFO_LEN          4
0021 #define MT_FCE_INFO_LEN         4
0022 #define MT_RX_RXWI_LEN          32
0023
0024 struct mt76_desc {
0025     __le32 buf0;
0026     __le32 ctrl;
0027     __le32 buf1;
0028     __le32 info;
0029 } __packed __aligned(4);
0030
0031 enum mt76_qsel {
0032     MT_QSEL_MGMT,
0033     MT_QSEL_HCCA,
0034     MT_QSEL_EDCA,
0035     MT_QSEL_EDCA_2,
0036 };
0037
0038 enum mt76_mcu_evt_type {
0039     EVT_CMD_DONE,
0040     EVT_CMD_ERROR,
0041     EVT_CMD_RETRY,
0042     EVT_EVENT_PWR_RSP,
0043     EVT_EVENT_WOW_RSP,
0044     EVT_EVENT_CARRIER_DETECT_RSP,
0045     EVT_EVENT_DFS_DETECT_RSP,
0046 };
0047
0048 int mt76_dma_rx_poll(struct napi_struct *napi, int budget);
0049 void mt76_dma_attach(struct mt76_dev *dev);
0050 void mt76_dma_cleanup(struct mt76_dev *dev);
0051
0052 #endif