Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * This file contains definitions for mwifiex USB interface driver.
0004  *
0005  * Copyright 2011-2020 NXP
0006  */
0007 
0008 #ifndef _MWIFIEX_USB_H
0009 #define _MWIFIEX_USB_H
0010 
0011 #include <linux/completion.h>
0012 #include <linux/usb.h>
0013 
0014 #define USB8XXX_VID     0x1286
0015 
0016 #define USB8766_PID_1       0x2041
0017 #define USB8766_PID_2       0x2042
0018 #define USB8797_PID_1       0x2043
0019 #define USB8797_PID_2       0x2044
0020 #define USB8801_PID_1       0x2049
0021 #define USB8801_PID_2       0x204a
0022 #define USB8997_PID_1       0x2052
0023 #define USB8997_PID_2       0x204e
0024 
0025 
0026 #define USB8XXX_FW_DNLD     1
0027 #define USB8XXX_FW_READY    2
0028 #define USB8XXX_FW_MAX_RETRY    3
0029 
0030 #define MWIFIEX_TX_DATA_PORT    2
0031 #define MWIFIEX_TX_DATA_URB 6
0032 #define MWIFIEX_RX_DATA_URB 6
0033 #define MWIFIEX_USB_TIMEOUT 100
0034 
0035 #define USB8766_DEFAULT_FW_NAME "mrvl/usb8766_uapsta.bin"
0036 #define USB8797_DEFAULT_FW_NAME "mrvl/usb8797_uapsta.bin"
0037 #define USB8801_DEFAULT_FW_NAME "mrvl/usb8801_uapsta.bin"
0038 #define USB8997_DEFAULT_FW_NAME "mrvl/usbusb8997_combo_v4.bin"
0039 
0040 #define FW_DNLD_TX_BUF_SIZE 620
0041 #define FW_DNLD_RX_BUF_SIZE 2048
0042 #define FW_HAS_LAST_BLOCK   0x00000004
0043 #define FW_CMD_7        0x00000007
0044 
0045 #define FW_DATA_XMIT_SIZE \
0046     (sizeof(struct fw_header) + dlen + sizeof(u32))
0047 
0048 struct urb_context {
0049     struct mwifiex_adapter *adapter;
0050     struct sk_buff *skb;
0051     struct urb *urb;
0052     u8 ep;
0053 };
0054 
0055 #define MWIFIEX_USB_TX_AGGR_TMO_MIN 1
0056 #define MWIFIEX_USB_TX_AGGR_TMO_MAX 4
0057 
0058 struct tx_aggr_tmr_cnxt {
0059     struct mwifiex_adapter *adapter;
0060     struct usb_tx_data_port *port;
0061     struct timer_list hold_timer;
0062     bool is_hold_timer_set;
0063     u32 hold_tmo_msecs;
0064 };
0065 
0066 struct usb_tx_aggr {
0067     struct sk_buff_head aggr_list;
0068     int aggr_len;
0069     int aggr_num;
0070     struct tx_aggr_tmr_cnxt timer_cnxt;
0071 };
0072 
0073 struct usb_tx_data_port {
0074     u8 tx_data_ep;
0075     u8 block_status;
0076     atomic_t tx_data_urb_pending;
0077     int tx_data_ix;
0078     struct urb_context tx_data_list[MWIFIEX_TX_DATA_URB];
0079     /* usb tx aggregation*/
0080     struct usb_tx_aggr tx_aggr;
0081     struct sk_buff *skb_aggr[MWIFIEX_TX_DATA_URB];
0082     /* lock for protect tx aggregation data path*/
0083     spinlock_t tx_aggr_lock;
0084 };
0085 
0086 struct usb_card_rec {
0087     struct mwifiex_adapter *adapter;
0088     struct usb_device *udev;
0089     struct usb_interface *intf;
0090     struct completion fw_done;
0091     u8 rx_cmd_ep;
0092     struct urb_context rx_cmd;
0093     atomic_t rx_cmd_urb_pending;
0094     struct urb_context rx_data_list[MWIFIEX_RX_DATA_URB];
0095     u8 usb_boot_state;
0096     u8 rx_data_ep;
0097     atomic_t rx_data_urb_pending;
0098     u8 tx_cmd_ep;
0099     atomic_t tx_cmd_urb_pending;
0100     int bulk_out_maxpktsize;
0101     struct urb_context tx_cmd;
0102     u8 mc_resync_flag;
0103     struct usb_tx_data_port port[MWIFIEX_TX_DATA_PORT];
0104     int rx_cmd_ep_type;
0105     u8 rx_cmd_interval;
0106     int tx_cmd_ep_type;
0107     u8 tx_cmd_interval;
0108 };
0109 
0110 struct fw_header {
0111     __le32 dnld_cmd;
0112     __le32 base_addr;
0113     __le32 data_len;
0114     __le32 crc;
0115 };
0116 
0117 struct fw_sync_header {
0118     __le32 cmd;
0119     __le32 seq_num;
0120 } __packed;
0121 
0122 struct fw_data {
0123     struct fw_header fw_hdr;
0124     __le32 seq_num;
0125     u8 data[];
0126 } __packed;
0127 
0128 #endif /*_MWIFIEX_USB_H */