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0008 #include <linux/firmware.h>
0009
0010 #include "decl.h"
0011 #include "ioctl.h"
0012 #include "util.h"
0013 #include "fw.h"
0014 #include "main.h"
0015 #include "wmm.h"
0016 #include "11n.h"
0017 #include "sdio.h"
0018
0019
0020 #define SDIO_VERSION "1.0"
0021
0022 static void mwifiex_sdio_work(struct work_struct *work);
0023
0024 static struct mwifiex_if_ops sdio_ops;
0025
0026 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
0027 .start_rd_port = 1,
0028 .start_wr_port = 1,
0029 .base_0_reg = 0x0040,
0030 .base_1_reg = 0x0041,
0031 .poll_reg = 0x30,
0032 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
0033 .host_int_rsr_reg = 0x1,
0034 .host_int_mask_reg = 0x02,
0035 .host_int_status_reg = 0x03,
0036 .status_reg_0 = 0x60,
0037 .status_reg_1 = 0x61,
0038 .sdio_int_mask = 0x3f,
0039 .data_port_mask = 0x0000fffe,
0040 .io_port_0_reg = 0x78,
0041 .io_port_1_reg = 0x79,
0042 .io_port_2_reg = 0x7A,
0043 .max_mp_regs = 64,
0044 .rd_bitmap_l = 0x04,
0045 .rd_bitmap_u = 0x05,
0046 .wr_bitmap_l = 0x06,
0047 .wr_bitmap_u = 0x07,
0048 .rd_len_p0_l = 0x08,
0049 .rd_len_p0_u = 0x09,
0050 .card_misc_cfg_reg = 0x6c,
0051 .func1_dump_reg_start = 0x0,
0052 .func1_dump_reg_end = 0x9,
0053 .func1_scratch_reg = 0x60,
0054 .func1_spec_reg_num = 5,
0055 .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c},
0056 };
0057
0058 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
0059 .start_rd_port = 0,
0060 .start_wr_port = 0,
0061 .base_0_reg = 0x60,
0062 .base_1_reg = 0x61,
0063 .poll_reg = 0x50,
0064 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
0065 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
0066 .host_int_rsr_reg = 0x1,
0067 .host_int_status_reg = 0x03,
0068 .host_int_mask_reg = 0x02,
0069 .status_reg_0 = 0xc0,
0070 .status_reg_1 = 0xc1,
0071 .sdio_int_mask = 0xff,
0072 .data_port_mask = 0xffffffff,
0073 .io_port_0_reg = 0xD8,
0074 .io_port_1_reg = 0xD9,
0075 .io_port_2_reg = 0xDA,
0076 .max_mp_regs = 184,
0077 .rd_bitmap_l = 0x04,
0078 .rd_bitmap_u = 0x05,
0079 .rd_bitmap_1l = 0x06,
0080 .rd_bitmap_1u = 0x07,
0081 .wr_bitmap_l = 0x08,
0082 .wr_bitmap_u = 0x09,
0083 .wr_bitmap_1l = 0x0a,
0084 .wr_bitmap_1u = 0x0b,
0085 .rd_len_p0_l = 0x0c,
0086 .rd_len_p0_u = 0x0d,
0087 .card_misc_cfg_reg = 0xcc,
0088 .card_cfg_2_1_reg = 0xcd,
0089 .cmd_rd_len_0 = 0xb4,
0090 .cmd_rd_len_1 = 0xb5,
0091 .cmd_rd_len_2 = 0xb6,
0092 .cmd_rd_len_3 = 0xb7,
0093 .cmd_cfg_0 = 0xb8,
0094 .cmd_cfg_1 = 0xb9,
0095 .cmd_cfg_2 = 0xba,
0096 .cmd_cfg_3 = 0xbb,
0097 .fw_dump_host_ready = 0xee,
0098 .fw_dump_ctrl = 0xe2,
0099 .fw_dump_start = 0xe3,
0100 .fw_dump_end = 0xea,
0101 .func1_dump_reg_start = 0x0,
0102 .func1_dump_reg_end = 0xb,
0103 .func1_scratch_reg = 0xc0,
0104 .func1_spec_reg_num = 8,
0105 .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58,
0106 0x59, 0x5c, 0x5d},
0107 };
0108
0109 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = {
0110 .start_rd_port = 0,
0111 .start_wr_port = 0,
0112 .base_0_reg = 0xF8,
0113 .base_1_reg = 0xF9,
0114 .poll_reg = 0x5C,
0115 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
0116 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
0117 .host_int_rsr_reg = 0x4,
0118 .host_int_status_reg = 0x0C,
0119 .host_int_mask_reg = 0x08,
0120 .status_reg_0 = 0xE8,
0121 .status_reg_1 = 0xE9,
0122 .sdio_int_mask = 0xff,
0123 .data_port_mask = 0xffffffff,
0124 .io_port_0_reg = 0xE4,
0125 .io_port_1_reg = 0xE5,
0126 .io_port_2_reg = 0xE6,
0127 .max_mp_regs = 196,
0128 .rd_bitmap_l = 0x10,
0129 .rd_bitmap_u = 0x11,
0130 .rd_bitmap_1l = 0x12,
0131 .rd_bitmap_1u = 0x13,
0132 .wr_bitmap_l = 0x14,
0133 .wr_bitmap_u = 0x15,
0134 .wr_bitmap_1l = 0x16,
0135 .wr_bitmap_1u = 0x17,
0136 .rd_len_p0_l = 0x18,
0137 .rd_len_p0_u = 0x19,
0138 .card_misc_cfg_reg = 0xd8,
0139 .card_cfg_2_1_reg = 0xd9,
0140 .cmd_rd_len_0 = 0xc0,
0141 .cmd_rd_len_1 = 0xc1,
0142 .cmd_rd_len_2 = 0xc2,
0143 .cmd_rd_len_3 = 0xc3,
0144 .cmd_cfg_0 = 0xc4,
0145 .cmd_cfg_1 = 0xc5,
0146 .cmd_cfg_2 = 0xc6,
0147 .cmd_cfg_3 = 0xc7,
0148 .fw_dump_host_ready = 0xcc,
0149 .fw_dump_ctrl = 0xf0,
0150 .fw_dump_start = 0xf1,
0151 .fw_dump_end = 0xf8,
0152 .func1_dump_reg_start = 0x10,
0153 .func1_dump_reg_end = 0x17,
0154 .func1_scratch_reg = 0xe8,
0155 .func1_spec_reg_num = 13,
0156 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
0157 0x60, 0x61, 0x62, 0x64,
0158 0x65, 0x66, 0x68, 0x69,
0159 0x6a},
0160 };
0161
0162 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
0163 .start_rd_port = 0,
0164 .start_wr_port = 0,
0165 .base_0_reg = 0xF8,
0166 .base_1_reg = 0xF9,
0167 .poll_reg = 0x5C,
0168 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
0169 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
0170 .host_int_rsr_reg = 0x4,
0171 .host_int_status_reg = 0x0C,
0172 .host_int_mask_reg = 0x08,
0173 .host_strap_reg = 0xF4,
0174 .host_strap_mask = 0x01,
0175 .host_strap_value = 0x00,
0176 .status_reg_0 = 0xE8,
0177 .status_reg_1 = 0xE9,
0178 .sdio_int_mask = 0xff,
0179 .data_port_mask = 0xffffffff,
0180 .io_port_0_reg = 0xE4,
0181 .io_port_1_reg = 0xE5,
0182 .io_port_2_reg = 0xE6,
0183 .max_mp_regs = 196,
0184 .rd_bitmap_l = 0x10,
0185 .rd_bitmap_u = 0x11,
0186 .rd_bitmap_1l = 0x12,
0187 .rd_bitmap_1u = 0x13,
0188 .wr_bitmap_l = 0x14,
0189 .wr_bitmap_u = 0x15,
0190 .wr_bitmap_1l = 0x16,
0191 .wr_bitmap_1u = 0x17,
0192 .rd_len_p0_l = 0x18,
0193 .rd_len_p0_u = 0x19,
0194 .card_misc_cfg_reg = 0xd8,
0195 .card_cfg_2_1_reg = 0xd9,
0196 .cmd_rd_len_0 = 0xc0,
0197 .cmd_rd_len_1 = 0xc1,
0198 .cmd_rd_len_2 = 0xc2,
0199 .cmd_rd_len_3 = 0xc3,
0200 .cmd_cfg_0 = 0xc4,
0201 .cmd_cfg_1 = 0xc5,
0202 .cmd_cfg_2 = 0xc6,
0203 .cmd_cfg_3 = 0xc7,
0204 .fw_dump_host_ready = 0xcc,
0205 .fw_dump_ctrl = 0xf0,
0206 .fw_dump_start = 0xf1,
0207 .fw_dump_end = 0xf8,
0208 .func1_dump_reg_start = 0x10,
0209 .func1_dump_reg_end = 0x17,
0210 .func1_scratch_reg = 0xe8,
0211 .func1_spec_reg_num = 13,
0212 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
0213 0x60, 0x61, 0x62, 0x64,
0214 0x65, 0x66, 0x68, 0x69,
0215 0x6a},
0216 };
0217
0218 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
0219 .start_rd_port = 0,
0220 .start_wr_port = 0,
0221 .base_0_reg = 0x6C,
0222 .base_1_reg = 0x6D,
0223 .poll_reg = 0x5C,
0224 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
0225 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
0226 .host_int_rsr_reg = 0x4,
0227 .host_int_status_reg = 0x0C,
0228 .host_int_mask_reg = 0x08,
0229 .status_reg_0 = 0x90,
0230 .status_reg_1 = 0x91,
0231 .sdio_int_mask = 0xff,
0232 .data_port_mask = 0xffffffff,
0233 .io_port_0_reg = 0xE4,
0234 .io_port_1_reg = 0xE5,
0235 .io_port_2_reg = 0xE6,
0236 .max_mp_regs = 196,
0237 .rd_bitmap_l = 0x10,
0238 .rd_bitmap_u = 0x11,
0239 .rd_bitmap_1l = 0x12,
0240 .rd_bitmap_1u = 0x13,
0241 .wr_bitmap_l = 0x14,
0242 .wr_bitmap_u = 0x15,
0243 .wr_bitmap_1l = 0x16,
0244 .wr_bitmap_1u = 0x17,
0245 .rd_len_p0_l = 0x18,
0246 .rd_len_p0_u = 0x19,
0247 .card_misc_cfg_reg = 0xd8,
0248 .card_cfg_2_1_reg = 0xd9,
0249 .cmd_rd_len_0 = 0xc0,
0250 .cmd_rd_len_1 = 0xc1,
0251 .cmd_rd_len_2 = 0xc2,
0252 .cmd_rd_len_3 = 0xc3,
0253 .cmd_cfg_0 = 0xc4,
0254 .cmd_cfg_1 = 0xc5,
0255 .cmd_cfg_2 = 0xc6,
0256 .cmd_cfg_3 = 0xc7,
0257 .func1_dump_reg_start = 0x10,
0258 .func1_dump_reg_end = 0x17,
0259 .func1_scratch_reg = 0x90,
0260 .func1_spec_reg_num = 13,
0261 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
0262 0x61, 0x62, 0x64, 0x65, 0x66,
0263 0x68, 0x69, 0x6a},
0264 };
0265
0266 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8987 = {
0267 .start_rd_port = 0,
0268 .start_wr_port = 0,
0269 .base_0_reg = 0xF8,
0270 .base_1_reg = 0xF9,
0271 .poll_reg = 0x5C,
0272 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
0273 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
0274 .host_int_rsr_reg = 0x4,
0275 .host_int_status_reg = 0x0C,
0276 .host_int_mask_reg = 0x08,
0277 .host_strap_reg = 0xF4,
0278 .host_strap_mask = 0x01,
0279 .host_strap_value = 0x00,
0280 .status_reg_0 = 0xE8,
0281 .status_reg_1 = 0xE9,
0282 .sdio_int_mask = 0xff,
0283 .data_port_mask = 0xffffffff,
0284 .io_port_0_reg = 0xE4,
0285 .io_port_1_reg = 0xE5,
0286 .io_port_2_reg = 0xE6,
0287 .max_mp_regs = 196,
0288 .rd_bitmap_l = 0x10,
0289 .rd_bitmap_u = 0x11,
0290 .rd_bitmap_1l = 0x12,
0291 .rd_bitmap_1u = 0x13,
0292 .wr_bitmap_l = 0x14,
0293 .wr_bitmap_u = 0x15,
0294 .wr_bitmap_1l = 0x16,
0295 .wr_bitmap_1u = 0x17,
0296 .rd_len_p0_l = 0x18,
0297 .rd_len_p0_u = 0x19,
0298 .card_misc_cfg_reg = 0xd8,
0299 .card_cfg_2_1_reg = 0xd9,
0300 .cmd_rd_len_0 = 0xc0,
0301 .cmd_rd_len_1 = 0xc1,
0302 .cmd_rd_len_2 = 0xc2,
0303 .cmd_rd_len_3 = 0xc3,
0304 .cmd_cfg_0 = 0xc4,
0305 .cmd_cfg_1 = 0xc5,
0306 .cmd_cfg_2 = 0xc6,
0307 .cmd_cfg_3 = 0xc7,
0308 .fw_dump_host_ready = 0xcc,
0309 .fw_dump_ctrl = 0xf9,
0310 .fw_dump_start = 0xf1,
0311 .fw_dump_end = 0xf8,
0312 .func1_dump_reg_start = 0x10,
0313 .func1_dump_reg_end = 0x17,
0314 .func1_scratch_reg = 0xE8,
0315 .func1_spec_reg_num = 13,
0316 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
0317 0x61, 0x62, 0x64, 0x65, 0x66,
0318 0x68, 0x69, 0x6a},
0319 };
0320
0321 static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
0322 .firmware = SD8786_DEFAULT_FW_NAME,
0323 .reg = &mwifiex_reg_sd87xx,
0324 .max_ports = 16,
0325 .mp_agg_pkt_limit = 8,
0326 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0327 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0328 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0329 .supports_sdio_new_mode = false,
0330 .has_control_mask = true,
0331 .can_dump_fw = false,
0332 .can_auto_tdls = false,
0333 .can_ext_scan = false,
0334 };
0335
0336 static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
0337 .firmware = SD8787_DEFAULT_FW_NAME,
0338 .reg = &mwifiex_reg_sd87xx,
0339 .max_ports = 16,
0340 .mp_agg_pkt_limit = 8,
0341 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0342 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0343 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0344 .supports_sdio_new_mode = false,
0345 .has_control_mask = true,
0346 .can_dump_fw = false,
0347 .can_auto_tdls = false,
0348 .can_ext_scan = true,
0349 };
0350
0351 static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
0352 .firmware = SD8797_DEFAULT_FW_NAME,
0353 .reg = &mwifiex_reg_sd87xx,
0354 .max_ports = 16,
0355 .mp_agg_pkt_limit = 8,
0356 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0357 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0358 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0359 .supports_sdio_new_mode = false,
0360 .has_control_mask = true,
0361 .can_dump_fw = false,
0362 .can_auto_tdls = false,
0363 .can_ext_scan = true,
0364 };
0365
0366 static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
0367 .firmware = SD8897_DEFAULT_FW_NAME,
0368 .reg = &mwifiex_reg_sd8897,
0369 .max_ports = 32,
0370 .mp_agg_pkt_limit = 16,
0371 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
0372 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0373 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0374 .supports_sdio_new_mode = true,
0375 .has_control_mask = false,
0376 .can_dump_fw = true,
0377 .can_auto_tdls = false,
0378 .can_ext_scan = true,
0379 };
0380
0381 static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = {
0382 .firmware = SD8977_DEFAULT_FW_NAME,
0383 .reg = &mwifiex_reg_sd8977,
0384 .max_ports = 32,
0385 .mp_agg_pkt_limit = 16,
0386 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
0387 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0388 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0389 .supports_sdio_new_mode = true,
0390 .has_control_mask = false,
0391 .can_dump_fw = true,
0392 .fw_dump_enh = true,
0393 .can_auto_tdls = false,
0394 .can_ext_scan = true,
0395 };
0396
0397 static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
0398 .firmware = SD8997_DEFAULT_FW_NAME,
0399 .firmware_sdiouart = SD8997_SDIOUART_FW_NAME,
0400 .reg = &mwifiex_reg_sd8997,
0401 .max_ports = 32,
0402 .mp_agg_pkt_limit = 16,
0403 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
0404 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0405 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0406 .supports_sdio_new_mode = true,
0407 .has_control_mask = false,
0408 .can_dump_fw = true,
0409 .fw_dump_enh = true,
0410 .can_auto_tdls = false,
0411 .can_ext_scan = true,
0412 };
0413
0414 static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
0415 .firmware = SD8887_DEFAULT_FW_NAME,
0416 .reg = &mwifiex_reg_sd8887,
0417 .max_ports = 32,
0418 .mp_agg_pkt_limit = 16,
0419 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0420 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
0421 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
0422 .supports_sdio_new_mode = true,
0423 .has_control_mask = false,
0424 .can_dump_fw = false,
0425 .can_auto_tdls = true,
0426 .can_ext_scan = true,
0427 };
0428
0429 static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = {
0430 .firmware = SD8987_DEFAULT_FW_NAME,
0431 .reg = &mwifiex_reg_sd8987,
0432 .max_ports = 32,
0433 .mp_agg_pkt_limit = 16,
0434 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0435 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0436 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
0437 .supports_sdio_new_mode = true,
0438 .has_control_mask = false,
0439 .can_dump_fw = true,
0440 .fw_dump_enh = true,
0441 .can_auto_tdls = true,
0442 .can_ext_scan = true,
0443 };
0444
0445 static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = {
0446 .firmware = SD8801_DEFAULT_FW_NAME,
0447 .reg = &mwifiex_reg_sd87xx,
0448 .max_ports = 16,
0449 .mp_agg_pkt_limit = 8,
0450 .supports_sdio_new_mode = false,
0451 .has_control_mask = true,
0452 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
0453 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0454 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
0455 .can_dump_fw = false,
0456 .can_auto_tdls = false,
0457 .can_ext_scan = true,
0458 };
0459
0460 static struct memory_type_mapping generic_mem_type_map[] = {
0461 {"DUMP", NULL, 0, 0xDD},
0462 };
0463
0464 static struct memory_type_mapping mem_type_mapping_tbl[] = {
0465 {"ITCM", NULL, 0, 0xF0},
0466 {"DTCM", NULL, 0, 0xF1},
0467 {"SQRAM", NULL, 0, 0xF2},
0468 {"APU", NULL, 0, 0xF3},
0469 {"CIU", NULL, 0, 0xF4},
0470 {"ICU", NULL, 0, 0xF5},
0471 {"MAC", NULL, 0, 0xF6},
0472 {"EXT7", NULL, 0, 0xF7},
0473 {"EXT8", NULL, 0, 0xF8},
0474 {"EXT9", NULL, 0, 0xF9},
0475 {"EXT10", NULL, 0, 0xFA},
0476 {"EXT11", NULL, 0, 0xFB},
0477 {"EXT12", NULL, 0, 0xFC},
0478 {"EXT13", NULL, 0, 0xFD},
0479 {"EXTLAST", NULL, 0, 0xFE},
0480 };
0481
0482 static const struct of_device_id mwifiex_sdio_of_match_table[] = {
0483 { .compatible = "marvell,sd8897" },
0484 { .compatible = "marvell,sd8997" },
0485 { }
0486 };
0487
0488
0489
0490
0491
0492
0493 static int mwifiex_sdio_probe_of(struct device *dev)
0494 {
0495 if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) {
0496 dev_err(dev, "required compatible string missing\n");
0497 return -EINVAL;
0498 }
0499
0500 return 0;
0501 }
0502
0503
0504
0505
0506
0507
0508
0509
0510
0511 static int
0512 mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
0513 {
0514 int ret;
0515 struct sdio_mmc_card *card = NULL;
0516
0517 pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n",
0518 func->vendor, func->device, func->class, func->num);
0519
0520 card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL);
0521 if (!card)
0522 return -ENOMEM;
0523
0524 init_completion(&card->fw_done);
0525
0526 card->func = func;
0527
0528 func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
0529
0530 if (id->driver_data) {
0531 struct mwifiex_sdio_device *data = (void *)id->driver_data;
0532
0533 card->firmware = data->firmware;
0534 card->firmware_sdiouart = data->firmware_sdiouart;
0535 card->reg = data->reg;
0536 card->max_ports = data->max_ports;
0537 card->mp_agg_pkt_limit = data->mp_agg_pkt_limit;
0538 card->supports_sdio_new_mode = data->supports_sdio_new_mode;
0539 card->has_control_mask = data->has_control_mask;
0540 card->tx_buf_size = data->tx_buf_size;
0541 card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size;
0542 card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size;
0543 card->can_dump_fw = data->can_dump_fw;
0544 card->fw_dump_enh = data->fw_dump_enh;
0545 card->can_auto_tdls = data->can_auto_tdls;
0546 card->can_ext_scan = data->can_ext_scan;
0547 INIT_WORK(&card->work, mwifiex_sdio_work);
0548 }
0549
0550 sdio_claim_host(func);
0551 ret = sdio_enable_func(func);
0552 sdio_release_host(func);
0553
0554 if (ret) {
0555 dev_err(&func->dev, "failed to enable function\n");
0556 return ret;
0557 }
0558
0559
0560 if (func->dev.of_node) {
0561 ret = mwifiex_sdio_probe_of(&func->dev);
0562 if (ret)
0563 goto err_disable;
0564 }
0565
0566 ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops,
0567 MWIFIEX_SDIO, &func->dev);
0568 if (ret) {
0569 dev_err(&func->dev, "add card failed\n");
0570 goto err_disable;
0571 }
0572
0573 return 0;
0574
0575 err_disable:
0576 sdio_claim_host(func);
0577 sdio_disable_func(func);
0578 sdio_release_host(func);
0579
0580 return ret;
0581 }
0582
0583
0584
0585
0586
0587
0588
0589
0590
0591
0592
0593 static int mwifiex_sdio_resume(struct device *dev)
0594 {
0595 struct sdio_func *func = dev_to_sdio_func(dev);
0596 struct sdio_mmc_card *card;
0597 struct mwifiex_adapter *adapter;
0598
0599 card = sdio_get_drvdata(func);
0600 if (!card || !card->adapter) {
0601 dev_err(dev, "resume: invalid card or adapter\n");
0602 return 0;
0603 }
0604
0605 adapter = card->adapter;
0606
0607 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
0608 mwifiex_dbg(adapter, WARN,
0609 "device already resumed\n");
0610 return 0;
0611 }
0612
0613 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
0614
0615
0616 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
0617 MWIFIEX_SYNC_CMD);
0618
0619 mwifiex_disable_wake(adapter);
0620
0621 return 0;
0622 }
0623
0624
0625 static int
0626 mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data)
0627 {
0628 int ret = -1;
0629
0630 sdio_writeb(func, data, reg, &ret);
0631 return ret;
0632 }
0633
0634
0635
0636 static int
0637 mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data)
0638 {
0639 struct sdio_mmc_card *card = adapter->card;
0640 int ret;
0641
0642 sdio_claim_host(card->func);
0643 ret = mwifiex_write_reg_locked(card->func, reg, data);
0644 sdio_release_host(card->func);
0645
0646 return ret;
0647 }
0648
0649
0650
0651 static int
0652 mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data)
0653 {
0654 struct sdio_mmc_card *card = adapter->card;
0655 int ret = -1;
0656 u8 val;
0657
0658 sdio_claim_host(card->func);
0659 val = sdio_readb(card->func, reg, &ret);
0660 sdio_release_host(card->func);
0661
0662 *data = val;
0663
0664 return ret;
0665 }
0666
0667
0668
0669
0670
0671 static int
0672 mwifiex_write_data_sync(struct mwifiex_adapter *adapter,
0673 u8 *buffer, u32 pkt_len, u32 port)
0674 {
0675 struct sdio_mmc_card *card = adapter->card;
0676 int ret;
0677 u8 blk_mode =
0678 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE;
0679 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
0680 u32 blk_cnt =
0681 (blk_mode ==
0682 BLOCK_MODE) ? (pkt_len /
0683 MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len;
0684 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
0685
0686 if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
0687 mwifiex_dbg(adapter, ERROR,
0688 "%s: not allowed while suspended\n", __func__);
0689 return -1;
0690 }
0691
0692 sdio_claim_host(card->func);
0693
0694 ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size);
0695
0696 sdio_release_host(card->func);
0697
0698 return ret;
0699 }
0700
0701
0702
0703 static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer,
0704 u32 len, u32 port, u8 claim)
0705 {
0706 struct sdio_mmc_card *card = adapter->card;
0707 int ret;
0708 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE
0709 : BLOCK_MODE;
0710 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
0711 u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE)
0712 : len;
0713 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
0714
0715 if (claim)
0716 sdio_claim_host(card->func);
0717
0718 ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size);
0719
0720 if (claim)
0721 sdio_release_host(card->func);
0722
0723 return ret;
0724 }
0725
0726
0727
0728 static int
0729 mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
0730 {
0731 struct sdio_mmc_card *card = adapter->card;
0732 const struct mwifiex_sdio_card_reg *reg = card->reg;
0733 u8 fws0, fws1;
0734
0735 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
0736 return -1;
0737
0738 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
0739 return -1;
0740
0741 *dat = (u16)((fws1 << 8) | fws0);
0742 return 0;
0743 }
0744
0745
0746
0747 static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
0748 u32 poll_num)
0749 {
0750 int ret = 0;
0751 u16 firmware_stat;
0752 u32 tries;
0753
0754 for (tries = 0; tries < poll_num; tries++) {
0755 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
0756 if (ret)
0757 continue;
0758 if (firmware_stat == FIRMWARE_READY_SDIO) {
0759 ret = 0;
0760 break;
0761 }
0762
0763 msleep(100);
0764 ret = -1;
0765 }
0766
0767 return ret;
0768 }
0769
0770
0771
0772 static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
0773 {
0774 int ret = 0;
0775 u8 winner = 0;
0776 struct sdio_mmc_card *card = adapter->card;
0777
0778 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner))
0779 return -1;
0780
0781 if (winner)
0782 adapter->winner = 0;
0783 else
0784 adapter->winner = 1;
0785
0786 return ret;
0787 }
0788
0789
0790
0791
0792
0793
0794 static void
0795 mwifiex_sdio_remove(struct sdio_func *func)
0796 {
0797 struct sdio_mmc_card *card;
0798 struct mwifiex_adapter *adapter;
0799 struct mwifiex_private *priv;
0800 int ret = 0;
0801 u16 firmware_stat;
0802
0803 card = sdio_get_drvdata(func);
0804 if (!card)
0805 return;
0806
0807 wait_for_completion(&card->fw_done);
0808
0809 adapter = card->adapter;
0810 if (!adapter || !adapter->priv_num)
0811 return;
0812
0813 mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num);
0814
0815 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
0816 if (!ret && firmware_stat == FIRMWARE_READY_SDIO &&
0817 !adapter->mfg_mode) {
0818 mwifiex_deauthenticate_all(adapter);
0819
0820 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
0821 mwifiex_disable_auto_ds(priv);
0822 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
0823 }
0824
0825 mwifiex_remove_card(adapter);
0826 }
0827
0828
0829
0830
0831
0832
0833
0834
0835
0836
0837
0838 static int mwifiex_sdio_suspend(struct device *dev)
0839 {
0840 struct sdio_func *func = dev_to_sdio_func(dev);
0841 struct sdio_mmc_card *card;
0842 struct mwifiex_adapter *adapter;
0843 mmc_pm_flag_t pm_flag = 0;
0844 int ret = 0;
0845
0846 pm_flag = sdio_get_host_pm_caps(func);
0847 pr_debug("cmd: %s: suspend: PM flag = 0x%x\n",
0848 sdio_func_id(func), pm_flag);
0849 if (!(pm_flag & MMC_PM_KEEP_POWER)) {
0850 dev_err(dev, "%s: cannot remain alive while host is"
0851 " suspended\n", sdio_func_id(func));
0852 return -ENOSYS;
0853 }
0854
0855 card = sdio_get_drvdata(func);
0856 if (!card) {
0857 dev_err(dev, "suspend: invalid card\n");
0858 return 0;
0859 }
0860
0861
0862 wait_for_completion(&card->fw_done);
0863
0864 adapter = card->adapter;
0865 if (!adapter) {
0866 dev_err(dev, "adapter is not valid\n");
0867 return 0;
0868 }
0869
0870 if (!adapter->is_up)
0871 return -EBUSY;
0872
0873 mwifiex_enable_wake(adapter);
0874
0875
0876 if (!mwifiex_enable_hs(adapter)) {
0877 mwifiex_dbg(adapter, ERROR,
0878 "cmd: failed to suspend\n");
0879 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
0880 mwifiex_disable_wake(adapter);
0881 return -EFAULT;
0882 }
0883
0884 mwifiex_dbg(adapter, INFO,
0885 "cmd: suspend with MMC_PM_KEEP_POWER\n");
0886 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
0887
0888
0889 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
0890 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
0891
0892 return ret;
0893 }
0894
0895 static void mwifiex_sdio_coredump(struct device *dev)
0896 {
0897 struct sdio_func *func = dev_to_sdio_func(dev);
0898 struct sdio_mmc_card *card;
0899
0900 card = sdio_get_drvdata(func);
0901 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
0902 &card->work_flags))
0903 schedule_work(&card->work);
0904 }
0905
0906
0907 static const struct sdio_device_id mwifiex_ids[] = {
0908 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN),
0909 .driver_data = (unsigned long) &mwifiex_sdio_sd8786},
0910 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN),
0911 .driver_data = (unsigned long) &mwifiex_sdio_sd8787},
0912 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN),
0913 .driver_data = (unsigned long) &mwifiex_sdio_sd8797},
0914 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN),
0915 .driver_data = (unsigned long) &mwifiex_sdio_sd8897},
0916 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN),
0917 .driver_data = (unsigned long)&mwifiex_sdio_sd8887},
0918 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN),
0919 .driver_data = (unsigned long)&mwifiex_sdio_sd8801},
0920 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN),
0921 .driver_data = (unsigned long)&mwifiex_sdio_sd8977},
0922 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN),
0923 .driver_data = (unsigned long)&mwifiex_sdio_sd8987},
0924 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN),
0925 .driver_data = (unsigned long)&mwifiex_sdio_sd8997},
0926 {},
0927 };
0928
0929 MODULE_DEVICE_TABLE(sdio, mwifiex_ids);
0930
0931 static const struct dev_pm_ops mwifiex_sdio_pm_ops = {
0932 .suspend = mwifiex_sdio_suspend,
0933 .resume = mwifiex_sdio_resume,
0934 };
0935
0936 static struct sdio_driver mwifiex_sdio = {
0937 .name = "mwifiex_sdio",
0938 .id_table = mwifiex_ids,
0939 .probe = mwifiex_sdio_probe,
0940 .remove = mwifiex_sdio_remove,
0941 .drv = {
0942 .owner = THIS_MODULE,
0943 .coredump = mwifiex_sdio_coredump,
0944 .pm = &mwifiex_sdio_pm_ops,
0945 }
0946 };
0947
0948
0949
0950
0951
0952
0953
0954 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
0955 {
0956 mwifiex_dbg(adapter, EVENT,
0957 "event: wakeup device...\n");
0958
0959 return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP);
0960 }
0961
0962
0963
0964
0965
0966
0967 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
0968 {
0969 mwifiex_dbg(adapter, EVENT,
0970 "cmd: wakeup device completed\n");
0971
0972 return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0);
0973 }
0974
0975 static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter,
0976 struct mwifiex_fw_image *fw)
0977 {
0978 struct sdio_mmc_card *card = adapter->card;
0979 int ret;
0980
0981 sdio_claim_host(card->func);
0982 ret = mwifiex_dnld_fw(adapter, fw);
0983 sdio_release_host(card->func);
0984
0985 return ret;
0986 }
0987
0988
0989
0990
0991
0992 static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
0993 {
0994 u8 reg;
0995 struct sdio_mmc_card *card = adapter->card;
0996
0997 adapter->ioport = MEM_PORT;
0998
0999
1000 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®))
1001 return -1;
1002 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
1003 reg | CMD53_NEW_MODE))
1004 return -1;
1005
1006
1007 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®))
1008 return -1;
1009 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
1010 reg | CMD_PORT_RD_LEN_EN))
1011 return -1;
1012
1013
1014
1015
1016 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®))
1017 return -1;
1018 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
1019 reg | CMD_PORT_AUTO_EN))
1020 return -1;
1021
1022 return 0;
1023 }
1024
1025
1026
1027
1028
1029
1030
1031
1032 static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
1033 {
1034 u8 reg;
1035 struct sdio_mmc_card *card = adapter->card;
1036
1037 adapter->ioport = 0;
1038
1039 if (card->supports_sdio_new_mode) {
1040 if (mwifiex_init_sdio_new_mode(adapter))
1041 return -1;
1042 goto cont;
1043 }
1044
1045
1046 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®))
1047 adapter->ioport |= (reg & 0xff);
1048 else
1049 return -1;
1050
1051 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®))
1052 adapter->ioport |= ((reg & 0xff) << 8);
1053 else
1054 return -1;
1055
1056 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®))
1057 adapter->ioport |= ((reg & 0xff) << 16);
1058 else
1059 return -1;
1060 cont:
1061 mwifiex_dbg(adapter, INFO,
1062 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
1063
1064
1065 if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®))
1066 mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
1067 reg | card->reg->sdio_int_mask);
1068 else
1069 return -1;
1070
1071
1072 if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®))
1073 mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
1074 reg | AUTO_RE_ENABLE_INT);
1075 else
1076 return -1;
1077
1078 return 0;
1079 }
1080
1081
1082
1083
1084 static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter,
1085 u8 *payload, u32 pkt_len, u32 port)
1086 {
1087 u32 i = 0;
1088 int ret;
1089
1090 do {
1091 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port);
1092 if (ret) {
1093 i++;
1094 mwifiex_dbg(adapter, ERROR,
1095 "host_to_card, write iomem\t"
1096 "(%d) failed: %d\n", i, ret);
1097 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
1098 mwifiex_dbg(adapter, ERROR,
1099 "write CFG reg failed\n");
1100
1101 ret = -1;
1102 if (i > MAX_WRITE_IOMEM_RETRY)
1103 return ret;
1104 }
1105 } while (ret == -1);
1106
1107 return ret;
1108 }
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
1119 {
1120 struct sdio_mmc_card *card = adapter->card;
1121 const struct mwifiex_sdio_card_reg *reg = card->reg;
1122 u32 rd_bitmap = card->mp_rd_bitmap;
1123
1124 mwifiex_dbg(adapter, DATA,
1125 "data: mp_rd_bitmap=0x%08x\n", rd_bitmap);
1126
1127 if (card->supports_sdio_new_mode) {
1128 if (!(rd_bitmap & reg->data_port_mask))
1129 return -1;
1130 } else {
1131 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
1132 return -1;
1133 }
1134
1135 if ((card->has_control_mask) &&
1136 (card->mp_rd_bitmap & CTRL_PORT_MASK)) {
1137 card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK);
1138 *port = CTRL_PORT;
1139 mwifiex_dbg(adapter, DATA,
1140 "data: port=%d mp_rd_bitmap=0x%08x\n",
1141 *port, card->mp_rd_bitmap);
1142 return 0;
1143 }
1144
1145 if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port)))
1146 return -1;
1147
1148
1149 card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port));
1150 *port = card->curr_rd_port;
1151
1152 if (++card->curr_rd_port == card->max_ports)
1153 card->curr_rd_port = reg->start_rd_port;
1154
1155 mwifiex_dbg(adapter, DATA,
1156 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
1157 *port, rd_bitmap, card->mp_rd_bitmap);
1158
1159 return 0;
1160 }
1161
1162
1163
1164
1165
1166
1167
1168
1169 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
1170 {
1171 struct sdio_mmc_card *card = adapter->card;
1172 const struct mwifiex_sdio_card_reg *reg = card->reg;
1173 u32 wr_bitmap = card->mp_wr_bitmap;
1174
1175 mwifiex_dbg(adapter, DATA,
1176 "data: mp_wr_bitmap=0x%08x\n", wr_bitmap);
1177
1178 if (!(wr_bitmap & card->mp_data_port_mask)) {
1179 adapter->data_sent = true;
1180 return -EBUSY;
1181 }
1182
1183 if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) {
1184 card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
1185 *port = card->curr_wr_port;
1186 if (++card->curr_wr_port == card->mp_end_port)
1187 card->curr_wr_port = reg->start_wr_port;
1188 } else {
1189 adapter->data_sent = true;
1190 return -EBUSY;
1191 }
1192
1193 if ((card->has_control_mask) && (*port == CTRL_PORT)) {
1194 mwifiex_dbg(adapter, ERROR,
1195 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1196 *port, card->curr_wr_port, wr_bitmap,
1197 card->mp_wr_bitmap);
1198 return -1;
1199 }
1200
1201 mwifiex_dbg(adapter, DATA,
1202 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1203 *port, wr_bitmap, card->mp_wr_bitmap);
1204
1205 return 0;
1206 }
1207
1208
1209
1210
1211 static int
1212 mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
1213 {
1214 struct sdio_mmc_card *card = adapter->card;
1215 u32 tries;
1216 u8 cs;
1217
1218 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1219 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
1220 break;
1221 else if ((cs & bits) == bits)
1222 return 0;
1223
1224 usleep_range(10, 20);
1225 }
1226
1227 mwifiex_dbg(adapter, ERROR,
1228 "poll card status failed, tries = %d\n", tries);
1229
1230 return -1;
1231 }
1232
1233
1234
1235
1236
1237
1238
1239 static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
1240 {
1241 struct sdio_mmc_card *card = adapter->card;
1242 struct sdio_func *func = card->func;
1243
1244 sdio_claim_host(func);
1245 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
1246 sdio_release_irq(func);
1247 sdio_release_host(func);
1248 }
1249
1250
1251
1252
1253 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1254 {
1255 struct sdio_mmc_card *card = adapter->card;
1256 u8 sdio_ireg;
1257 unsigned long flags;
1258
1259 if (mwifiex_read_data_sync(adapter, card->mp_regs,
1260 card->reg->max_mp_regs,
1261 REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) {
1262 mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n");
1263 return;
1264 }
1265
1266 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
1267 if (sdio_ireg) {
1268
1269
1270
1271
1272
1273
1274
1275 mwifiex_dbg(adapter, INTR,
1276 "int: sdio_ireg = %#x\n", sdio_ireg);
1277 spin_lock_irqsave(&adapter->int_lock, flags);
1278 adapter->int_status |= sdio_ireg;
1279 spin_unlock_irqrestore(&adapter->int_lock, flags);
1280 }
1281 }
1282
1283
1284
1285
1286
1287
1288
1289 static void
1290 mwifiex_sdio_interrupt(struct sdio_func *func)
1291 {
1292 struct mwifiex_adapter *adapter;
1293 struct sdio_mmc_card *card;
1294
1295 card = sdio_get_drvdata(func);
1296 if (!card || !card->adapter) {
1297 pr_err("int: func=%p card=%p adapter=%p\n",
1298 func, card, card ? card->adapter : NULL);
1299 return;
1300 }
1301 adapter = card->adapter;
1302
1303 if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP)
1304 adapter->ps_state = PS_STATE_AWAKE;
1305
1306 mwifiex_interrupt_status(adapter);
1307 mwifiex_main_process(adapter);
1308 }
1309
1310
1311
1312
1313
1314
1315
1316 static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
1317 {
1318 struct sdio_mmc_card *card = adapter->card;
1319 struct sdio_func *func = card->func;
1320 int ret;
1321
1322 sdio_claim_host(func);
1323
1324
1325 ret = sdio_claim_irq(func, mwifiex_sdio_interrupt);
1326 if (ret) {
1327 mwifiex_dbg(adapter, ERROR,
1328 "claim irq failed: ret=%d\n", ret);
1329 goto out;
1330 }
1331
1332
1333 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
1334 card->reg->host_int_enable);
1335 if (ret) {
1336 mwifiex_dbg(adapter, ERROR,
1337 "enable host interrupt failed\n");
1338 sdio_release_irq(func);
1339 }
1340
1341 out:
1342 sdio_release_host(func);
1343 return ret;
1344 }
1345
1346
1347
1348
1349 static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter,
1350 u32 *type, u8 *buffer,
1351 u32 npayload, u32 ioport)
1352 {
1353 int ret;
1354 u32 nb;
1355
1356 if (!buffer) {
1357 mwifiex_dbg(adapter, ERROR,
1358 "%s: buffer is NULL\n", __func__);
1359 return -1;
1360 }
1361
1362 ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1);
1363
1364 if (ret) {
1365 mwifiex_dbg(adapter, ERROR,
1366 "%s: read iomem failed: %d\n", __func__,
1367 ret);
1368 return -1;
1369 }
1370
1371 nb = get_unaligned_le16((buffer));
1372 if (nb > npayload) {
1373 mwifiex_dbg(adapter, ERROR,
1374 "%s: invalid packet, nb=%d npayload=%d\n",
1375 __func__, nb, npayload);
1376 return -1;
1377 }
1378
1379 *type = get_unaligned_le16((buffer + 2));
1380
1381 return ret;
1382 }
1383
1384
1385
1386
1387
1388
1389
1390
1391 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1392 struct mwifiex_fw_image *fw)
1393 {
1394 struct sdio_mmc_card *card = adapter->card;
1395 const struct mwifiex_sdio_card_reg *reg = card->reg;
1396 int ret;
1397 u8 *firmware = fw->fw_buf;
1398 u32 firmware_len = fw->fw_len;
1399 u32 offset = 0;
1400 u8 base0, base1;
1401 u8 *fwbuf;
1402 u16 len = 0;
1403 u32 txlen, tx_blocks = 0, tries;
1404 u32 i = 0;
1405
1406 if (!firmware_len) {
1407 mwifiex_dbg(adapter, ERROR,
1408 "firmware image not found! Terminating download\n");
1409 return -1;
1410 }
1411
1412 mwifiex_dbg(adapter, INFO,
1413 "info: downloading FW image (%d bytes)\n",
1414 firmware_len);
1415
1416
1417 fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL);
1418 if (!fwbuf)
1419 return -ENOMEM;
1420
1421 sdio_claim_host(card->func);
1422
1423
1424 do {
1425
1426
1427 ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY |
1428 DN_LD_CARD_RDY);
1429 if (ret) {
1430 mwifiex_dbg(adapter, ERROR,
1431 "FW download with helper:\t"
1432 "poll status timeout @ %d\n", offset);
1433 goto done;
1434 }
1435
1436
1437 if (offset >= firmware_len)
1438 break;
1439
1440 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1441 ret = mwifiex_read_reg(adapter, reg->base_0_reg,
1442 &base0);
1443 if (ret) {
1444 mwifiex_dbg(adapter, ERROR,
1445 "dev BASE0 register read failed:\t"
1446 "base0=%#04X(%d). Terminating dnld\n",
1447 base0, base0);
1448 goto done;
1449 }
1450 ret = mwifiex_read_reg(adapter, reg->base_1_reg,
1451 &base1);
1452 if (ret) {
1453 mwifiex_dbg(adapter, ERROR,
1454 "dev BASE1 register read failed:\t"
1455 "base1=%#04X(%d). Terminating dnld\n",
1456 base1, base1);
1457 goto done;
1458 }
1459 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff));
1460
1461 if (len)
1462 break;
1463
1464 usleep_range(10, 20);
1465 }
1466
1467 if (!len) {
1468 break;
1469 } else if (len > MWIFIEX_UPLD_SIZE) {
1470 mwifiex_dbg(adapter, ERROR,
1471 "FW dnld failed @ %d, invalid length %d\n",
1472 offset, len);
1473 ret = -1;
1474 goto done;
1475 }
1476
1477 txlen = len;
1478
1479 if (len & BIT(0)) {
1480 i++;
1481 if (i > MAX_WRITE_IOMEM_RETRY) {
1482 mwifiex_dbg(adapter, ERROR,
1483 "FW dnld failed @ %d, over max retry\n",
1484 offset);
1485 ret = -1;
1486 goto done;
1487 }
1488 mwifiex_dbg(adapter, ERROR,
1489 "CRC indicated by the helper:\t"
1490 "len = 0x%04X, txlen = %d\n", len, txlen);
1491 len &= ~BIT(0);
1492
1493 txlen = 0;
1494 } else {
1495 i = 0;
1496
1497
1498
1499 if (firmware_len - offset < txlen)
1500 txlen = firmware_len - offset;
1501
1502 tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1)
1503 / MWIFIEX_SDIO_BLOCK_SIZE;
1504
1505
1506 memmove(fwbuf, &firmware[offset], txlen);
1507 }
1508
1509 ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks *
1510 MWIFIEX_SDIO_BLOCK_SIZE,
1511 adapter->ioport);
1512 if (ret) {
1513 mwifiex_dbg(adapter, ERROR,
1514 "FW download, write iomem (%d) failed @ %d\n",
1515 i, offset);
1516 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
1517 mwifiex_dbg(adapter, ERROR,
1518 "write CFG reg failed\n");
1519
1520 ret = -1;
1521 goto done;
1522 }
1523
1524 offset += txlen;
1525 } while (true);
1526
1527 mwifiex_dbg(adapter, MSG,
1528 "info: FW download over, size %d bytes\n", offset);
1529
1530 ret = 0;
1531 done:
1532 sdio_release_host(card->func);
1533 kfree(fwbuf);
1534 return ret;
1535 }
1536
1537
1538
1539
1540
1541
1542
1543 static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter,
1544 struct sk_buff *skb)
1545 {
1546 u32 total_pkt_len, pkt_len;
1547 struct sk_buff *skb_deaggr;
1548 u16 blk_size;
1549 u8 blk_num;
1550 u8 *data;
1551
1552 data = skb->data;
1553 total_pkt_len = skb->len;
1554
1555 while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) {
1556 if (total_pkt_len < adapter->sdio_rx_block_size)
1557 break;
1558 blk_num = *(data + BLOCK_NUMBER_OFFSET);
1559 blk_size = adapter->sdio_rx_block_size * blk_num;
1560 if (blk_size > total_pkt_len) {
1561 mwifiex_dbg(adapter, ERROR,
1562 "%s: error in blk_size,\t"
1563 "blk_num=%d, blk_size=%d, total_pkt_len=%d\n",
1564 __func__, blk_num, blk_size, total_pkt_len);
1565 break;
1566 }
1567 pkt_len = get_unaligned_le16((data +
1568 SDIO_HEADER_OFFSET));
1569 if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) {
1570 mwifiex_dbg(adapter, ERROR,
1571 "%s: error in pkt_len,\t"
1572 "pkt_len=%d, blk_size=%d\n",
1573 __func__, pkt_len, blk_size);
1574 break;
1575 }
1576
1577 skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL);
1578 if (!skb_deaggr)
1579 break;
1580 skb_put(skb_deaggr, pkt_len);
1581 memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len);
1582 skb_pull(skb_deaggr, adapter->intf_hdr_len);
1583
1584 mwifiex_handle_rx_packet(adapter, skb_deaggr);
1585 data += blk_size;
1586 total_pkt_len -= blk_size;
1587 }
1588 }
1589
1590
1591
1592
1593
1594
1595
1596
1597 static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter,
1598 struct sk_buff *skb, u32 upld_typ)
1599 {
1600 u8 *cmd_buf;
1601 u16 pkt_len;
1602 struct mwifiex_rxinfo *rx_info;
1603
1604 pkt_len = get_unaligned_le16(skb->data);
1605
1606 if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) {
1607 skb_trim(skb, pkt_len);
1608 skb_pull(skb, adapter->intf_hdr_len);
1609 }
1610
1611 switch (upld_typ) {
1612 case MWIFIEX_TYPE_AGGR_DATA:
1613 mwifiex_dbg(adapter, INFO,
1614 "info: --- Rx: Aggr Data packet ---\n");
1615 rx_info = MWIFIEX_SKB_RXCB(skb);
1616 rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA;
1617 if (adapter->rx_work_enabled) {
1618 skb_queue_tail(&adapter->rx_data_q, skb);
1619 atomic_inc(&adapter->rx_pending);
1620 adapter->data_received = true;
1621 } else {
1622 mwifiex_deaggr_sdio_pkt(adapter, skb);
1623 dev_kfree_skb_any(skb);
1624 }
1625 break;
1626
1627 case MWIFIEX_TYPE_DATA:
1628 mwifiex_dbg(adapter, DATA,
1629 "info: --- Rx: Data packet ---\n");
1630 if (adapter->rx_work_enabled) {
1631 skb_queue_tail(&adapter->rx_data_q, skb);
1632 adapter->data_received = true;
1633 atomic_inc(&adapter->rx_pending);
1634 } else {
1635 mwifiex_handle_rx_packet(adapter, skb);
1636 }
1637 break;
1638
1639 case MWIFIEX_TYPE_CMD:
1640 mwifiex_dbg(adapter, CMD,
1641 "info: --- Rx: Cmd Response ---\n");
1642
1643 if (!adapter->curr_cmd) {
1644 cmd_buf = adapter->upld_buf;
1645
1646 if (adapter->ps_state == PS_STATE_SLEEP_CFM)
1647 mwifiex_process_sleep_confirm_resp(adapter,
1648 skb->data,
1649 skb->len);
1650
1651 memcpy(cmd_buf, skb->data,
1652 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER,
1653 skb->len));
1654
1655 dev_kfree_skb_any(skb);
1656 } else {
1657 adapter->cmd_resp_received = true;
1658 adapter->curr_cmd->resp_skb = skb;
1659 }
1660 break;
1661
1662 case MWIFIEX_TYPE_EVENT:
1663 mwifiex_dbg(adapter, EVENT,
1664 "info: --- Rx: Event ---\n");
1665 adapter->event_cause = get_unaligned_le32(skb->data);
1666
1667 if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE))
1668 memcpy(adapter->event_body,
1669 skb->data + MWIFIEX_EVENT_HEADER_LEN,
1670 skb->len);
1671
1672
1673 adapter->event_received = true;
1674 adapter->event_skb = skb;
1675
1676 break;
1677
1678 default:
1679 mwifiex_dbg(adapter, ERROR,
1680 "unknown upload type %#x\n", upld_typ);
1681 dev_kfree_skb_any(skb);
1682 break;
1683 }
1684
1685 return 0;
1686 }
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697 static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
1698 u16 rx_len, u8 port)
1699 {
1700 struct sdio_mmc_card *card = adapter->card;
1701 s32 f_do_rx_aggr = 0;
1702 s32 f_do_rx_cur = 0;
1703 s32 f_aggr_cur = 0;
1704 s32 f_post_aggr_cur = 0;
1705 struct sk_buff *skb_deaggr;
1706 struct sk_buff *skb = NULL;
1707 u32 pkt_len, pkt_type, mport, pind;
1708 u8 *curr_ptr;
1709
1710 if ((card->has_control_mask) && (port == CTRL_PORT)) {
1711
1712 mwifiex_dbg(adapter, CMD,
1713 "info: %s: no aggregation for cmd\t"
1714 "response\n", __func__);
1715
1716 f_do_rx_cur = 1;
1717 goto rx_curr_single;
1718 }
1719
1720 if (!card->mpa_rx.enabled) {
1721 mwifiex_dbg(adapter, WARN,
1722 "info: %s: rx aggregation disabled\n",
1723 __func__);
1724
1725 f_do_rx_cur = 1;
1726 goto rx_curr_single;
1727 }
1728
1729 if ((!card->has_control_mask && (card->mp_rd_bitmap &
1730 card->reg->data_port_mask)) ||
1731 (card->has_control_mask && (card->mp_rd_bitmap &
1732 (~((u32) CTRL_PORT_MASK))))) {
1733
1734 mwifiex_dbg(adapter, INFO,
1735 "info: %s: not last packet\n", __func__);
1736
1737 if (MP_RX_AGGR_IN_PROGRESS(card)) {
1738 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) {
1739 f_aggr_cur = 1;
1740 } else {
1741
1742 f_do_rx_aggr = 1;
1743 f_post_aggr_cur = 1;
1744 }
1745 } else {
1746
1747 f_aggr_cur = 1;
1748 }
1749
1750 } else {
1751
1752 mwifiex_dbg(adapter, INFO,
1753 "info: %s: last packet\n", __func__);
1754
1755 if (MP_RX_AGGR_IN_PROGRESS(card)) {
1756 f_do_rx_aggr = 1;
1757 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len))
1758 f_aggr_cur = 1;
1759 else
1760
1761 f_do_rx_cur = 1;
1762 } else {
1763 f_do_rx_cur = 1;
1764 }
1765 }
1766
1767 if (f_aggr_cur) {
1768 mwifiex_dbg(adapter, INFO,
1769 "info: current packet aggregation\n");
1770
1771 mp_rx_aggr_setup(card, rx_len, port);
1772
1773 if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) ||
1774 mp_rx_aggr_port_limit_reached(card)) {
1775 mwifiex_dbg(adapter, INFO,
1776 "info: %s: aggregated packet\t"
1777 "limit reached\n", __func__);
1778
1779 f_do_rx_aggr = 1;
1780 }
1781 }
1782
1783 if (f_do_rx_aggr) {
1784
1785 mwifiex_dbg(adapter, DATA,
1786 "info: do_rx_aggr: num of packets: %d\n",
1787 card->mpa_rx.pkt_cnt);
1788
1789 if (card->supports_sdio_new_mode) {
1790 int i;
1791 u32 port_count;
1792
1793 for (i = 0, port_count = 0; i < card->max_ports; i++)
1794 if (card->mpa_rx.ports & BIT(i))
1795 port_count++;
1796
1797
1798
1799
1800 port_count--;
1801 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
1802 (port_count << 8)) + card->mpa_rx.start_port;
1803 } else {
1804 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
1805 (card->mpa_rx.ports << 4)) +
1806 card->mpa_rx.start_port;
1807 }
1808
1809 if (card->mpa_rx.pkt_cnt == 1)
1810 mport = adapter->ioport + card->mpa_rx.start_port;
1811
1812 if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf,
1813 card->mpa_rx.buf_len, mport, 1))
1814 goto error;
1815
1816 curr_ptr = card->mpa_rx.buf;
1817
1818 for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) {
1819 u32 *len_arr = card->mpa_rx.len_arr;
1820
1821
1822 pkt_len = get_unaligned_le16(&curr_ptr[0]);
1823 pkt_type = get_unaligned_le16(&curr_ptr[2]);
1824
1825
1826 skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind],
1827 GFP_KERNEL);
1828 if (!skb_deaggr) {
1829 mwifiex_dbg(adapter, ERROR, "skb allocation failure\t"
1830 "drop pkt len=%d type=%d\n",
1831 pkt_len, pkt_type);
1832 curr_ptr += len_arr[pind];
1833 continue;
1834 }
1835
1836 skb_put(skb_deaggr, len_arr[pind]);
1837
1838 if ((pkt_type == MWIFIEX_TYPE_DATA ||
1839 (pkt_type == MWIFIEX_TYPE_AGGR_DATA &&
1840 adapter->sdio_rx_aggr_enable)) &&
1841 (pkt_len <= len_arr[pind])) {
1842
1843 memcpy(skb_deaggr->data, curr_ptr, pkt_len);
1844
1845 skb_trim(skb_deaggr, pkt_len);
1846
1847
1848 mwifiex_decode_rx_packet(adapter, skb_deaggr,
1849 pkt_type);
1850 } else {
1851 mwifiex_dbg(adapter, ERROR,
1852 "drop wrong aggr pkt:\t"
1853 "sdio_single_port_rx_aggr=%d\t"
1854 "type=%d len=%d max_len=%d\n",
1855 adapter->sdio_rx_aggr_enable,
1856 pkt_type, pkt_len, len_arr[pind]);
1857 dev_kfree_skb_any(skb_deaggr);
1858 }
1859 curr_ptr += len_arr[pind];
1860 }
1861 MP_RX_AGGR_BUF_RESET(card);
1862 }
1863
1864 rx_curr_single:
1865 if (f_do_rx_cur) {
1866 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n",
1867 port, rx_len);
1868
1869 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
1870 if (!skb) {
1871 mwifiex_dbg(adapter, ERROR,
1872 "single skb allocated fail,\t"
1873 "drop pkt port=%d len=%d\n", port, rx_len);
1874 if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
1875 card->mpa_rx.buf, rx_len,
1876 adapter->ioport + port))
1877 goto error;
1878 return 0;
1879 }
1880
1881 skb_put(skb, rx_len);
1882
1883 if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
1884 skb->data, skb->len,
1885 adapter->ioport + port))
1886 goto error;
1887 if (!adapter->sdio_rx_aggr_enable &&
1888 pkt_type == MWIFIEX_TYPE_AGGR_DATA) {
1889 mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t"
1890 "current SDIO RX Aggr not enabled\n",
1891 pkt_type);
1892 dev_kfree_skb_any(skb);
1893 return 0;
1894 }
1895
1896 mwifiex_decode_rx_packet(adapter, skb, pkt_type);
1897 }
1898 if (f_post_aggr_cur) {
1899 mwifiex_dbg(adapter, INFO,
1900 "info: current packet aggregation\n");
1901
1902 mp_rx_aggr_setup(card, rx_len, port);
1903 }
1904
1905 return 0;
1906 error:
1907 if (MP_RX_AGGR_IN_PROGRESS(card))
1908 MP_RX_AGGR_BUF_RESET(card);
1909
1910 if (f_do_rx_cur && skb)
1911
1912 dev_kfree_skb_any(skb);
1913
1914 return -1;
1915 }
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
1933 {
1934 struct sdio_mmc_card *card = adapter->card;
1935 const struct mwifiex_sdio_card_reg *reg = card->reg;
1936 int ret = 0;
1937 u8 sdio_ireg;
1938 struct sk_buff *skb;
1939 u8 port = CTRL_PORT;
1940 u32 len_reg_l, len_reg_u;
1941 u32 rx_blocks;
1942 u16 rx_len;
1943 unsigned long flags;
1944 u32 bitmap;
1945 u8 cr;
1946
1947 spin_lock_irqsave(&adapter->int_lock, flags);
1948 sdio_ireg = adapter->int_status;
1949 adapter->int_status = 0;
1950 spin_unlock_irqrestore(&adapter->int_lock, flags);
1951
1952 if (!sdio_ireg)
1953 return ret;
1954
1955
1956 if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent)
1957 adapter->cmd_sent = false;
1958
1959
1960 if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) {
1961 u32 pkt_type;
1962
1963
1964 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
1965 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
1966 rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
1967 if (rx_len <= adapter->intf_hdr_len ||
1968 (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
1969 MWIFIEX_RX_DATA_BUF_SIZE)
1970 return -1;
1971 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
1972 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len);
1973
1974 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
1975 if (!skb)
1976 return -1;
1977
1978 skb_put(skb, rx_len);
1979
1980 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data,
1981 skb->len, adapter->ioport |
1982 CMD_PORT_SLCT)) {
1983 mwifiex_dbg(adapter, ERROR,
1984 "%s: failed to card_to_host", __func__);
1985 dev_kfree_skb_any(skb);
1986 goto term_cmd;
1987 }
1988
1989 if ((pkt_type != MWIFIEX_TYPE_CMD) &&
1990 (pkt_type != MWIFIEX_TYPE_EVENT))
1991 mwifiex_dbg(adapter, ERROR,
1992 "%s:Received wrong packet on cmd port",
1993 __func__);
1994
1995 mwifiex_decode_rx_packet(adapter, skb, pkt_type);
1996 }
1997
1998 if (sdio_ireg & DN_LD_HOST_INT_STATUS) {
1999 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l];
2000 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
2001 if (card->supports_sdio_new_mode) {
2002 bitmap |=
2003 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16;
2004 bitmap |=
2005 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24;
2006 }
2007 card->mp_wr_bitmap = bitmap;
2008
2009 mwifiex_dbg(adapter, INTR,
2010 "int: DNLD: wr_bitmap=0x%x\n",
2011 card->mp_wr_bitmap);
2012 if (adapter->data_sent &&
2013 (card->mp_wr_bitmap & card->mp_data_port_mask)) {
2014 mwifiex_dbg(adapter, INTR,
2015 "info: <--- Tx DONE Interrupt --->\n");
2016 adapter->data_sent = false;
2017 }
2018 }
2019
2020
2021
2022
2023 if (card->has_control_mask && adapter->cmd_sent) {
2024
2025
2026 card->mp_wr_bitmap |=
2027 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
2028 if (card->mp_wr_bitmap & CTRL_PORT_MASK)
2029 adapter->cmd_sent = false;
2030 }
2031
2032 mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n",
2033 adapter->cmd_sent, adapter->data_sent);
2034 if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
2035 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l];
2036 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
2037 if (card->supports_sdio_new_mode) {
2038 bitmap |=
2039 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16;
2040 bitmap |=
2041 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24;
2042 }
2043 card->mp_rd_bitmap = bitmap;
2044 mwifiex_dbg(adapter, INTR,
2045 "int: UPLD: rd_bitmap=0x%x\n",
2046 card->mp_rd_bitmap);
2047
2048 while (true) {
2049 ret = mwifiex_get_rd_port(adapter, &port);
2050 if (ret) {
2051 mwifiex_dbg(adapter, INFO,
2052 "info: no more rd_port available\n");
2053 break;
2054 }
2055 len_reg_l = reg->rd_len_p0_l + (port << 1);
2056 len_reg_u = reg->rd_len_p0_u + (port << 1);
2057 rx_len = ((u16) card->mp_regs[len_reg_u]) << 8;
2058 rx_len |= (u16) card->mp_regs[len_reg_l];
2059 mwifiex_dbg(adapter, INFO,
2060 "info: RX: port=%d rx_len=%u\n",
2061 port, rx_len);
2062 rx_blocks =
2063 (rx_len + MWIFIEX_SDIO_BLOCK_SIZE -
2064 1) / MWIFIEX_SDIO_BLOCK_SIZE;
2065 if (rx_len <= adapter->intf_hdr_len ||
2066 (card->mpa_rx.enabled &&
2067 ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
2068 card->mpa_rx.buf_size))) {
2069 mwifiex_dbg(adapter, ERROR,
2070 "invalid rx_len=%d\n",
2071 rx_len);
2072 return -1;
2073 }
2074
2075 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
2076 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n",
2077 rx_len);
2078
2079 if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len,
2080 port)) {
2081 mwifiex_dbg(adapter, ERROR,
2082 "card_to_host_mpa failed: int status=%#x\n",
2083 sdio_ireg);
2084 goto term_cmd;
2085 }
2086 }
2087 }
2088
2089 return 0;
2090
2091 term_cmd:
2092
2093 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
2094 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n");
2095 else
2096 mwifiex_dbg(adapter, INFO,
2097 "info: CFG reg val = %d\n", cr);
2098
2099 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04)))
2100 mwifiex_dbg(adapter, ERROR,
2101 "write CFG reg failed\n");
2102 else
2103 mwifiex_dbg(adapter, INFO, "info: write success\n");
2104
2105 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
2106 mwifiex_dbg(adapter, ERROR,
2107 "read CFG reg failed\n");
2108 else
2109 mwifiex_dbg(adapter, INFO,
2110 "info: CFG reg val =%x\n", cr);
2111
2112 return -1;
2113 }
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129 static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
2130 u8 *payload, u32 pkt_len, u32 port,
2131 u32 next_pkt_len)
2132 {
2133 struct sdio_mmc_card *card = adapter->card;
2134 int ret = 0;
2135 s32 f_send_aggr_buf = 0;
2136 s32 f_send_cur_buf = 0;
2137 s32 f_precopy_cur_buf = 0;
2138 s32 f_postcopy_cur_buf = 0;
2139 u32 mport;
2140 int index;
2141
2142 if (!card->mpa_tx.enabled ||
2143 (card->has_control_mask && (port == CTRL_PORT)) ||
2144 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
2145 mwifiex_dbg(adapter, WARN,
2146 "info: %s: tx aggregation disabled\n",
2147 __func__);
2148
2149 f_send_cur_buf = 1;
2150 goto tx_curr_single;
2151 }
2152
2153 if (next_pkt_len) {
2154
2155 mwifiex_dbg(adapter, INFO,
2156 "info: %s: more packets in queue.\n",
2157 __func__);
2158
2159 if (MP_TX_AGGR_IN_PROGRESS(card)) {
2160 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
2161 f_precopy_cur_buf = 1;
2162
2163 if (!(card->mp_wr_bitmap &
2164 (1 << card->curr_wr_port)) ||
2165 !MP_TX_AGGR_BUF_HAS_ROOM(
2166 card, pkt_len + next_pkt_len))
2167 f_send_aggr_buf = 1;
2168 } else {
2169
2170 f_send_aggr_buf = 1;
2171
2172 if (!(card->mp_wr_bitmap &
2173 (1 << card->curr_wr_port)))
2174 f_send_cur_buf = 1;
2175 else
2176 f_postcopy_cur_buf = 1;
2177 }
2178 } else {
2179 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) &&
2180 (card->mp_wr_bitmap & (1 << card->curr_wr_port)))
2181 f_precopy_cur_buf = 1;
2182 else
2183 f_send_cur_buf = 1;
2184 }
2185 } else {
2186
2187 mwifiex_dbg(adapter, INFO,
2188 "info: %s: Last packet in Tx Queue.\n",
2189 __func__);
2190
2191 if (MP_TX_AGGR_IN_PROGRESS(card)) {
2192
2193 f_send_aggr_buf = 1;
2194
2195 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len))
2196 f_precopy_cur_buf = 1;
2197 else
2198
2199 f_send_cur_buf = 1;
2200 } else {
2201 f_send_cur_buf = 1;
2202 }
2203 }
2204
2205 if (f_precopy_cur_buf) {
2206 mwifiex_dbg(adapter, DATA,
2207 "data: %s: precopy current buffer\n",
2208 __func__);
2209 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2210
2211 if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) ||
2212 mp_tx_aggr_port_limit_reached(card))
2213
2214 f_send_aggr_buf = 1;
2215 }
2216
2217 if (f_send_aggr_buf) {
2218 mwifiex_dbg(adapter, DATA,
2219 "data: %s: send aggr buffer: %d %d\n",
2220 __func__, card->mpa_tx.start_port,
2221 card->mpa_tx.ports);
2222 if (card->supports_sdio_new_mode) {
2223 u32 port_count;
2224 int i;
2225
2226 for (i = 0, port_count = 0; i < card->max_ports; i++)
2227 if (card->mpa_tx.ports & BIT(i))
2228 port_count++;
2229
2230
2231
2232
2233 port_count--;
2234 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
2235 (port_count << 8)) + card->mpa_tx.start_port;
2236 } else {
2237 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
2238 (card->mpa_tx.ports << 4)) +
2239 card->mpa_tx.start_port;
2240 }
2241
2242 if (card->mpa_tx.pkt_cnt == 1)
2243 mport = adapter->ioport + card->mpa_tx.start_port;
2244
2245 ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf,
2246 card->mpa_tx.buf_len, mport);
2247
2248
2249 index = adapter->dbg.last_sdio_mp_index;
2250 index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM;
2251 adapter->dbg.last_sdio_mp_index = index;
2252 adapter->dbg.last_mp_wr_ports[index] = mport;
2253 adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap;
2254 adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len;
2255 adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port;
2256
2257 MP_TX_AGGR_BUF_RESET(card);
2258 }
2259
2260 tx_curr_single:
2261 if (f_send_cur_buf) {
2262 mwifiex_dbg(adapter, DATA,
2263 "data: %s: send current buffer %d\n",
2264 __func__, port);
2265 ret = mwifiex_write_data_to_card(adapter, payload, pkt_len,
2266 adapter->ioport + port);
2267 }
2268
2269 if (f_postcopy_cur_buf) {
2270 mwifiex_dbg(adapter, DATA,
2271 "data: %s: postcopy current buffer\n",
2272 __func__);
2273 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2274 }
2275
2276 return ret;
2277 }
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289 static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter,
2290 u8 type, struct sk_buff *skb,
2291 struct mwifiex_tx_param *tx_param)
2292 {
2293 struct sdio_mmc_card *card = adapter->card;
2294 int ret;
2295 u32 buf_block_len;
2296 u32 blk_size;
2297 u32 port = CTRL_PORT;
2298 u8 *payload = (u8 *)skb->data;
2299 u32 pkt_len = skb->len;
2300
2301
2302 blk_size = MWIFIEX_SDIO_BLOCK_SIZE;
2303 buf_block_len = (pkt_len + blk_size - 1) / blk_size;
2304 put_unaligned_le16((u16)pkt_len, payload + 0);
2305 put_unaligned_le16((u32)type, payload + 2);
2306
2307
2308
2309
2310
2311
2312
2313
2314 if (type == MWIFIEX_TYPE_DATA) {
2315 ret = mwifiex_get_wr_port_data(adapter, &port);
2316 if (ret) {
2317 mwifiex_dbg(adapter, ERROR,
2318 "%s: no wr_port available\n",
2319 __func__);
2320 return ret;
2321 }
2322 } else {
2323 adapter->cmd_sent = true;
2324
2325
2326 if (pkt_len <= adapter->intf_hdr_len ||
2327 pkt_len > MWIFIEX_UPLD_SIZE)
2328 mwifiex_dbg(adapter, ERROR,
2329 "%s: payload=%p, nb=%d\n",
2330 __func__, payload, pkt_len);
2331
2332 if (card->supports_sdio_new_mode)
2333 port = CMD_PORT_SLCT;
2334 }
2335
2336
2337 pkt_len = buf_block_len * blk_size;
2338
2339 if (tx_param)
2340 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
2341 port, tx_param->next_pkt_len
2342 );
2343 else
2344 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
2345 port, 0);
2346
2347 if (ret) {
2348 if (type == MWIFIEX_TYPE_CMD)
2349 adapter->cmd_sent = false;
2350 if (type == MWIFIEX_TYPE_DATA) {
2351 adapter->data_sent = false;
2352
2353 card->curr_wr_port = port;
2354 card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port);
2355 }
2356 } else {
2357 if (type == MWIFIEX_TYPE_DATA) {
2358 if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port)))
2359 adapter->data_sent = true;
2360 else
2361 adapter->data_sent = false;
2362 }
2363 }
2364
2365 return ret;
2366 }
2367
2368
2369
2370
2371 static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter,
2372 u32 mpa_tx_buf_size, u32 mpa_rx_buf_size)
2373 {
2374 struct sdio_mmc_card *card = adapter->card;
2375 u32 rx_buf_size;
2376 int ret = 0;
2377
2378 card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL);
2379 if (!card->mpa_tx.buf) {
2380 ret = -1;
2381 goto error;
2382 }
2383
2384 card->mpa_tx.buf_size = mpa_tx_buf_size;
2385
2386 rx_buf_size = max_t(u32, mpa_rx_buf_size,
2387 (u32)SDIO_MAX_AGGR_BUF_SIZE);
2388 card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL);
2389 if (!card->mpa_rx.buf) {
2390 ret = -1;
2391 goto error;
2392 }
2393
2394 card->mpa_rx.buf_size = rx_buf_size;
2395
2396 error:
2397 if (ret) {
2398 kfree(card->mpa_tx.buf);
2399 kfree(card->mpa_rx.buf);
2400 card->mpa_tx.buf_size = 0;
2401 card->mpa_rx.buf_size = 0;
2402 card->mpa_tx.buf = NULL;
2403 card->mpa_rx.buf = NULL;
2404 }
2405
2406 return ret;
2407 }
2408
2409
2410
2411
2412
2413
2414
2415 static void
2416 mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2417 {
2418 struct sdio_mmc_card *card = adapter->card;
2419
2420 if (adapter->card) {
2421 card->adapter = NULL;
2422 sdio_claim_host(card->func);
2423 sdio_disable_func(card->func);
2424 sdio_release_host(card->func);
2425 }
2426 }
2427
2428
2429
2430
2431
2432
2433 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2434 {
2435 int ret;
2436 struct sdio_mmc_card *card = adapter->card;
2437 struct sdio_func *func = card->func;
2438 const char *firmware = card->firmware;
2439
2440
2441 card->adapter = adapter;
2442 adapter->tx_buf_size = card->tx_buf_size;
2443
2444 sdio_claim_host(func);
2445
2446
2447 ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
2448 sdio_release_host(func);
2449 if (ret) {
2450 mwifiex_dbg(adapter, ERROR,
2451 "cannot set SDIO block size\n");
2452 return ret;
2453 }
2454
2455
2456
2457
2458 if (card->firmware_sdiouart) {
2459 u8 val;
2460
2461 mwifiex_read_reg(adapter, card->reg->host_strap_reg, &val);
2462 if ((val & card->reg->host_strap_mask) == card->reg->host_strap_value)
2463 firmware = card->firmware_sdiouart;
2464 }
2465 strcpy(adapter->fw_name, firmware);
2466
2467 if (card->fw_dump_enh) {
2468 adapter->mem_type_mapping_tbl = generic_mem_type_map;
2469 adapter->num_mem_types = 1;
2470 } else {
2471 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl;
2472 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl);
2473 }
2474
2475 return 0;
2476 }
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490 static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
2491 {
2492 struct sdio_mmc_card *card = adapter->card;
2493 const struct mwifiex_sdio_card_reg *reg = card->reg;
2494 int ret;
2495 u8 sdio_ireg;
2496
2497 sdio_set_drvdata(card->func, card);
2498
2499
2500
2501
2502
2503
2504 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
2505
2506
2507 mwifiex_init_sdio_ioport(adapter);
2508
2509
2510 card->mp_rd_bitmap = 0;
2511 card->mp_wr_bitmap = 0;
2512 card->curr_rd_port = reg->start_rd_port;
2513 card->curr_wr_port = reg->start_wr_port;
2514
2515 card->mp_data_port_mask = reg->data_port_mask;
2516
2517 card->mpa_tx.buf_len = 0;
2518 card->mpa_tx.pkt_cnt = 0;
2519 card->mpa_tx.start_port = 0;
2520
2521 card->mpa_tx.enabled = 1;
2522 card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit;
2523
2524 card->mpa_rx.buf_len = 0;
2525 card->mpa_rx.pkt_cnt = 0;
2526 card->mpa_rx.start_port = 0;
2527
2528 card->mpa_rx.enabled = 1;
2529 card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit;
2530
2531
2532 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
2533 if (!card->mp_regs)
2534 return -ENOMEM;
2535
2536
2537 card->mpa_rx.skb_arr = kcalloc(card->mp_agg_pkt_limit, sizeof(void *),
2538 GFP_KERNEL);
2539 if (!card->mpa_rx.skb_arr) {
2540 kfree(card->mp_regs);
2541 return -ENOMEM;
2542 }
2543
2544 card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit,
2545 sizeof(*card->mpa_rx.len_arr),
2546 GFP_KERNEL);
2547 if (!card->mpa_rx.len_arr) {
2548 kfree(card->mp_regs);
2549 kfree(card->mpa_rx.skb_arr);
2550 return -ENOMEM;
2551 }
2552
2553 ret = mwifiex_alloc_sdio_mpa_buffers(adapter,
2554 card->mp_tx_agg_buf_size,
2555 card->mp_rx_agg_buf_size);
2556
2557
2558 if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX ||
2559 card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) {
2560
2561 adapter->host_disable_sdio_rx_aggr = true;
2562
2563 ret = mwifiex_alloc_sdio_mpa_buffers
2564 (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K,
2565 MWIFIEX_MP_AGGR_BUF_SIZE_32K);
2566 if (ret) {
2567
2568 card->mpa_tx.enabled = 0;
2569 card->mpa_rx.enabled = 0;
2570 }
2571 }
2572
2573 adapter->auto_tdls = card->can_auto_tdls;
2574 adapter->ext_scan = card->can_ext_scan;
2575 return 0;
2576 }
2577
2578
2579
2580
2581 static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter)
2582 {
2583 struct sdio_mmc_card *card = adapter->card;
2584
2585 MP_TX_AGGR_BUF_RESET(card);
2586 MP_RX_AGGR_BUF_RESET(card);
2587 }
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597 static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter)
2598 {
2599 struct sdio_mmc_card *card = adapter->card;
2600
2601 cancel_work_sync(&card->work);
2602
2603 kfree(card->mp_regs);
2604 kfree(card->mpa_rx.skb_arr);
2605 kfree(card->mpa_rx.len_arr);
2606 kfree(card->mpa_tx.buf);
2607 kfree(card->mpa_rx.buf);
2608 }
2609
2610
2611
2612
2613 static void
2614 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
2615 {
2616 struct sdio_mmc_card *card = adapter->card;
2617 const struct mwifiex_sdio_card_reg *reg = card->reg;
2618 int i;
2619
2620 card->mp_end_port = port;
2621
2622 card->mp_data_port_mask = reg->data_port_mask;
2623
2624 if (reg->start_wr_port) {
2625 for (i = 1; i <= card->max_ports - card->mp_end_port; i++)
2626 card->mp_data_port_mask &=
2627 ~(1 << (card->max_ports - i));
2628 }
2629
2630 card->curr_wr_port = reg->start_wr_port;
2631
2632 mwifiex_dbg(adapter, CMD,
2633 "cmd: mp_end_port %d, data port mask 0x%x\n",
2634 port, card->mp_data_port_mask);
2635 }
2636
2637 static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter)
2638 {
2639 struct sdio_mmc_card *card = adapter->card;
2640 struct sdio_func *func = card->func;
2641 int ret;
2642
2643
2644 mwifiex_shutdown_sw(adapter);
2645 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
2646 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
2647
2648
2649 sdio_claim_host(func);
2650 ret = mmc_hw_reset(func->card);
2651 sdio_release_host(func);
2652
2653 switch (ret) {
2654 case 1:
2655 dev_dbg(&func->dev, "SDIO HW reset asynchronous\n");
2656 complete_all(adapter->fw_done);
2657 break;
2658 case 0:
2659 ret = mwifiex_reinit_sw(adapter);
2660 if (ret)
2661 dev_err(&func->dev, "reinit failed: %d\n", ret);
2662 break;
2663 default:
2664 dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret);
2665 break;
2666 }
2667 }
2668
2669
2670 static enum
2671 rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter,
2672 u8 doneflag)
2673 {
2674 struct sdio_mmc_card *card = adapter->card;
2675 int ret, tries;
2676 u8 ctrl_data = 0;
2677
2678 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2679 card->reg->fw_dump_ctrl, &ret);
2680 if (ret) {
2681 mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n");
2682 return RDWR_STATUS_FAILURE;
2683 }
2684 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2685 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl,
2686 &ret);
2687 if (ret) {
2688 mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
2689 return RDWR_STATUS_FAILURE;
2690 }
2691 if (ctrl_data == FW_DUMP_DONE)
2692 break;
2693 if (doneflag && ctrl_data == doneflag)
2694 return RDWR_STATUS_DONE;
2695 if (ctrl_data != card->reg->fw_dump_host_ready) {
2696 mwifiex_dbg(adapter, WARN,
2697 "The ctrl reg was changed, re-try again\n");
2698 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2699 card->reg->fw_dump_ctrl, &ret);
2700 if (ret) {
2701 mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
2702 return RDWR_STATUS_FAILURE;
2703 }
2704 }
2705 usleep_range(100, 200);
2706 }
2707 if (ctrl_data == card->reg->fw_dump_host_ready) {
2708 mwifiex_dbg(adapter, ERROR,
2709 "Fail to pull ctrl_data\n");
2710 return RDWR_STATUS_FAILURE;
2711 }
2712
2713 return RDWR_STATUS_SUCCESS;
2714 }
2715
2716
2717 static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter)
2718 {
2719 struct sdio_mmc_card *card = adapter->card;
2720 int ret = 0;
2721 unsigned int reg, reg_start, reg_end;
2722 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0;
2723 enum rdwr_status stat;
2724 u32 memory_size;
2725
2726 if (!card->can_dump_fw)
2727 return;
2728
2729 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
2730 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2731
2732 if (entry->mem_ptr) {
2733 vfree(entry->mem_ptr);
2734 entry->mem_ptr = NULL;
2735 }
2736 entry->mem_size = 0;
2737 }
2738
2739 mwifiex_pm_wakeup_card(adapter);
2740 sdio_claim_host(card->func);
2741
2742 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2743
2744 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2745 if (stat == RDWR_STATUS_FAILURE)
2746 goto done;
2747
2748 reg = card->reg->fw_dump_start;
2749
2750 dump_num = sdio_readb(card->func, reg, &ret);
2751 if (ret) {
2752 mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n");
2753 goto done;
2754 }
2755
2756
2757 for (idx = 0; idx < dump_num; idx++) {
2758 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2759
2760 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2761 if (stat == RDWR_STATUS_FAILURE)
2762 goto done;
2763
2764 memory_size = 0;
2765 reg = card->reg->fw_dump_start;
2766 for (i = 0; i < 4; i++) {
2767 read_reg = sdio_readb(card->func, reg, &ret);
2768 if (ret) {
2769 mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
2770 goto done;
2771 }
2772 memory_size |= (read_reg << i*8);
2773 reg++;
2774 }
2775
2776 if (memory_size == 0) {
2777 mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n");
2778 ret = mwifiex_write_reg(adapter,
2779 card->reg->fw_dump_ctrl,
2780 FW_DUMP_READ_DONE);
2781 if (ret) {
2782 mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
2783 return;
2784 }
2785 break;
2786 }
2787
2788 mwifiex_dbg(adapter, DUMP,
2789 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2790 entry->mem_ptr = vmalloc(memory_size + 1);
2791 entry->mem_size = memory_size;
2792 if (!entry->mem_ptr) {
2793 mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n",
2794 entry->mem_name);
2795 goto done;
2796 }
2797 dbg_ptr = entry->mem_ptr;
2798 end_ptr = dbg_ptr + memory_size;
2799
2800 doneflag = entry->done_flag;
2801 mwifiex_dbg(adapter, DUMP,
2802 "Start %s output, please wait...\n",
2803 entry->mem_name);
2804
2805 do {
2806 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2807 if (stat == RDWR_STATUS_FAILURE)
2808 goto done;
2809
2810 reg_start = card->reg->fw_dump_start;
2811 reg_end = card->reg->fw_dump_end;
2812 for (reg = reg_start; reg <= reg_end; reg++) {
2813 *dbg_ptr = sdio_readb(card->func, reg, &ret);
2814 if (ret) {
2815 mwifiex_dbg(adapter, ERROR,
2816 "SDIO read err\n");
2817 goto done;
2818 }
2819 if (dbg_ptr < end_ptr)
2820 dbg_ptr++;
2821 else
2822 mwifiex_dbg(adapter, ERROR,
2823 "Allocated buf not enough\n");
2824 }
2825
2826 if (stat != RDWR_STATUS_DONE)
2827 continue;
2828
2829 mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n",
2830 entry->mem_name, dbg_ptr - entry->mem_ptr);
2831 break;
2832 } while (1);
2833 }
2834 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2835
2836 done:
2837 sdio_release_host(card->func);
2838 }
2839
2840 static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter)
2841 {
2842 struct sdio_mmc_card *card = adapter->card;
2843 struct memory_type_mapping *entry = &generic_mem_type_map[0];
2844 unsigned int reg, reg_start, reg_end;
2845 u8 start_flag = 0, done_flag = 0;
2846 u8 *dbg_ptr, *end_ptr;
2847 enum rdwr_status stat;
2848 int ret = -1, tries;
2849
2850 if (!card->fw_dump_enh)
2851 return;
2852
2853 if (entry->mem_ptr) {
2854 vfree(entry->mem_ptr);
2855 entry->mem_ptr = NULL;
2856 }
2857 entry->mem_size = 0;
2858
2859 mwifiex_pm_wakeup_card(adapter);
2860 sdio_claim_host(card->func);
2861
2862 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2863
2864 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
2865 if (stat == RDWR_STATUS_FAILURE)
2866 goto done;
2867
2868 reg_start = card->reg->fw_dump_start;
2869 reg_end = card->reg->fw_dump_end;
2870 for (reg = reg_start; reg <= reg_end; reg++) {
2871 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2872 start_flag = sdio_readb(card->func, reg, &ret);
2873 if (ret) {
2874 mwifiex_dbg(adapter, ERROR,
2875 "SDIO read err\n");
2876 goto done;
2877 }
2878 if (start_flag == 0)
2879 break;
2880 if (tries == MAX_POLL_TRIES) {
2881 mwifiex_dbg(adapter, ERROR,
2882 "FW not ready to dump\n");
2883 ret = -1;
2884 goto done;
2885 }
2886 }
2887 usleep_range(100, 200);
2888 }
2889
2890 entry->mem_ptr = vmalloc(0xf0000 + 1);
2891 if (!entry->mem_ptr) {
2892 ret = -1;
2893 goto done;
2894 }
2895 dbg_ptr = entry->mem_ptr;
2896 entry->mem_size = 0xf0000;
2897 end_ptr = dbg_ptr + entry->mem_size;
2898
2899 done_flag = entry->done_flag;
2900 mwifiex_dbg(adapter, DUMP,
2901 "Start %s output, please wait...\n", entry->mem_name);
2902
2903 while (true) {
2904 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
2905 if (stat == RDWR_STATUS_FAILURE)
2906 goto done;
2907 for (reg = reg_start; reg <= reg_end; reg++) {
2908 *dbg_ptr = sdio_readb(card->func, reg, &ret);
2909 if (ret) {
2910 mwifiex_dbg(adapter, ERROR,
2911 "SDIO read err\n");
2912 goto done;
2913 }
2914 dbg_ptr++;
2915 if (dbg_ptr >= end_ptr) {
2916 u8 *tmp_ptr;
2917
2918 tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1);
2919 if (!tmp_ptr)
2920 goto done;
2921
2922 memcpy(tmp_ptr, entry->mem_ptr,
2923 entry->mem_size);
2924 vfree(entry->mem_ptr);
2925 entry->mem_ptr = tmp_ptr;
2926 tmp_ptr = NULL;
2927 dbg_ptr = entry->mem_ptr + entry->mem_size;
2928 entry->mem_size += 0x4000;
2929 end_ptr = entry->mem_ptr + entry->mem_size;
2930 }
2931 }
2932 if (stat == RDWR_STATUS_DONE) {
2933 entry->mem_size = dbg_ptr - entry->mem_ptr;
2934 mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n",
2935 entry->mem_name, entry->mem_size);
2936 ret = 0;
2937 break;
2938 }
2939 }
2940 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2941
2942 done:
2943 if (ret) {
2944 mwifiex_dbg(adapter, ERROR, "firmware dump failed\n");
2945 if (entry->mem_ptr) {
2946 vfree(entry->mem_ptr);
2947 entry->mem_ptr = NULL;
2948 }
2949 entry->mem_size = 0;
2950 }
2951 sdio_release_host(card->func);
2952 }
2953
2954 static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter)
2955 {
2956 struct sdio_mmc_card *card = adapter->card;
2957
2958 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2959 if (!adapter->devdump_data) {
2960 mwifiex_dbg(adapter, ERROR,
2961 "vzalloc devdump data failure!\n");
2962 return;
2963 }
2964
2965 mwifiex_drv_info_dump(adapter);
2966 if (card->fw_dump_enh)
2967 mwifiex_sdio_generic_fw_dump(adapter);
2968 else
2969 mwifiex_sdio_fw_dump(adapter);
2970 mwifiex_prepare_fw_dump_info(adapter);
2971 mwifiex_upload_device_dump(adapter);
2972 }
2973
2974 static void mwifiex_sdio_work(struct work_struct *work)
2975 {
2976 struct sdio_mmc_card *card =
2977 container_of(work, struct sdio_mmc_card, work);
2978
2979 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2980 &card->work_flags))
2981 mwifiex_sdio_device_dump_work(card->adapter);
2982 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2983 &card->work_flags))
2984 mwifiex_sdio_card_reset_work(card->adapter);
2985 }
2986
2987
2988 static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter)
2989 {
2990 struct sdio_mmc_card *card = adapter->card;
2991
2992 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2993 schedule_work(&card->work);
2994 }
2995
2996
2997 static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter)
2998 {
2999 struct sdio_mmc_card *card = adapter->card;
3000
3001 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
3002 &card->work_flags))
3003 schedule_work(&card->work);
3004 }
3005
3006
3007
3008
3009 static int
3010 mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
3011 {
3012 char *p = drv_buf;
3013 struct sdio_mmc_card *cardp = adapter->card;
3014 int ret = 0;
3015 u8 count, func, data, index = 0, size = 0;
3016 u8 reg, reg_start, reg_end;
3017 char buf[256], *ptr;
3018
3019 if (!p)
3020 return 0;
3021
3022 mwifiex_dbg(adapter, MSG, "SDIO register dump start\n");
3023
3024 mwifiex_pm_wakeup_card(adapter);
3025
3026 sdio_claim_host(cardp->func);
3027
3028 for (count = 0; count < 5; count++) {
3029 memset(buf, 0, sizeof(buf));
3030 ptr = buf;
3031
3032 switch (count) {
3033 case 0:
3034
3035 func = count;
3036 reg_start = 0;
3037 reg_end = 9;
3038 break;
3039 case 1:
3040
3041 func = count;
3042 reg_start = cardp->reg->func1_dump_reg_start;
3043 reg_end = cardp->reg->func1_dump_reg_end;
3044 break;
3045 case 2:
3046 index = 0;
3047 func = 1;
3048 reg_start = cardp->reg->func1_spec_reg_table[index++];
3049 size = cardp->reg->func1_spec_reg_num;
3050 reg_end = cardp->reg->func1_spec_reg_table[size-1];
3051 break;
3052 default:
3053
3054 if (count == 4)
3055 mdelay(100);
3056 func = 1;
3057 reg_start = cardp->reg->func1_scratch_reg;
3058 reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE;
3059 }
3060
3061 if (count != 2)
3062 ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ",
3063 func, reg_start, reg_end);
3064 else
3065 ptr += sprintf(ptr, "SDIO Func%d: ", func);
3066
3067 for (reg = reg_start; reg <= reg_end;) {
3068 if (func == 0)
3069 data = sdio_f0_readb(cardp->func, reg, &ret);
3070 else
3071 data = sdio_readb(cardp->func, reg, &ret);
3072
3073 if (count == 2)
3074 ptr += sprintf(ptr, "(%#x) ", reg);
3075 if (!ret) {
3076 ptr += sprintf(ptr, "%02x ", data);
3077 } else {
3078 ptr += sprintf(ptr, "ERR");
3079 break;
3080 }
3081
3082 if (count == 2 && reg < reg_end)
3083 reg = cardp->reg->func1_spec_reg_table[index++];
3084 else
3085 reg++;
3086 }
3087
3088 mwifiex_dbg(adapter, MSG, "%s\n", buf);
3089 p += sprintf(p, "%s\n", buf);
3090 }
3091
3092 sdio_release_host(cardp->func);
3093
3094 mwifiex_dbg(adapter, MSG, "SDIO register dump end\n");
3095
3096 return p - drv_buf;
3097 }
3098
3099
3100
3101
3102 static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter)
3103 {
3104 struct sdio_mmc_card *card = adapter->card;
3105 u8 sdio_ireg;
3106
3107 sdio_claim_host(card->func);
3108 sdio_enable_func(card->func);
3109 sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
3110 sdio_release_host(card->func);
3111
3112
3113
3114
3115 adapter->tx_buf_size = card->tx_buf_size;
3116
3117
3118
3119
3120
3121 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
3122
3123 mwifiex_init_sdio_ioport(adapter);
3124 }
3125
3126 static struct mwifiex_if_ops sdio_ops = {
3127 .init_if = mwifiex_init_sdio,
3128 .cleanup_if = mwifiex_cleanup_sdio,
3129 .check_fw_status = mwifiex_check_fw_status,
3130 .check_winner_status = mwifiex_check_winner_status,
3131 .prog_fw = mwifiex_prog_fw_w_helper,
3132 .register_dev = mwifiex_register_dev,
3133 .unregister_dev = mwifiex_unregister_dev,
3134 .enable_int = mwifiex_sdio_enable_host_int,
3135 .disable_int = mwifiex_sdio_disable_host_int,
3136 .process_int_status = mwifiex_process_int_status,
3137 .host_to_card = mwifiex_sdio_host_to_card,
3138 .wakeup = mwifiex_pm_wakeup_card,
3139 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3140
3141
3142 .update_mp_end_port = mwifiex_update_mp_end_port,
3143 .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf,
3144 .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete,
3145 .event_complete = mwifiex_sdio_event_complete,
3146 .dnld_fw = mwifiex_sdio_dnld_fw,
3147 .card_reset = mwifiex_sdio_card_reset,
3148 .reg_dump = mwifiex_sdio_reg_dump,
3149 .device_dump = mwifiex_sdio_device_dump,
3150 .deaggr_pkt = mwifiex_deaggr_sdio_pkt,
3151 .up_dev = mwifiex_sdio_up_dev,
3152 };
3153
3154 module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver);
3155
3156 MODULE_AUTHOR("Marvell International Ltd.");
3157 MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION);
3158 MODULE_VERSION(SDIO_VERSION);
3159 MODULE_LICENSE("GPL v2");
3160 MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME);
3161 MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);
3162 MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);
3163 MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME);
3164 MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME);
3165 MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME);
3166 MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME);
3167 MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME);
3168 MODULE_FIRMWARE(SD8997_SDIOUART_FW_NAME);