intersil/p54/p54pci.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 #ifndef P54PCI_H
0003 #define P54PCI_H
0004 #include <linux/interrupt.h>
0005
0006 /*
0007  * Defines for PCI based mac80211 Prism54 driver
0008  *
0009  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
0010  *
0011  * Based on the islsm (softmac prism54) driver, which is:
0012  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
0013  */
0014
0015 /* Device Interrupt register bits */
0016 #define ISL38XX_DEV_INT_RESET                   0x0001
0017 #define ISL38XX_DEV_INT_UPDATE                  0x0002
0018 #define ISL38XX_DEV_INT_WAKEUP                  0x0008
0019 #define ISL38XX_DEV_INT_SLEEP                   0x0010
0020 #define ISL38XX_DEV_INT_ABORT                   0x0020
0021 /* these two only used in USB */
0022 #define ISL38XX_DEV_INT_DATA                    0x0040
0023 #define ISL38XX_DEV_INT_MGMT                    0x0080
0024
0025 #define ISL38XX_DEV_INT_PCIUART_CTS             0x4000
0026 #define ISL38XX_DEV_INT_PCIUART_DR              0x8000
0027
0028 /* Interrupt Identification/Acknowledge/Enable register bits */
0029 #define ISL38XX_INT_IDENT_UPDATE        0x0002
0030 #define ISL38XX_INT_IDENT_INIT          0x0004
0031 #define ISL38XX_INT_IDENT_WAKEUP        0x0008
0032 #define ISL38XX_INT_IDENT_SLEEP         0x0010
0033 #define ISL38XX_INT_IDENT_PCIUART_CTS       0x4000
0034 #define ISL38XX_INT_IDENT_PCIUART_DR        0x8000
0035
0036 /* Control/Status register bits */
0037 #define ISL38XX_CTRL_STAT_SLEEPMODE     0x00000200
0038 #define ISL38XX_CTRL_STAT_CLKRUN        0x00800000
0039 #define ISL38XX_CTRL_STAT_RESET         0x10000000
0040 #define ISL38XX_CTRL_STAT_RAMBOOT       0x20000000
0041 #define ISL38XX_CTRL_STAT_STARTHALTED       0x40000000
0042 #define ISL38XX_CTRL_STAT_HOST_OVERRIDE     0x80000000
0043
0044 struct p54p_csr {
0045     __le32 dev_int;
0046     u8 unused_1[12];
0047     __le32 int_ident;
0048     __le32 int_ack;
0049     __le32 int_enable;
0050     u8 unused_2[4];
0051     union {
0052         __le32 ring_control_base;
0053         __le32 gen_purp_com[2];
0054     };
0055     u8 unused_3[8];
0056     __le32 direct_mem_base;
0057     u8 unused_4[44];
0058     __le32 dma_addr;
0059     __le32 dma_len;
0060     __le32 dma_ctrl;
0061     u8 unused_5[12];
0062     __le32 ctrl_stat;
0063     u8 unused_6[1924];
0064     u8 cardbus_cis[0x800];
0065     u8 direct_mem_win[0x1000];
0066 } __packed;
0067
0068 /* usb backend only needs the register defines above */
0069 #ifndef P54USB_H
0070 struct p54p_desc {
0071     __le32 host_addr;
0072     __le32 device_addr;
0073     __le16 len;
0074     __le16 flags;
0075 } __packed;
0076
0077 struct p54p_ring_control {
0078     __le32 host_idx[4];
0079     __le32 device_idx[4];
0080     struct p54p_desc rx_data[8];
0081     struct p54p_desc tx_data[32];
0082     struct p54p_desc rx_mgmt[4];
0083     struct p54p_desc tx_mgmt[4];
0084 } __packed;
0085
0086 #define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r)
0087 #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r)
0088
0089 struct p54p_priv {
0090     struct p54_common common;
0091     struct pci_dev *pdev;
0092     struct p54p_csr __iomem *map;
0093     struct tasklet_struct tasklet;
0094     const struct firmware *firmware;
0095     spinlock_t lock;
0096     struct p54p_ring_control *ring_control;
0097     dma_addr_t ring_control_dma;
0098     u32 rx_idx_data, tx_idx_data;
0099     u32 rx_idx_mgmt, tx_idx_mgmt;
0100     struct sk_buff *rx_buf_data[8];
0101     struct sk_buff *rx_buf_mgmt[4];
0102     struct sk_buff *tx_buf_data[32];
0103     struct sk_buff *tx_buf_mgmt[4];
0104     struct completion boot_comp;
0105     struct completion fw_loaded;
0106 };
0107
0108 #endif /* P54USB_H */
0109 #endif /* P54PCI_H */