intersil/p54/lmac.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * LMAC Interface specific definitions for mac80211 Prism54 drivers
0004  *
0005  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
0006  * Copyright (c) 2007 - 2009, Christian Lamparter <chunkeey@web.de>
0007  *
0008  * Based on:
0009  * - the islsm (softmac prism54) driver, which is:
0010  *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
0011  *
0012  * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
0013  *   Copyright (C) 2007 Conexant Systems, Inc.
0014  */
0015
0016 #ifndef LMAC_H
0017 #define LMAC_H
0018
0019 enum p54_control_frame_types {
0020     P54_CONTROL_TYPE_SETUP = 0,
0021     P54_CONTROL_TYPE_SCAN,
0022     P54_CONTROL_TYPE_TRAP,
0023     P54_CONTROL_TYPE_DCFINIT,
0024     P54_CONTROL_TYPE_RX_KEYCACHE,
0025     P54_CONTROL_TYPE_TIM,
0026     P54_CONTROL_TYPE_PSM,
0027     P54_CONTROL_TYPE_TXCANCEL,
0028     P54_CONTROL_TYPE_TXDONE,
0029     P54_CONTROL_TYPE_BURST,
0030     P54_CONTROL_TYPE_STAT_READBACK,
0031     P54_CONTROL_TYPE_BBP,
0032     P54_CONTROL_TYPE_EEPROM_READBACK,
0033     P54_CONTROL_TYPE_LED,
0034     P54_CONTROL_TYPE_GPIO,
0035     P54_CONTROL_TYPE_TIMER,
0036     P54_CONTROL_TYPE_MODULATION,
0037     P54_CONTROL_TYPE_SYNTH_CONFIG,
0038     P54_CONTROL_TYPE_DETECTOR_VALUE,
0039     P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
0040     P54_CONTROL_TYPE_CCE_QUIET,
0041     P54_CONTROL_TYPE_PSM_STA_UNLOCK,
0042     P54_CONTROL_TYPE_PCS,
0043     P54_CONTROL_TYPE_BT_BALANCER = 28,
0044     P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30,
0045     P54_CONTROL_TYPE_ARPTABLE = 31,
0046     P54_CONTROL_TYPE_BT_OPTIONS = 35,
0047 };
0048
0049 #define P54_HDR_FLAG_CONTROL        BIT(15)
0050 #define P54_HDR_FLAG_CONTROL_OPSET  (BIT(15) + BIT(0))
0051 #define P54_HDR_FLAG_DATA_ALIGN     BIT(14)
0052
0053 #define P54_HDR_FLAG_DATA_OUT_PROMISC       BIT(0)
0054 #define P54_HDR_FLAG_DATA_OUT_TIMESTAMP     BIT(1)
0055 #define P54_HDR_FLAG_DATA_OUT_SEQNR     BIT(2)
0056 #define P54_HDR_FLAG_DATA_OUT_BIT3      BIT(3)
0057 #define P54_HDR_FLAG_DATA_OUT_BURST     BIT(4)
0058 #define P54_HDR_FLAG_DATA_OUT_NOCANCEL      BIT(5)
0059 #define P54_HDR_FLAG_DATA_OUT_CLEARTIM      BIT(6)
0060 #define P54_HDR_FLAG_DATA_OUT_HITCHHIKE     BIT(7)
0061 #define P54_HDR_FLAG_DATA_OUT_COMPRESS      BIT(8)
0062 #define P54_HDR_FLAG_DATA_OUT_CONCAT        BIT(9)
0063 #define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT    BIT(10)
0064 #define P54_HDR_FLAG_DATA_OUT_WAITEOSP      BIT(11)
0065
0066 #define P54_HDR_FLAG_DATA_IN_FCS_GOOD       BIT(0)
0067 #define P54_HDR_FLAG_DATA_IN_MATCH_MAC      BIT(1)
0068 #define P54_HDR_FLAG_DATA_IN_MCBC       BIT(2)
0069 #define P54_HDR_FLAG_DATA_IN_BEACON     BIT(3)
0070 #define P54_HDR_FLAG_DATA_IN_MATCH_BSS      BIT(4)
0071 #define P54_HDR_FLAG_DATA_IN_BCAST_BSS      BIT(5)
0072 #define P54_HDR_FLAG_DATA_IN_DATA       BIT(6)
0073 #define P54_HDR_FLAG_DATA_IN_TRUNCATED      BIT(7)
0074 #define P54_HDR_FLAG_DATA_IN_BIT8       BIT(8)
0075 #define P54_HDR_FLAG_DATA_IN_TRANSPARENT    BIT(9)
0076
0077 struct p54_hdr {
0078     __le16 flags;
0079     __le16 len;
0080     __le32 req_id;
0081     __le16 type;    /* enum p54_control_frame_types */
0082     u8 rts_tries;
0083     u8 tries;
0084     u8 data[];
0085 } __packed;
0086
0087 #define GET_REQ_ID(skb)                         \
0088     (((struct p54_hdr *) ((struct sk_buff *) skb)->data)->req_id)   \
0089
0090 #define FREE_AFTER_TX(skb)                      \
0091     ((((struct p54_hdr *) ((struct sk_buff *) skb)->data)->     \
0092     flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET))
0093
0094 #define IS_DATA_FRAME(skb)                      \
0095     (!((((struct p54_hdr *) ((struct sk_buff *) skb)->data)->   \
0096     flags) & cpu_to_le16(P54_HDR_FLAG_CONTROL)))
0097
0098 #define GET_HW_QUEUE(skb)                       \
0099     (((struct p54_tx_data *)((struct p54_hdr *)         \
0100     skb->data)->data)->hw_queue)
0101
0102 /*
0103  * shared interface ID definitions
0104  * The interface ID is a unique identification of a specific interface.
0105  * The following values are reserved: 0x0000, 0x0002, 0x0012, 0x0014, 0x0015
0106  */
0107 #define IF_ID_ISL36356A         0x0001  /* ISL36356A <-> Firmware */
0108 #define IF_ID_MVC           0x0003  /* MAC Virtual Coprocessor */
0109 #define IF_ID_DEBUG         0x0008  /* PolDebug Interface */
0110 #define IF_ID_PRODUCT           0x0009
0111 #define IF_ID_OEM           0x000a
0112 #define IF_ID_PCI3877           0x000b  /* 3877 <-> Host PCI */
0113 #define IF_ID_ISL37704C         0x000c  /* ISL37704C <-> Fw */
0114 #define IF_ID_ISL39000          0x000f  /* ISL39000 <-> Fw */
0115 #define IF_ID_ISL39300A         0x0010  /* ISL39300A <-> Fw */
0116 #define IF_ID_ISL37700_UAP      0x0016  /* ISL37700 uAP Fw <-> Fw */
0117 #define IF_ID_ISL39000_UAP      0x0017  /* ISL39000 uAP Fw <-> Fw */
0118 #define IF_ID_LMAC          0x001a  /* Interface exposed by LMAC */
0119
0120 struct exp_if {
0121     __le16 role;
0122     __le16 if_id;
0123     __le16 variant;
0124     __le16 btm_compat;
0125     __le16 top_compat;
0126 } __packed;
0127
0128 struct dep_if {
0129     __le16 role;
0130     __le16 if_id;
0131     __le16 variant;
0132 } __packed;
0133
0134 /* driver <-> lmac definitions */
0135 struct p54_eeprom_lm86 {
0136     union {
0137         struct {
0138             __le16 offset;
0139             __le16 len;
0140             u8 data[0];
0141         } __packed v1;
0142         struct {
0143             __le32 offset;
0144             __le16 len;
0145             u8 magic2;
0146             u8 pad;
0147             u8 magic[4];
0148             u8 data[0];
0149         } __packed v2;
0150     }  __packed;
0151 } __packed;
0152
0153 enum p54_rx_decrypt_status {
0154     P54_DECRYPT_NONE = 0,
0155     P54_DECRYPT_OK,
0156     P54_DECRYPT_NOKEY,
0157     P54_DECRYPT_NOMICHAEL,
0158     P54_DECRYPT_NOCKIPMIC,
0159     P54_DECRYPT_FAIL_WEP,
0160     P54_DECRYPT_FAIL_TKIP,
0161     P54_DECRYPT_FAIL_MICHAEL,
0162     P54_DECRYPT_FAIL_CKIPKP,
0163     P54_DECRYPT_FAIL_CKIPMIC,
0164     P54_DECRYPT_FAIL_AESCCMP
0165 };
0166
0167 struct p54_rx_data {
0168     __le16 flags;
0169     __le16 len;
0170     __le16 freq;
0171     u8 antenna;
0172     u8 rate;
0173     u8 rssi;
0174     u8 quality;
0175     u8 decrypt_status;
0176     u8 rssi_raw;
0177     __le32 tsf32;
0178     __le32 unalloc0;
0179     u8 align[];
0180 } __packed;
0181
0182 enum p54_trap_type {
0183     P54_TRAP_SCAN = 0,
0184     P54_TRAP_TIMER,
0185     P54_TRAP_BEACON_TX,
0186     P54_TRAP_FAA_RADIO_ON,
0187     P54_TRAP_FAA_RADIO_OFF,
0188     P54_TRAP_RADAR,
0189     P54_TRAP_NO_BEACON,
0190     P54_TRAP_TBTT,
0191     P54_TRAP_SCO_ENTER,
0192     P54_TRAP_SCO_EXIT
0193 };
0194
0195 struct p54_trap {
0196     __le16 event;
0197     __le16 frequency;
0198 } __packed;
0199
0200 enum p54_frame_sent_status {
0201     P54_TX_OK = 0,
0202     P54_TX_FAILED,
0203     P54_TX_PSM,
0204     P54_TX_PSM_CANCELLED = 4
0205 };
0206
0207 struct p54_frame_sent {
0208     u8 status;
0209     u8 tries;
0210     u8 ack_rssi;
0211     u8 quality;
0212     __le16 seq;
0213     u8 antenna;
0214     u8 padding;
0215 } __packed;
0216
0217 enum p54_tx_data_crypt {
0218     P54_CRYPTO_NONE = 0,
0219     P54_CRYPTO_WEP,
0220     P54_CRYPTO_TKIP,
0221     P54_CRYPTO_TKIPMICHAEL,
0222     P54_CRYPTO_CCX_WEPMIC,
0223     P54_CRYPTO_CCX_KPMIC,
0224     P54_CRYPTO_CCX_KP,
0225     P54_CRYPTO_AESCCMP
0226 };
0227
0228 enum p54_tx_data_queue {
0229     P54_QUEUE_BEACON    = 0,
0230     P54_QUEUE_FWSCAN    = 1,
0231     P54_QUEUE_MGMT      = 2,
0232     P54_QUEUE_CAB       = 3,
0233     P54_QUEUE_DATA      = 4,
0234
0235     P54_QUEUE_AC_NUM    = 4,
0236     P54_QUEUE_AC_VO     = 4,
0237     P54_QUEUE_AC_VI     = 5,
0238     P54_QUEUE_AC_BE     = 6,
0239     P54_QUEUE_AC_BK     = 7,
0240
0241     /* keep last */
0242     P54_QUEUE_NUM       = 8,
0243 };
0244
0245 #define IS_QOS_QUEUE(n) (n >= P54_QUEUE_DATA)
0246
0247 struct p54_tx_data {
0248     u8 rateset[8];
0249     u8 rts_rate_idx;
0250     u8 crypt_offset;
0251     u8 key_type;
0252     u8 key_len;
0253     u8 key[16];
0254     u8 hw_queue;
0255     u8 backlog;
0256     __le16 durations[4];
0257     u8 tx_antenna;
0258     union {
0259         struct {
0260             u8 cts_rate;
0261             __le16 output_power;
0262         } __packed longbow;
0263         struct {
0264             u8 output_power;
0265             u8 cts_rate;
0266             u8 unalloc;
0267         } __packed normal;
0268     } __packed;
0269     u8 unalloc2[2];
0270     u8 align[];
0271 } __packed;
0272
0273 /* unit is ms */
0274 #define P54_TX_FRAME_LIFETIME 2000
0275 #define P54_TX_TIMEOUT 4000
0276 #define P54_STATISTICS_UPDATE 5000
0277
0278 #define P54_FILTER_TYPE_NONE        0
0279 #define P54_FILTER_TYPE_STATION     BIT(0)
0280 #define P54_FILTER_TYPE_IBSS        BIT(1)
0281 #define P54_FILTER_TYPE_AP      BIT(2)
0282 #define P54_FILTER_TYPE_TRANSPARENT BIT(3)
0283 #define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
0284 #define P54_FILTER_TYPE_HIBERNATE   BIT(5)
0285 #define P54_FILTER_TYPE_NOACK       BIT(6)
0286 #define P54_FILTER_TYPE_RX_DISABLED BIT(7)
0287
0288 struct p54_setup_mac {
0289     __le16 mac_mode;
0290     u8 mac_addr[ETH_ALEN];
0291     u8 bssid[ETH_ALEN];
0292     u8 rx_antenna;
0293     u8 rx_align;
0294     union {
0295         struct {
0296             __le32 basic_rate_mask;
0297             u8 rts_rates[8];
0298             __le32 rx_addr;
0299             __le16 max_rx;
0300             __le16 rxhw;
0301             __le16 wakeup_timer;
0302             __le16 unalloc0;
0303         } __packed v1;
0304         struct {
0305             __le32 rx_addr;
0306             __le16 max_rx;
0307             __le16 rxhw;
0308             __le16 timer;
0309             __le16 truncate;
0310             __le32 basic_rate_mask;
0311             u8 sbss_offset;
0312             u8 mcast_window;
0313             u8 rx_rssi_threshold;
0314             u8 rx_ed_threshold;
0315             __le32 ref_clock;
0316             __le16 lpf_bandwidth;
0317             __le16 osc_start_delay;
0318         } __packed v2;
0319     } __packed;
0320 } __packed;
0321
0322 #define P54_SETUP_V1_LEN 40
0323 #define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
0324
0325 #define P54_SCAN_EXIT   BIT(0)
0326 #define P54_SCAN_TRAP   BIT(1)
0327 #define P54_SCAN_ACTIVE BIT(2)
0328 #define P54_SCAN_FILTER BIT(3)
0329
0330 struct p54_scan_head {
0331     __le16 mode;
0332     __le16 dwell;
0333     u8 scan_params[20];
0334     __le16 freq;
0335 } __packed;
0336
0337 struct p54_pa_curve_data_sample {
0338     u8 rf_power;
0339     u8 pa_detector;
0340     u8 data_barker;
0341     u8 data_bpsk;
0342     u8 data_qpsk;
0343     u8 data_16qam;
0344     u8 data_64qam;
0345     u8 padding;
0346 } __packed;
0347
0348 struct p54_scan_body {
0349     u8 pa_points_per_curve;
0350     u8 val_barker;
0351     u8 val_bpsk;
0352     u8 val_qpsk;
0353     u8 val_16qam;
0354     u8 val_64qam;
0355     struct p54_pa_curve_data_sample curve_data[8];
0356     u8 dup_bpsk;
0357     u8 dup_qpsk;
0358     u8 dup_16qam;
0359     u8 dup_64qam;
0360 } __packed;
0361
0362 /*
0363  * Warning: Longbow's structures are bogus.
0364  */
0365 struct p54_channel_output_limit_longbow {
0366     __le16 rf_power_points[12];
0367 } __packed;
0368
0369 struct p54_pa_curve_data_sample_longbow {
0370     __le16 rf_power;
0371     __le16 pa_detector;
0372     struct {
0373         __le16 data[4];
0374     } points[3] __packed;
0375 } __packed;
0376
0377 struct p54_scan_body_longbow {
0378     struct p54_channel_output_limit_longbow power_limits;
0379     struct p54_pa_curve_data_sample_longbow curve_data[8];
0380     __le16 unkn[6];     /* maybe more power_limits or rate_mask */
0381 } __packed;
0382
0383 union p54_scan_body_union {
0384     struct p54_scan_body normal;
0385     struct p54_scan_body_longbow longbow;
0386 } __packed;
0387
0388 struct p54_scan_tail_rate {
0389     __le32 basic_rate_mask;
0390     u8 rts_rates[8];
0391 } __packed;
0392
0393 struct p54_led {
0394     __le16 flags;
0395     __le16 mask[2];
0396     __le16 delay[2];
0397 } __packed;
0398
0399 struct p54_edcf {
0400     u8 flags;
0401     u8 slottime;
0402     u8 sifs;
0403     u8 eofpad;
0404     struct p54_edcf_queue_param queue[8];
0405     u8 mapping[4];
0406     __le16 frameburst;
0407     __le16 round_trip_delay;
0408 } __packed;
0409
0410 struct p54_statistics {
0411     __le32 rx_success;
0412     __le32 rx_bad_fcs;
0413     __le32 rx_abort;
0414     __le32 rx_abort_phy;
0415     __le32 rts_success;
0416     __le32 rts_fail;
0417     __le32 tsf32;
0418     __le32 airtime;
0419     __le32 noise;
0420     __le32 sample_noise[8];
0421     __le32 sample_cca;
0422     __le32 sample_tx;
0423 } __packed;
0424
0425 struct p54_xbow_synth {
0426     __le16 magic1;
0427     __le16 magic2;
0428     __le16 freq;
0429     u32 padding[5];
0430 } __packed;
0431
0432 struct p54_timer {
0433     __le32 interval;
0434 } __packed;
0435
0436 struct p54_keycache {
0437     u8 entry;
0438     u8 key_id;
0439     u8 mac[ETH_ALEN];
0440     u8 padding[2];
0441     u8 key_type;
0442     u8 key_len;
0443     u8 key[24];
0444 } __packed;
0445
0446 struct p54_burst {
0447     u8 flags;
0448     u8 queue;
0449     u8 backlog;
0450     u8 pad;
0451     __le16 durations[32];
0452 } __packed;
0453
0454 struct p54_psm_interval {
0455     __le16 interval;
0456     __le16 periods;
0457 } __packed;
0458
0459 #define P54_PSM_CAM         0
0460 #define P54_PSM             BIT(0)
0461 #define P54_PSM_DTIM            BIT(1)
0462 #define P54_PSM_MCBC            BIT(2)
0463 #define P54_PSM_CHECKSUM        BIT(3)
0464 #define P54_PSM_SKIP_MORE_DATA      BIT(4)
0465 #define P54_PSM_BEACON_TIMEOUT      BIT(5)
0466 #define P54_PSM_HFOSLEEP        BIT(6)
0467 #define P54_PSM_AUTOSWITCH_SLEEP    BIT(7)
0468 #define P54_PSM_LPIT            BIT(8)
0469 #define P54_PSM_BF_UCAST_SKIP       BIT(9)
0470 #define P54_PSM_BF_MCAST_SKIP       BIT(10)
0471
0472 struct p54_psm {
0473     __le16 mode;
0474     __le16 aid;
0475     struct p54_psm_interval intervals[4];
0476     u8 beacon_rssi_skip_max;
0477     u8 rssi_delta_threshold;
0478     u8 nr;
0479     u8 exclude[1];
0480 } __packed;
0481
0482 #define MC_FILTER_ADDRESS_NUM 4
0483
0484 struct p54_group_address_table {
0485     __le16 filter_enable;
0486     __le16 num_address;
0487     u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
0488 } __packed;
0489
0490 struct p54_txcancel {
0491     __le32 req_id;
0492 } __packed;
0493
0494 struct p54_sta_unlock {
0495     u8 addr[ETH_ALEN];
0496     u16 padding;
0497 } __packed;
0498
0499 #define P54_TIM_CLEAR BIT(15)
0500 struct p54_tim {
0501     u8 count;
0502     u8 padding[3];
0503     __le16 entry[8];
0504 } __packed;
0505
0506 struct p54_cce_quiet {
0507     __le32 period;
0508 } __packed;
0509
0510 struct p54_bt_balancer {
0511     __le16 prio_thresh;
0512     __le16 acl_thresh;
0513 } __packed;
0514
0515 struct p54_arp_table {
0516     __le16 filter_enable;
0517     u8 ipv4_addr[4];
0518 } __packed;
0519
0520 /* LED control */
0521 int p54_set_leds(struct p54_common *priv);
0522 int p54_init_leds(struct p54_common *priv);
0523 void p54_unregister_leds(struct p54_common *priv);
0524
0525 /* xmit functions */
0526 void p54_tx_80211(struct ieee80211_hw *dev,
0527           struct ieee80211_tx_control *control,
0528           struct sk_buff *skb);
0529 int p54_tx_cancel(struct p54_common *priv, __le32 req_id);
0530 void p54_tx(struct p54_common *priv, struct sk_buff *skb);
0531
0532 /* synth/phy configuration */
0533 int p54_init_xbow_synth(struct p54_common *priv);
0534 int p54_scan(struct p54_common *priv, u16 mode, u16 dwell);
0535
0536 /* MAC */
0537 int p54_sta_unlock(struct p54_common *priv, u8 *addr);
0538 int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set);
0539 int p54_setup_mac(struct p54_common *priv);
0540 int p54_set_ps(struct p54_common *priv);
0541 int p54_fetch_statistics(struct p54_common *priv);
0542 int p54_set_groupfilter(struct p54_common *priv);
0543
0544 /* e/v DCF setup */
0545 int p54_set_edcf(struct p54_common *priv);
0546
0547 /* cryptographic engine */
0548 int p54_upload_key(struct p54_common *priv, u8 algo, int slot,
0549            u8 idx, u8 len, u8 *addr, u8* key);
0550
0551 /* eeprom */
0552 int p54_download_eeprom(struct p54_common *priv, void *buf,
0553             u16 offset, u16 len);
0554 struct p54_rssi_db_entry *p54_rssi_find(struct p54_common *p, const u16 freq);
0555
0556 /* utility */
0557 u8 *p54_find_ie(struct sk_buff *skb, u8 ie);
0558
0559 #endif /* LMAC_H */