intersil/p54/eeprom.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * eeprom specific definitions for mac80211 Prism54 drivers
0004  *
0005  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
0006  * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
0007  *
0008  * Based on:
0009  * - the islsm (softmac prism54) driver, which is:
0010  *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
0011  *
0012  * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
0013  *   Copyright (C) 2007 Conexant Systems, Inc.
0014  *
0015  * - islmvc driver
0016  *   Copyright (C) 2001 Intersil Americas Inc.
0017  */
0018
0019 #ifndef EEPROM_H
0020 #define EEPROM_H
0021
0022 /* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
0023
0024 struct pda_entry {
0025     __le16 len; /* includes both code and data */
0026     __le16 code;
0027     u8 data[];
0028 } __packed;
0029
0030 struct eeprom_pda_wrap {
0031     __le32 magic;
0032     __le16 pad;
0033     __le16 len;
0034     __le32 arm_opcode;
0035     u8 data[];
0036 } __packed;
0037
0038 struct p54_iq_autocal_entry {
0039     __le16 iq_param[4];
0040 } __packed;
0041
0042 struct pda_iq_autocal_entry {
0043     __le16 freq;
0044     struct p54_iq_autocal_entry params;
0045 } __packed;
0046
0047 struct pda_channel_output_limit {
0048     __le16 freq;
0049     u8 val_bpsk;
0050     u8 val_qpsk;
0051     u8 val_16qam;
0052     u8 val_64qam;
0053     u8 rate_set_mask;
0054     u8 rate_set_size;
0055 } __packed;
0056
0057 struct pda_channel_output_limit_point_longbow {
0058     __le16 val_bpsk;
0059     __le16 val_qpsk;
0060     __le16 val_16qam;
0061     __le16 val_64qam;
0062 } __packed;
0063
0064 struct pda_channel_output_limit_longbow {
0065     __le16 freq;
0066     struct pda_channel_output_limit_point_longbow point[3];
0067 } __packed;
0068
0069 struct pda_pa_curve_data_sample_rev0 {
0070     u8 rf_power;
0071     u8 pa_detector;
0072     u8 pcv;
0073 } __packed;
0074
0075 struct pda_pa_curve_data_sample_rev1 {
0076     u8 rf_power;
0077     u8 pa_detector;
0078     u8 data_barker;
0079     u8 data_bpsk;
0080     u8 data_qpsk;
0081     u8 data_16qam;
0082     u8 data_64qam;
0083 } __packed;
0084
0085 struct pda_pa_curve_data {
0086     u8 cal_method_rev;
0087     u8 channels;
0088     u8 points_per_channel;
0089     u8 padding;
0090     u8 data[];
0091 } __packed;
0092
0093 struct pda_rssi_cal_ext_entry {
0094     __le16 freq;
0095     __le16 mul;
0096     __le16 add;
0097 } __packed;
0098
0099 struct pda_rssi_cal_entry {
0100     __le16 mul;
0101     __le16 add;
0102 } __packed;
0103
0104 struct pda_country {
0105     u8 regdomain;
0106     u8 alpha2[2];
0107     u8 flags;
0108 } __packed;
0109
0110 struct pda_antenna_gain {
0111     struct {
0112         u8 gain_5GHz;   /* 0.25 dBi units */
0113         u8 gain_2GHz;   /* 0.25 dBi units */
0114     } __packed antenna[0];
0115 } __packed;
0116
0117 struct pda_custom_wrapper {
0118     __le16 entries;
0119     __le16 entry_size;
0120     __le16 offset;
0121     __le16 len;
0122     u8 data[];
0123 } __packed;
0124
0125 /*
0126  * this defines the PDR codes used to build PDAs as defined in document
0127  * number 553155. The current implementation mirrors version 1.1 of the
0128  * document and lists only PDRs supported by the ARM platform.
0129  */
0130
0131 /* common and choice range (0x0000 - 0x0fff) */
0132 #define PDR_END                 0x0000
0133 #define PDR_MANUFACTURING_PART_NUMBER       0x0001
0134 #define PDR_PDA_VERSION             0x0002
0135 #define PDR_NIC_SERIAL_NUMBER           0x0003
0136 #define PDR_NIC_RAM_SIZE            0x0005
0137 #define PDR_RFMODEM_SUP_RANGE           0x0006
0138 #define PDR_PRISM_MAC_SUP_RANGE         0x0007
0139 #define PDR_NIC_ID              0x0008
0140
0141 #define PDR_MAC_ADDRESS             0x0101
0142 #define PDR_REGULATORY_DOMAIN_LIST      0x0103 /* obsolete */
0143 #define PDR_ALLOWED_CHAN_SET            0x0104
0144 #define PDR_DEFAULT_CHAN            0x0105
0145 #define PDR_TEMPERATURE_TYPE            0x0107
0146
0147 #define PDR_IFR_SETTING             0x0200
0148 #define PDR_RFR_SETTING             0x0201
0149 #define PDR_3861_BASELINE_REG_SETTINGS      0x0202
0150 #define PDR_3861_SHADOW_REG_SETTINGS        0x0203
0151 #define PDR_3861_IFRF_REG_SETTINGS      0x0204
0152
0153 #define PDR_3861_CHAN_CALIB_SET_POINTS      0x0300
0154 #define PDR_3861_CHAN_CALIB_INTEGRATOR      0x0301
0155
0156 #define PDR_3842_PRISM_II_NIC_CONFIG        0x0400
0157 #define PDR_PRISM_USB_ID            0x0401
0158 #define PDR_PRISM_PCI_ID            0x0402
0159 #define PDR_PRISM_PCI_IF_CONFIG         0x0403
0160 #define PDR_PRISM_PCI_PM_CONFIG         0x0404
0161
0162 #define PDR_3861_MF_TEST_CHAN_SET_POINTS    0x0900
0163 #define PDR_3861_MF_TEST_CHAN_INTEGRATORS   0x0901
0164
0165 /* ARM range (0x1000 - 0x1fff) */
0166 #define PDR_COUNTRY_INFORMATION         0x1000 /* obsolete */
0167 #define PDR_INTERFACE_LIST          0x1001
0168 #define PDR_HARDWARE_PLATFORM_COMPONENT_ID  0x1002
0169 #define PDR_OEM_NAME                0x1003
0170 #define PDR_PRODUCT_NAME            0x1004
0171 #define PDR_UTF8_OEM_NAME           0x1005
0172 #define PDR_UTF8_PRODUCT_NAME           0x1006
0173 #define PDR_COUNTRY_LIST            0x1007
0174 #define PDR_DEFAULT_COUNTRY         0x1008
0175
0176 #define PDR_ANTENNA_GAIN            0x1100
0177
0178 #define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA    0x1901
0179 #define PDR_RSSI_LINEAR_APPROXIMATION       0x1902
0180 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS    0x1903
0181 #define PDR_PRISM_PA_CAL_CURVE_DATA     0x1904
0182 #define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
0183 #define PDR_PRISM_ZIF_TX_IQ_CALIBRATION     0x1906
0184 #define PDR_REGULATORY_POWER_LIMITS     0x1907
0185 #define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED  0x1908
0186 #define PDR_RADIATED_TRANSMISSION_CORRECTION    0x1909
0187 #define PDR_PRISM_TX_IQ_CALIBRATION     0x190a
0188
0189 /* reserved range (0x2000 - 0x7fff) */
0190
0191 /* customer range (0x8000 - 0xffff) */
0192 #define PDR_BASEBAND_REGISTERS              0x8000
0193 #define PDR_PER_CHANNEL_BASEBAND_REGISTERS      0x8001
0194
0195 /* used by our modificated eeprom image */
0196 #define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM        0xDEAD
0197 #define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2      0xCAFF
0198 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
0199 #define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM      0xB05D
0200
0201 /* Interface Definitions */
0202 #define PDR_INTERFACE_ROLE_SERVER   0x0000
0203 #define PDR_INTERFACE_ROLE_CLIENT   0x0001
0204
0205 /* PDR definitions for default country & country list */
0206 #define PDR_COUNTRY_CERT_CODE       0x80
0207 #define PDR_COUNTRY_CERT_CODE_REAL  0x00
0208 #define PDR_COUNTRY_CERT_CODE_PSEUDO    0x80
0209 #define PDR_COUNTRY_CERT_BAND       0x40
0210 #define PDR_COUNTRY_CERT_BAND_2GHZ  0x00
0211 #define PDR_COUNTRY_CERT_BAND_5GHZ  0x40
0212 #define PDR_COUNTRY_CERT_IODOOR     0x30
0213 #define PDR_COUNTRY_CERT_IODOOR_BOTH    0x00
0214 #define PDR_COUNTRY_CERT_IODOOR_INDOOR  0x20
0215 #define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
0216 #define PDR_COUNTRY_CERT_INDEX      0x0f
0217
0218 /* Specific LMAC FW/HW variant definitions */
0219 #define PDR_SYNTH_FRONTEND_MASK     0x0007
0220 #define PDR_SYNTH_FRONTEND_DUETTE3  0x0001
0221 #define PDR_SYNTH_FRONTEND_DUETTE2  0x0002
0222 #define PDR_SYNTH_FRONTEND_FRISBEE  0x0003
0223 #define PDR_SYNTH_FRONTEND_XBOW     0x0004
0224 #define PDR_SYNTH_FRONTEND_LONGBOW  0x0005
0225 #define PDR_SYNTH_IQ_CAL_MASK       0x0018
0226 #define PDR_SYNTH_IQ_CAL_PA_DETECTOR    0x0000
0227 #define PDR_SYNTH_IQ_CAL_DISABLED   0x0008
0228 #define PDR_SYNTH_IQ_CAL_ZIF        0x0010
0229 #define PDR_SYNTH_FAA_SWITCH_MASK   0x0020
0230 #define PDR_SYNTH_FAA_SWITCH_ENABLED    0x0020
0231 #define PDR_SYNTH_24_GHZ_MASK       0x0040
0232 #define PDR_SYNTH_24_GHZ_DISABLED   0x0040
0233 #define PDR_SYNTH_5_GHZ_MASK        0x0080
0234 #define PDR_SYNTH_5_GHZ_DISABLED    0x0080
0235 #define PDR_SYNTH_RX_DIV_MASK       0x0100
0236 #define PDR_SYNTH_RX_DIV_SUPPORTED  0x0100
0237 #define PDR_SYNTH_TX_DIV_MASK       0x0200
0238 #define PDR_SYNTH_TX_DIV_SUPPORTED  0x0200
0239 #define PDR_SYNTH_ASM_MASK      0x0400
0240 #define PDR_SYNTH_ASM_XSWON     0x0400
0241
0242 #endif /* EEPROM_H */