intersil/hostap/hostap_wlan.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef HOSTAP_WLAN_H
0003 #define HOSTAP_WLAN_H
0004
0005 #include <linux/interrupt.h>
0006 #include <linux/wireless.h>
0007 #include <linux/netdevice.h>
0008 #include <linux/etherdevice.h>
0009 #include <linux/mutex.h>
0010 #include <linux/refcount.h>
0011 #include <net/iw_handler.h>
0012 #include <net/ieee80211_radiotap.h>
0013 #include <net/lib80211.h>
0014
0015 #include "hostap_config.h"
0016 #include "hostap_common.h"
0017
0018 #define MAX_PARM_DEVICES 8
0019 #define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
0020 #define DEF_INTS -1, -1, -1, -1, -1, -1, -1
0021 #define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
0022
0023
0024 /* Specific skb->protocol value that indicates that the packet already contains
0025  * txdesc header.
0026  * FIX: This might need own value that would be allocated especially for Prism2
0027  * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
0028  * However, these skb's should have only minimal path in the kernel side since
0029  * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
0030 #define ETH_P_HOSTAP ETH_P_CONTROL
0031
0032 /* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
0033  * (from linux-wlan-ng) */
0034 struct linux_wlan_ng_val {
0035     u32 did;
0036     u16 status, len;
0037     u32 data;
0038 } __packed;
0039
0040 struct linux_wlan_ng_prism_hdr {
0041     u32 msgcode, msglen;
0042     char devname[16];
0043     struct linux_wlan_ng_val hosttime, mactime, channel, rssi, sq, signal,
0044         noise, rate, istx, frmlen;
0045 } __packed;
0046
0047 struct linux_wlan_ng_cap_hdr {
0048     __be32 version;
0049     __be32 length;
0050     __be64 mactime;
0051     __be64 hosttime;
0052     __be32 phytype;
0053     __be32 channel;
0054     __be32 datarate;
0055     __be32 antenna;
0056     __be32 priority;
0057     __be32 ssi_type;
0058     __be32 ssi_signal;
0059     __be32 ssi_noise;
0060     __be32 preamble;
0061     __be32 encoding;
0062 } __packed;
0063
0064 struct hostap_radiotap_rx {
0065     struct ieee80211_radiotap_header hdr;
0066     __le64 tsft;
0067     u8 rate;
0068     u8 padding;
0069     __le16 chan_freq;
0070     __le16 chan_flags;
0071     s8 dbm_antsignal;
0072     s8 dbm_antnoise;
0073 } __packed;
0074
0075 #define LWNG_CAP_DID_BASE   (4 | (1 << 6)) /* section 4, group 1 */
0076 #define LWNG_CAPHDR_VERSION 0x80211001
0077
0078 struct hfa384x_rx_frame {
0079     /* HFA384X RX frame descriptor */
0080     __le16 status; /* HFA384X_RX_STATUS_ flags */
0081     __le32 time; /* timestamp, 1 microsecond resolution */
0082     u8 silence; /* 27 .. 154; seems to be 0 */
0083     u8 signal; /* 27 .. 154 */
0084     u8 rate; /* 10, 20, 55, or 110 */
0085     u8 rxflow;
0086     __le32 reserved;
0087
0088     /* 802.11 */
0089     __le16 frame_control;
0090     __le16 duration_id;
0091     u8 addr1[ETH_ALEN];
0092     u8 addr2[ETH_ALEN];
0093     u8 addr3[ETH_ALEN];
0094     __le16 seq_ctrl;
0095     u8 addr4[ETH_ALEN];
0096     __le16 data_len;
0097
0098     /* 802.3 */
0099     u8 dst_addr[ETH_ALEN];
0100     u8 src_addr[ETH_ALEN];
0101     __be16 len;
0102
0103     /* followed by frame data; max 2304 bytes */
0104 } __packed;
0105
0106
0107 struct hfa384x_tx_frame {
0108     /* HFA384X TX frame descriptor */
0109     __le16 status; /* HFA384X_TX_STATUS_ flags */
0110     __le16 reserved1;
0111     __le16 reserved2;
0112     __le32 sw_support;
0113     u8 retry_count; /* not yet implemented */
0114     u8 tx_rate; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
0115     __le16 tx_control; /* HFA384X_TX_CTRL_ flags */
0116
0117     /* 802.11 */
0118     struct_group(header,
0119         __le16 frame_control; /* parts not used */
0120         __le16 duration_id;
0121         u8 addr1[ETH_ALEN];
0122         u8 addr2[ETH_ALEN]; /* filled by firmware */
0123         u8 addr3[ETH_ALEN];
0124         __le16 seq_ctrl; /* filled by firmware */
0125     );
0126     u8 addr4[ETH_ALEN];
0127     __le16 data_len;
0128
0129     /* 802.3 */
0130     u8 dst_addr[ETH_ALEN];
0131     u8 src_addr[ETH_ALEN];
0132     __be16 len;
0133
0134     /* followed by frame data; max 2304 bytes */
0135 } __packed;
0136
0137
0138 struct hfa384x_rid_hdr
0139 {
0140     __le16 len;
0141     __le16 rid;
0142 } __packed;
0143
0144
0145 /* Macro for converting signal levels (range 27 .. 154) to wireless ext
0146  * dBm value with some accuracy */
0147 #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
0148
0149 #define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
0150
0151 struct hfa384x_scan_request {
0152     __le16 channel_list;
0153     __le16 txrate; /* HFA384X_RATES_* */
0154 } __packed;
0155
0156 struct hfa384x_hostscan_request {
0157     __le16 channel_list;
0158     __le16 txrate;
0159     __le16 target_ssid_len;
0160     u8 target_ssid[32];
0161 } __packed;
0162
0163 struct hfa384x_join_request {
0164     u8 bssid[ETH_ALEN];
0165     __le16 channel;
0166 } __packed;
0167
0168 struct hfa384x_info_frame {
0169     __le16 len;
0170     __le16 type;
0171 } __packed;
0172
0173 struct hfa384x_comm_tallies {
0174     __le16 tx_unicast_frames;
0175     __le16 tx_multicast_frames;
0176     __le16 tx_fragments;
0177     __le16 tx_unicast_octets;
0178     __le16 tx_multicast_octets;
0179     __le16 tx_deferred_transmissions;
0180     __le16 tx_single_retry_frames;
0181     __le16 tx_multiple_retry_frames;
0182     __le16 tx_retry_limit_exceeded;
0183     __le16 tx_discards;
0184     __le16 rx_unicast_frames;
0185     __le16 rx_multicast_frames;
0186     __le16 rx_fragments;
0187     __le16 rx_unicast_octets;
0188     __le16 rx_multicast_octets;
0189     __le16 rx_fcs_errors;
0190     __le16 rx_discards_no_buffer;
0191     __le16 tx_discards_wrong_sa;
0192     __le16 rx_discards_wep_undecryptable;
0193     __le16 rx_message_in_msg_fragments;
0194     __le16 rx_message_in_bad_msg_fragments;
0195 } __packed;
0196
0197 struct hfa384x_comm_tallies32 {
0198     __le32 tx_unicast_frames;
0199     __le32 tx_multicast_frames;
0200     __le32 tx_fragments;
0201     __le32 tx_unicast_octets;
0202     __le32 tx_multicast_octets;
0203     __le32 tx_deferred_transmissions;
0204     __le32 tx_single_retry_frames;
0205     __le32 tx_multiple_retry_frames;
0206     __le32 tx_retry_limit_exceeded;
0207     __le32 tx_discards;
0208     __le32 rx_unicast_frames;
0209     __le32 rx_multicast_frames;
0210     __le32 rx_fragments;
0211     __le32 rx_unicast_octets;
0212     __le32 rx_multicast_octets;
0213     __le32 rx_fcs_errors;
0214     __le32 rx_discards_no_buffer;
0215     __le32 tx_discards_wrong_sa;
0216     __le32 rx_discards_wep_undecryptable;
0217     __le32 rx_message_in_msg_fragments;
0218     __le32 rx_message_in_bad_msg_fragments;
0219 } __packed;
0220
0221 struct hfa384x_scan_result_hdr {
0222     __le16 reserved;
0223     __le16 scan_reason;
0224 #define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
0225 #define HFA384X_SCAN_HOST_INITIATED 1
0226 #define HFA384X_SCAN_FIRMWARE_INITIATED 2
0227 #define HFA384X_SCAN_INQUIRY_FROM_HOST 3
0228 } __packed;
0229
0230 #define HFA384X_SCAN_MAX_RESULTS 32
0231
0232 struct hfa384x_scan_result {
0233     __le16 chid;
0234     __le16 anl;
0235     __le16 sl;
0236     u8 bssid[ETH_ALEN];
0237     __le16 beacon_interval;
0238     __le16 capability;
0239     __le16 ssid_len;
0240     u8 ssid[32];
0241     u8 sup_rates[10];
0242     __le16 rate;
0243 } __packed;
0244
0245 struct hfa384x_hostscan_result {
0246     __le16 chid;
0247     __le16 anl;
0248     __le16 sl;
0249     u8 bssid[ETH_ALEN];
0250     __le16 beacon_interval;
0251     __le16 capability;
0252     __le16 ssid_len;
0253     u8 ssid[32];
0254     u8 sup_rates[10];
0255     __le16 rate;
0256     __le16 atim;
0257 } __packed;
0258
0259 struct comm_tallies_sums {
0260     unsigned int tx_unicast_frames;
0261     unsigned int tx_multicast_frames;
0262     unsigned int tx_fragments;
0263     unsigned int tx_unicast_octets;
0264     unsigned int tx_multicast_octets;
0265     unsigned int tx_deferred_transmissions;
0266     unsigned int tx_single_retry_frames;
0267     unsigned int tx_multiple_retry_frames;
0268     unsigned int tx_retry_limit_exceeded;
0269     unsigned int tx_discards;
0270     unsigned int rx_unicast_frames;
0271     unsigned int rx_multicast_frames;
0272     unsigned int rx_fragments;
0273     unsigned int rx_unicast_octets;
0274     unsigned int rx_multicast_octets;
0275     unsigned int rx_fcs_errors;
0276     unsigned int rx_discards_no_buffer;
0277     unsigned int tx_discards_wrong_sa;
0278     unsigned int rx_discards_wep_undecryptable;
0279     unsigned int rx_message_in_msg_fragments;
0280     unsigned int rx_message_in_bad_msg_fragments;
0281 };
0282
0283
0284 struct hfa384x_regs {
0285     u16 cmd;
0286     u16 evstat;
0287     u16 offset0;
0288     u16 offset1;
0289     u16 swsupport0;
0290 };
0291
0292
0293 #if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
0294 /* I/O ports for HFA384X Controller access */
0295 #define HFA384X_CMD_OFF 0x00
0296 #define HFA384X_PARAM0_OFF 0x02
0297 #define HFA384X_PARAM1_OFF 0x04
0298 #define HFA384X_PARAM2_OFF 0x06
0299 #define HFA384X_STATUS_OFF 0x08
0300 #define HFA384X_RESP0_OFF 0x0A
0301 #define HFA384X_RESP1_OFF 0x0C
0302 #define HFA384X_RESP2_OFF 0x0E
0303 #define HFA384X_INFOFID_OFF 0x10
0304 #define HFA384X_CONTROL_OFF 0x14
0305 #define HFA384X_SELECT0_OFF 0x18
0306 #define HFA384X_SELECT1_OFF 0x1A
0307 #define HFA384X_OFFSET0_OFF 0x1C
0308 #define HFA384X_OFFSET1_OFF 0x1E
0309 #define HFA384X_RXFID_OFF 0x20
0310 #define HFA384X_ALLOCFID_OFF 0x22
0311 #define HFA384X_TXCOMPLFID_OFF 0x24
0312 #define HFA384X_SWSUPPORT0_OFF 0x28
0313 #define HFA384X_SWSUPPORT1_OFF 0x2A
0314 #define HFA384X_SWSUPPORT2_OFF 0x2C
0315 #define HFA384X_EVSTAT_OFF 0x30
0316 #define HFA384X_INTEN_OFF 0x32
0317 #define HFA384X_EVACK_OFF 0x34
0318 #define HFA384X_DATA0_OFF 0x36
0319 #define HFA384X_DATA1_OFF 0x38
0320 #define HFA384X_AUXPAGE_OFF 0x3A
0321 #define HFA384X_AUXOFFSET_OFF 0x3C
0322 #define HFA384X_AUXDATA_OFF 0x3E
0323 #endif /* PRISM2_PCCARD || PRISM2_PLX */
0324
0325 #ifdef PRISM2_PCI
0326 /* Memory addresses for ISL3874 controller access */
0327 #define HFA384X_CMD_OFF 0x00
0328 #define HFA384X_PARAM0_OFF 0x04
0329 #define HFA384X_PARAM1_OFF 0x08
0330 #define HFA384X_PARAM2_OFF 0x0C
0331 #define HFA384X_STATUS_OFF 0x10
0332 #define HFA384X_RESP0_OFF 0x14
0333 #define HFA384X_RESP1_OFF 0x18
0334 #define HFA384X_RESP2_OFF 0x1C
0335 #define HFA384X_INFOFID_OFF 0x20
0336 #define HFA384X_CONTROL_OFF 0x28
0337 #define HFA384X_SELECT0_OFF 0x30
0338 #define HFA384X_SELECT1_OFF 0x34
0339 #define HFA384X_OFFSET0_OFF 0x38
0340 #define HFA384X_OFFSET1_OFF 0x3C
0341 #define HFA384X_RXFID_OFF 0x40
0342 #define HFA384X_ALLOCFID_OFF 0x44
0343 #define HFA384X_TXCOMPLFID_OFF 0x48
0344 #define HFA384X_PCICOR_OFF 0x4C
0345 #define HFA384X_SWSUPPORT0_OFF 0x50
0346 #define HFA384X_SWSUPPORT1_OFF 0x54
0347 #define HFA384X_SWSUPPORT2_OFF 0x58
0348 #define HFA384X_PCIHCR_OFF 0x5C
0349 #define HFA384X_EVSTAT_OFF 0x60
0350 #define HFA384X_INTEN_OFF 0x64
0351 #define HFA384X_EVACK_OFF 0x68
0352 #define HFA384X_DATA0_OFF 0x6C
0353 #define HFA384X_DATA1_OFF 0x70
0354 #define HFA384X_AUXPAGE_OFF 0x74
0355 #define HFA384X_AUXOFFSET_OFF 0x78
0356 #define HFA384X_AUXDATA_OFF 0x7C
0357 #define HFA384X_PCI_M0_ADDRH_OFF 0x80
0358 #define HFA384X_PCI_M0_ADDRL_OFF 0x84
0359 #define HFA384X_PCI_M0_LEN_OFF 0x88
0360 #define HFA384X_PCI_M0_CTL_OFF 0x8C
0361 #define HFA384X_PCI_STATUS_OFF 0x98
0362 #define HFA384X_PCI_M1_ADDRH_OFF 0xA0
0363 #define HFA384X_PCI_M1_ADDRL_OFF 0xA4
0364 #define HFA384X_PCI_M1_LEN_OFF 0xA8
0365 #define HFA384X_PCI_M1_CTL_OFF 0xAC
0366
0367 /* PCI bus master control bits (these are undocumented; based on guessing and
0368  * experimenting..) */
0369 #define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
0370 #define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
0371
0372 #endif /* PRISM2_PCI */
0373
0374
0375 /* Command codes for CMD reg. */
0376 #define HFA384X_CMDCODE_INIT 0x00
0377 #define HFA384X_CMDCODE_ENABLE 0x01
0378 #define HFA384X_CMDCODE_DISABLE 0x02
0379 #define HFA384X_CMDCODE_ALLOC 0x0A
0380 #define HFA384X_CMDCODE_TRANSMIT 0x0B
0381 #define HFA384X_CMDCODE_INQUIRE 0x11
0382 #define HFA384X_CMDCODE_ACCESS 0x21
0383 #define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
0384 #define HFA384X_CMDCODE_DOWNLOAD 0x22
0385 #define HFA384X_CMDCODE_READMIF 0x30
0386 #define HFA384X_CMDCODE_WRITEMIF 0x31
0387 #define HFA384X_CMDCODE_TEST 0x38
0388
0389 #define HFA384X_CMDCODE_MASK 0x3F
0390
0391 /* Test mode operations */
0392 #define HFA384X_TEST_CHANGE_CHANNEL 0x08
0393 #define HFA384X_TEST_MONITOR 0x0B
0394 #define HFA384X_TEST_STOP 0x0F
0395 #define HFA384X_TEST_CFG_BITS 0x15
0396 #define HFA384X_TEST_CFG_BIT_ALC BIT(3)
0397
0398 #define HFA384X_CMD_BUSY BIT(15)
0399
0400 #define HFA384X_CMD_TX_RECLAIM BIT(8)
0401
0402 #define HFA384X_OFFSET_ERR BIT(14)
0403 #define HFA384X_OFFSET_BUSY BIT(15)
0404
0405
0406 /* ProgMode for download command */
0407 #define HFA384X_PROGMODE_DISABLE 0
0408 #define HFA384X_PROGMODE_ENABLE_VOLATILE 1
0409 #define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
0410 #define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
0411
0412 #define HFA384X_AUX_MAGIC0 0xfe01
0413 #define HFA384X_AUX_MAGIC1 0xdc23
0414 #define HFA384X_AUX_MAGIC2 0xba45
0415
0416 #define HFA384X_AUX_PORT_DISABLED 0
0417 #define HFA384X_AUX_PORT_DISABLE BIT(14)
0418 #define HFA384X_AUX_PORT_ENABLE BIT(15)
0419 #define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
0420 #define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
0421
0422 #define PRISM2_PDA_SIZE 1024
0423
0424
0425 /* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
0426 #define HFA384X_EV_TICK BIT(15)
0427 #define HFA384X_EV_WTERR BIT(14)
0428 #define HFA384X_EV_INFDROP BIT(13)
0429 #ifdef PRISM2_PCI
0430 #define HFA384X_EV_PCI_M1 BIT(9)
0431 #define HFA384X_EV_PCI_M0 BIT(8)
0432 #endif /* PRISM2_PCI */
0433 #define HFA384X_EV_INFO BIT(7)
0434 #define HFA384X_EV_DTIM BIT(5)
0435 #define HFA384X_EV_CMD BIT(4)
0436 #define HFA384X_EV_ALLOC BIT(3)
0437 #define HFA384X_EV_TXEXC BIT(2)
0438 #define HFA384X_EV_TX BIT(1)
0439 #define HFA384X_EV_RX BIT(0)
0440
0441
0442 /* HFA384X Information frames */
0443 #define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
0444 #define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
0445 #define HFA384X_INFO_COMMTALLIES 0xF100
0446 #define HFA384X_INFO_SCANRESULTS 0xF101
0447 #define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
0448 #define HFA384X_INFO_HOSTSCANRESULTS 0xF103
0449 #define HFA384X_INFO_LINKSTATUS 0xF200
0450 #define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
0451 #define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
0452 #define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
0453 #define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
0454
0455 enum { HFA384X_LINKSTATUS_CONNECTED = 1,
0456        HFA384X_LINKSTATUS_DISCONNECTED = 2,
0457        HFA384X_LINKSTATUS_AP_CHANGE = 3,
0458        HFA384X_LINKSTATUS_AP_OUT_OF_RANGE = 4,
0459        HFA384X_LINKSTATUS_AP_IN_RANGE = 5,
0460        HFA384X_LINKSTATUS_ASSOC_FAILED = 6 };
0461
0462 enum { HFA384X_PORTTYPE_BSS = 1, HFA384X_PORTTYPE_WDS = 2,
0463        HFA384X_PORTTYPE_PSEUDO_IBSS = 3, HFA384X_PORTTYPE_IBSS = 0,
0464        HFA384X_PORTTYPE_HOSTAP = 6 };
0465
0466 #define HFA384X_RATES_1MBPS BIT(0)
0467 #define HFA384X_RATES_2MBPS BIT(1)
0468 #define HFA384X_RATES_5MBPS BIT(2)
0469 #define HFA384X_RATES_11MBPS BIT(3)
0470
0471 #define HFA384X_ROAMING_FIRMWARE 1
0472 #define HFA384X_ROAMING_HOST 2
0473 #define HFA384X_ROAMING_DISABLED 3
0474
0475 #define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
0476 #define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
0477 #define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
0478 #define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
0479
0480 #define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
0481 #define HFA384X_RX_STATUS_PCF BIT(12)
0482 #define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
0483 #define HFA384X_RX_STATUS_UNDECR BIT(1)
0484 #define HFA384X_RX_STATUS_FCSERR BIT(0)
0485
0486 #define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
0487 (((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
0488 #define HFA384X_RX_STATUS_GET_MACPORT(s) \
0489 (((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
0490
0491 enum { HFA384X_RX_MSGTYPE_NORMAL = 0, HFA384X_RX_MSGTYPE_RFC1042 = 1,
0492        HFA384X_RX_MSGTYPE_BRIDGETUNNEL = 2, HFA384X_RX_MSGTYPE_MGMT = 4 };
0493
0494
0495 #define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
0496 #define HFA384X_TX_CTRL_802_11 BIT(3)
0497 #define HFA384X_TX_CTRL_802_3 0
0498 #define HFA384X_TX_CTRL_TX_EX BIT(2)
0499 #define HFA384X_TX_CTRL_TX_OK BIT(1)
0500
0501 #define HFA384X_TX_STATUS_RETRYERR BIT(0)
0502 #define HFA384X_TX_STATUS_AGEDERR BIT(1)
0503 #define HFA384X_TX_STATUS_DISCON BIT(2)
0504 #define HFA384X_TX_STATUS_FORMERR BIT(3)
0505
0506 /* HFA3861/3863 (BBP) Control Registers */
0507 #define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
0508 #define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
0509 #define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
0510 #define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
0511 #define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
0512
0513
0514 #ifdef __KERNEL__
0515
0516 #define PRISM2_TXFID_COUNT 8
0517 #define PRISM2_DATA_MAXLEN 2304
0518 #define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
0519 #define PRISM2_TXFID_EMPTY 0xffff
0520 #define PRISM2_TXFID_RESERVED 0xfffe
0521 #define PRISM2_DUMMY_FID 0xffff
0522 #define MAX_SSID_LEN 32
0523 #define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
0524
0525 #define PRISM2_DUMP_RX_HDR BIT(0)
0526 #define PRISM2_DUMP_TX_HDR BIT(1)
0527 #define PRISM2_DUMP_TXEXC_HDR BIT(2)
0528
0529 struct hostap_tx_callback_info {
0530     u16 idx;
0531     void (*func)(struct sk_buff *, int ok, void *);
0532     void *data;
0533     struct hostap_tx_callback_info *next;
0534 };
0535
0536
0537 /* IEEE 802.11 requires that STA supports concurrent reception of at least
0538  * three fragmented frames. This define can be increased to support more
0539  * concurrent frames, but it should be noted that each entry can consume about
0540  * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
0541 #define PRISM2_FRAG_CACHE_LEN 4
0542
0543 struct prism2_frag_entry {
0544     unsigned long first_frag_time;
0545     unsigned int seq;
0546     unsigned int last_frag;
0547     struct sk_buff *skb;
0548     u8 src_addr[ETH_ALEN];
0549     u8 dst_addr[ETH_ALEN];
0550 };
0551
0552
0553 struct hostap_cmd_queue {
0554     struct list_head list;
0555     wait_queue_head_t compl;
0556     volatile enum { CMD_SLEEP, CMD_CALLBACK, CMD_COMPLETED } type;
0557     void (*callback)(struct net_device *dev, long context, u16 resp0,
0558              u16 res);
0559     long context;
0560     u16 cmd, param0, param1;
0561     u16 resp0, res;
0562     volatile int issued, issuing;
0563
0564     refcount_t usecnt;
0565     int del_req;
0566 };
0567
0568 /* options for hw_shutdown */
0569 #define HOSTAP_HW_NO_DISABLE BIT(0)
0570 #define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
0571
0572 typedef struct local_info local_info_t;
0573
0574 struct prism2_helper_functions {
0575     /* these functions are defined in hardware model specific files
0576      * (hostap_{cs,plx,pci}.c */
0577     int (*card_present)(local_info_t *local);
0578     void (*cor_sreset)(local_info_t *local);
0579     void (*genesis_reset)(local_info_t *local, int hcr);
0580
0581     /* the following functions are from hostap_hw.c, but they may have some
0582      * hardware model specific code */
0583
0584     /* FIX: low-level commands like cmd might disappear at some point to
0585      * make it easier to change them if needed (e.g., cmd would be replaced
0586      * with write_mif/read_mif/testcmd/inquire); at least get_rid and
0587      * set_rid might move to hostap_{cs,plx,pci}.c */
0588     int (*cmd)(struct net_device *dev, u16 cmd, u16 param0, u16 *param1,
0589            u16 *resp0);
0590     void (*read_regs)(struct net_device *dev, struct hfa384x_regs *regs);
0591     int (*get_rid)(struct net_device *dev, u16 rid, void *buf, int len,
0592                int exact_len);
0593     int (*set_rid)(struct net_device *dev, u16 rid, void *buf, int len);
0594     int (*hw_enable)(struct net_device *dev, int initial);
0595     int (*hw_config)(struct net_device *dev, int initial);
0596     void (*hw_reset)(struct net_device *dev);
0597     void (*hw_shutdown)(struct net_device *dev, int no_disable);
0598     int (*reset_port)(struct net_device *dev);
0599     void (*schedule_reset)(local_info_t *local);
0600     int (*download)(local_info_t *local,
0601             struct prism2_download_param *param);
0602     int (*tx)(struct sk_buff *skb, struct net_device *dev);
0603     int (*set_tim)(struct net_device *dev, int aid, int set);
0604     const struct proc_ops *read_aux_proc_ops;
0605
0606     int need_tx_headroom; /* number of bytes of headroom needed before
0607                    * IEEE 802.11 header */
0608     enum { HOSTAP_HW_PCCARD, HOSTAP_HW_PLX, HOSTAP_HW_PCI } hw_type;
0609 };
0610
0611
0612 struct prism2_download_data {
0613     u32 dl_cmd;
0614     u32 start_addr;
0615     u32 num_areas;
0616     struct prism2_download_data_area {
0617         u32 addr; /* wlan card address */
0618         u32 len;
0619         u8 *data; /* allocated data */
0620     } data[];
0621 };
0622
0623
0624 #define HOSTAP_MAX_BSS_COUNT 64
0625 #define MAX_WPA_IE_LEN 64
0626
0627 struct hostap_bss_info {
0628     struct list_head list;
0629     unsigned long last_update;
0630     unsigned int count;
0631     u8 bssid[ETH_ALEN];
0632     u16 capab_info;
0633     u8 ssid[32];
0634     size_t ssid_len;
0635     u8 wpa_ie[MAX_WPA_IE_LEN];
0636     size_t wpa_ie_len;
0637     u8 rsn_ie[MAX_WPA_IE_LEN];
0638     size_t rsn_ie_len;
0639     int chan;
0640     int included;
0641 };
0642
0643
0644 /* Per radio private Host AP data - shared by all net devices interfaces used
0645  * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
0646  * ((struct hostap_interface *) netdev_priv(dev))->local points to this
0647  * structure. */
0648 struct local_info {
0649     struct module *hw_module;
0650     int card_idx;
0651     int dev_enabled;
0652     int master_dev_auto_open; /* was master device opened automatically */
0653     int num_dev_open; /* number of open devices */
0654     struct net_device *dev; /* master radio device */
0655     struct net_device *ddev; /* main data device */
0656     struct list_head hostap_interfaces; /* Host AP interface list (contains
0657                          * struct hostap_interface entries)
0658                          */
0659     rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
0660                   * when removing entries from the list.
0661                   * TX and RX paths can use read lock. */
0662     spinlock_t cmdlock, baplock, lock, irq_init_lock;
0663     struct mutex rid_bap_mtx;
0664     u16 infofid; /* MAC buffer id for info frame */
0665     /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
0666      * txfidlock */
0667     spinlock_t txfidlock;
0668     int txfid_len; /* length of allocated TX buffers */
0669     u16 txfid[PRISM2_TXFID_COUNT]; /* buffer IDs for TX frames */
0670     /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
0671      * corresponding txfid is free for next TX frame */
0672     u16 intransmitfid[PRISM2_TXFID_COUNT];
0673     int next_txfid; /* index to the next txfid to be checked for
0674              * availability */
0675     int next_alloc; /* index to the next intransmitfid to be checked for
0676              * allocation events */
0677
0678     /* bitfield for atomic bitops */
0679 #define HOSTAP_BITS_TRANSMIT 0
0680 #define HOSTAP_BITS_BAP_TASKLET 1
0681 #define HOSTAP_BITS_BAP_TASKLET2 2
0682     unsigned long bits;
0683
0684     struct ap_data *ap;
0685
0686     char essid[MAX_SSID_LEN + 1];
0687     char name[MAX_NAME_LEN + 1];
0688     int name_set;
0689     u16 channel_mask; /* mask of allowed channels */
0690     u16 scan_channel_mask; /* mask of channels to be scanned */
0691     struct comm_tallies_sums comm_tallies;
0692     struct proc_dir_entry *proc;
0693     int iw_mode; /* operating mode (IW_MODE_*) */
0694     int pseudo_adhoc; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
0695                * 1: IW_MODE_ADHOC is "pseudo IBSS" */
0696     char bssid[ETH_ALEN];
0697     int channel;
0698     int beacon_int;
0699     int dtim_period;
0700     int mtu;
0701     int frame_dump; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
0702     int fw_tx_rate_control;
0703     u16 tx_rate_control;
0704     u16 basic_rates;
0705     int hw_resetting;
0706     int hw_ready;
0707     int hw_reset_tries; /* how many times reset has been tried */
0708     int hw_downloading;
0709     int shutdown;
0710     int pri_only;
0711     int no_pri; /* no PRI f/w present */
0712     int sram_type; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
0713
0714     enum {
0715         PRISM2_TXPOWER_AUTO = 0, PRISM2_TXPOWER_OFF,
0716         PRISM2_TXPOWER_FIXED, PRISM2_TXPOWER_UNKNOWN
0717     } txpower_type;
0718     int txpower; /* if txpower_type == PRISM2_TXPOWER_FIXED */
0719
0720     /* command queue for hfa384x_cmd(); protected with cmdlock */
0721     struct list_head cmd_queue;
0722     /* max_len for cmd_queue; in addition, cmd_callback can use two
0723      * additional entries to prevent sleeping commands from stopping
0724      * transmits */
0725 #define HOSTAP_CMD_QUEUE_MAX_LEN 16
0726     int cmd_queue_len; /* number of entries in cmd_queue */
0727
0728     /* if card timeout is detected in interrupt context, reset_queue is
0729      * used to schedule card reseting to be done in user context */
0730     struct work_struct reset_queue;
0731
0732     /* For scheduling a change of the promiscuous mode RID */
0733     int is_promisc;
0734     struct work_struct set_multicast_list_queue;
0735
0736     struct work_struct set_tim_queue;
0737     struct list_head set_tim_list;
0738     spinlock_t set_tim_lock;
0739
0740     int wds_max_connections;
0741     int wds_connections;
0742 #define HOSTAP_WDS_BROADCAST_RA BIT(0)
0743 #define HOSTAP_WDS_AP_CLIENT BIT(1)
0744 #define HOSTAP_WDS_STANDARD_FRAME BIT(2)
0745     u32 wds_type;
0746     u16 tx_control; /* flags to be used in TX description */
0747     int manual_retry_count; /* -1 = use f/w default; otherwise retry count
0748                  * to be used with all frames */
0749
0750     struct iw_statistics wstats;
0751     unsigned long scan_timestamp; /* Time started to scan */
0752     enum {
0753         PRISM2_MONITOR_80211 = 0, PRISM2_MONITOR_PRISM = 1,
0754         PRISM2_MONITOR_CAPHDR = 2, PRISM2_MONITOR_RADIOTAP = 3
0755     } monitor_type;
0756     int monitor_allow_fcserr;
0757
0758     int hostapd; /* whether user space daemon, hostapd, is used for AP
0759               * management */
0760     int hostapd_sta; /* whether hostapd is used with an extra STA interface
0761               */
0762     struct net_device *apdev;
0763     struct net_device_stats apdevstats;
0764
0765     char assoc_ap_addr[ETH_ALEN];
0766     struct net_device *stadev;
0767     struct net_device_stats stadevstats;
0768
0769 #define WEP_KEYS 4
0770 #define WEP_KEY_LEN 13
0771     struct lib80211_crypt_info crypt_info;
0772
0773     int open_wep; /* allow unencrypted frames */
0774     int host_encrypt;
0775     int host_decrypt;
0776     int privacy_invoked; /* force privacy invoked flag even if no keys are
0777                   * configured */
0778     int fw_encrypt_ok; /* whether firmware-based WEP encrypt is working
0779                 * in Host AP mode (STA f/w 1.4.9 or newer) */
0780     int bcrx_sta_key; /* use individual keys to override default keys even
0781                * with RX of broad/multicast frames */
0782
0783     struct prism2_frag_entry frag_cache[PRISM2_FRAG_CACHE_LEN];
0784     unsigned int frag_next_idx;
0785
0786     int ieee_802_1x; /* is IEEE 802.1X used */
0787
0788     int antsel_tx, antsel_rx;
0789     int rts_threshold; /* dot11RTSThreshold */
0790     int fragm_threshold; /* dot11FragmentationThreshold */
0791     int auth_algs; /* PRISM2_AUTH_ flags */
0792
0793     int enh_sec; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
0794     int tallies32; /* 32-bit tallies in use */
0795
0796     struct prism2_helper_functions *func;
0797
0798     u8 *pda;
0799     int fw_ap;
0800 #define PRISM2_FW_VER(major, minor, variant) \
0801 (((major) << 16) | ((minor) << 8) | variant)
0802     u32 sta_fw_ver;
0803
0804     /* Tasklets for handling hardware IRQ related operations outside hw IRQ
0805      * handler */
0806     struct tasklet_struct bap_tasklet;
0807
0808     struct tasklet_struct info_tasklet;
0809     struct sk_buff_head info_list; /* info frames as skb's for
0810                     * info_tasklet */
0811
0812     struct hostap_tx_callback_info *tx_callback; /* registered TX callbacks
0813                               */
0814
0815     struct tasklet_struct rx_tasklet;
0816     struct sk_buff_head rx_list;
0817
0818     struct tasklet_struct sta_tx_exc_tasklet;
0819     struct sk_buff_head sta_tx_exc_list;
0820
0821     int host_roaming;
0822     unsigned long last_join_time; /* time of last JoinRequest */
0823     struct hfa384x_hostscan_result *last_scan_results;
0824     int last_scan_results_count;
0825     enum { PRISM2_SCAN, PRISM2_HOSTSCAN } last_scan_type;
0826     struct work_struct info_queue;
0827     unsigned long pending_info; /* bit field of pending info_queue items */
0828 #define PRISM2_INFO_PENDING_LINKSTATUS 0
0829 #define PRISM2_INFO_PENDING_SCANRESULTS 1
0830     int prev_link_status; /* previous received LinkStatus info */
0831     int prev_linkstatus_connected;
0832     u8 preferred_ap[ETH_ALEN]; /* use this AP if possible */
0833
0834 #ifdef PRISM2_CALLBACK
0835     void *callback_data; /* Can be used in callbacks; e.g., allocate
0836                   * on enable event and free on disable event.
0837                   * Host AP driver code does not touch this. */
0838 #endif /* PRISM2_CALLBACK */
0839
0840     wait_queue_head_t hostscan_wq;
0841
0842     /* Passive scan in Host AP mode */
0843     struct timer_list passive_scan_timer;
0844     int passive_scan_interval; /* in seconds, 0 = disabled */
0845     int passive_scan_channel;
0846     enum { PASSIVE_SCAN_WAIT, PASSIVE_SCAN_LISTEN } passive_scan_state;
0847
0848     struct timer_list tick_timer;
0849     unsigned long last_tick_timer;
0850     unsigned int sw_tick_stuck;
0851
0852     /* commsQuality / dBmCommsQuality data from periodic polling; only
0853      * valid for Managed and Ad-hoc modes */
0854     unsigned long last_comms_qual_update;
0855     int comms_qual; /* in some odd unit.. */
0856     int avg_signal; /* in dB (note: negative) */
0857     int avg_noise; /* in dB (note: negative) */
0858     struct work_struct comms_qual_update;
0859
0860     /* RSSI to dBm adjustment (for RX descriptor fields) */
0861     int rssi_to_dBm; /* subtract from RSSI to get approximate dBm value */
0862
0863     /* BSS list / protected by local->lock */
0864     struct list_head bss_list;
0865     int num_bss_info;
0866     int wpa; /* WPA support enabled */
0867     int tkip_countermeasures;
0868     int drop_unencrypted;
0869     /* Generic IEEE 802.11 info element to be added to
0870      * ProbeResp/Beacon/(Re)AssocReq */
0871     u8 *generic_elem;
0872     size_t generic_elem_len;
0873
0874 #ifdef PRISM2_DOWNLOAD_SUPPORT
0875     /* Persistent volatile download data */
0876     struct prism2_download_data *dl_pri;
0877     struct prism2_download_data *dl_sec;
0878 #endif /* PRISM2_DOWNLOAD_SUPPORT */
0879
0880 #ifdef PRISM2_IO_DEBUG
0881 #define PRISM2_IO_DEBUG_SIZE 10000
0882     u32 io_debug[PRISM2_IO_DEBUG_SIZE];
0883     int io_debug_head;
0884     int io_debug_enabled;
0885 #endif /* PRISM2_IO_DEBUG */
0886
0887     /* Pointer to hardware model specific (cs,pci,plx) private data. */
0888     void *hw_priv;
0889 };
0890
0891
0892 /* Per interface private Host AP data
0893  * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
0894  * WDS) and netdev_priv(dev) points to this structure. */
0895 struct hostap_interface {
0896     struct list_head list; /* list entry in Host AP interface list */
0897     struct net_device *dev; /* pointer to this device */
0898     struct local_info *local; /* pointer to shared private data */
0899     struct net_device_stats stats;
0900     struct iw_spy_data spy_data; /* iwspy support */
0901     struct iw_public_data wireless_data;
0902
0903     enum {
0904         HOSTAP_INTERFACE_MASTER,
0905         HOSTAP_INTERFACE_MAIN,
0906         HOSTAP_INTERFACE_AP,
0907         HOSTAP_INTERFACE_STA,
0908         HOSTAP_INTERFACE_WDS,
0909     } type;
0910
0911     union {
0912         struct hostap_interface_wds {
0913             u8 remote_addr[ETH_ALEN];
0914         } wds;
0915     } u;
0916 };
0917
0918
0919 #define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
0920
0921 /*
0922  * TX meta data - stored in skb->cb buffer, so this must not be increased over
0923  * the 48-byte limit.
0924  * THE PADDING THIS STARTS WITH IS A HORRIBLE HACK THAT SHOULD NOT LIVE
0925  * TO SEE THE DAY.
0926  */
0927 struct hostap_skb_tx_data {
0928     unsigned int __padding_for_default_qdiscs;
0929     u32 magic; /* HOSTAP_SKB_TX_DATA_MAGIC */
0930     u8 rate; /* transmit rate */
0931 #define HOSTAP_TX_FLAGS_WDS BIT(0)
0932 #define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1)
0933 #define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2)
0934     u8 flags; /* HOSTAP_TX_FLAGS_* */
0935     u16 tx_cb_idx;
0936     struct hostap_interface *iface;
0937     unsigned long jiffies; /* queueing timestamp */
0938     unsigned short ethertype;
0939 };
0940
0941
0942 #ifndef PRISM2_NO_DEBUG
0943
0944 #define DEBUG_FID BIT(0)
0945 #define DEBUG_PS BIT(1)
0946 #define DEBUG_FLOW BIT(2)
0947 #define DEBUG_AP BIT(3)
0948 #define DEBUG_HW BIT(4)
0949 #define DEBUG_EXTRA BIT(5)
0950 #define DEBUG_EXTRA2 BIT(6)
0951 #define DEBUG_PS2 BIT(7)
0952 #define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
0953 #define PDEBUG(n, args...) \
0954 do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
0955 #define PDEBUG2(n, args...) \
0956 do { if ((n) & DEBUG_MASK) printk(args); } while (0)
0957
0958 #else /* PRISM2_NO_DEBUG */
0959
0960 #define PDEBUG(n, args...)
0961 #define PDEBUG2(n, args...)
0962
0963 #endif /* PRISM2_NO_DEBUG */
0964
0965 enum { BAP0 = 0, BAP1 = 1 };
0966
0967 #define PRISM2_IO_DEBUG_CMD_INB 0
0968 #define PRISM2_IO_DEBUG_CMD_INW 1
0969 #define PRISM2_IO_DEBUG_CMD_INSW 2
0970 #define PRISM2_IO_DEBUG_CMD_OUTB 3
0971 #define PRISM2_IO_DEBUG_CMD_OUTW 4
0972 #define PRISM2_IO_DEBUG_CMD_OUTSW 5
0973 #define PRISM2_IO_DEBUG_CMD_ERROR 6
0974 #define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
0975
0976 #ifdef PRISM2_IO_DEBUG
0977
0978 #define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
0979 (((cmd) << 24) | ((reg) << 16) | value)
0980
0981 static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
0982                        int reg, int value)
0983 {
0984     struct hostap_interface *iface = netdev_priv(dev);
0985     local_info_t *local = iface->local;
0986
0987     if (!local->io_debug_enabled)
0988         return;
0989
0990     local->io_debug[local->io_debug_head] = jiffies & 0xffffffff;
0991     if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
0992         local->io_debug_head = 0;
0993     local->io_debug[local->io_debug_head] =
0994         PRISM2_IO_DEBUG_ENTRY(cmd, reg, value);
0995     if (++local->io_debug_head >= PRISM2_IO_DEBUG_SIZE)
0996         local->io_debug_head = 0;
0997 }
0998
0999
1000 static inline void prism2_io_debug_error(struct net_device *dev, int err)
1001 {
1002     struct hostap_interface *iface = netdev_priv(dev);
1003     local_info_t *local = iface->local;
1004     unsigned long flags;
1005
1006     if (!local->io_debug_enabled)
1007         return;
1008
1009     spin_lock_irqsave(&local->lock, flags);
1010     prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_ERROR, 0, err);
1011     if (local->io_debug_enabled == 1) {
1012         local->io_debug_enabled = 0;
1013         printk(KERN_DEBUG "%s: I/O debug stopped\n", dev->name);
1014     }
1015     spin_unlock_irqrestore(&local->lock, flags);
1016 }
1017
1018 #else /* PRISM2_IO_DEBUG */
1019
1020 static inline void prism2_io_debug_add(struct net_device *dev, int cmd,
1021                        int reg, int value)
1022 {
1023 }
1024
1025 static inline void prism2_io_debug_error(struct net_device *dev, int err)
1026 {
1027 }
1028
1029 #endif /* PRISM2_IO_DEBUG */
1030
1031
1032 #ifdef PRISM2_CALLBACK
1033 enum {
1034     /* Called when card is enabled */
1035     PRISM2_CALLBACK_ENABLE,
1036
1037     /* Called when card is disabled */
1038     PRISM2_CALLBACK_DISABLE,
1039
1040     /* Called when RX/TX starts/ends */
1041     PRISM2_CALLBACK_RX_START, PRISM2_CALLBACK_RX_END,
1042     PRISM2_CALLBACK_TX_START, PRISM2_CALLBACK_TX_END
1043 };
1044 void prism2_callback(local_info_t *local, int event);
1045 #else /* PRISM2_CALLBACK */
1046 #define prism2_callback(d, e) do { } while (0)
1047 #endif /* PRISM2_CALLBACK */
1048
1049 #endif /* __KERNEL__ */
1050
1051 #endif /* HOSTAP_WLAN_H */