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0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /*
0003  * Copyright (C) 2012-2014, 2018-2019, 2021 Intel Corporation
0004  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
0005  * Copyright (C) 2016-2017 Intel Deutschland GmbH
0006  */
0007 #include <linux/firmware.h>
0008 #include <linux/rtnetlink.h>
0009 #include "iwl-trans.h"
0010 #include "iwl-csr.h"
0011 #include "mvm.h"
0012 #include "iwl-eeprom-parse.h"
0013 #include "iwl-eeprom-read.h"
0014 #include "iwl-nvm-parse.h"
0015 #include "iwl-prph.h"
0016 #include "fw/acpi.h"
0017 
0018 /* Default NVM size to read */
0019 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
0020 
0021 #define NVM_WRITE_OPCODE 1
0022 #define NVM_READ_OPCODE 0
0023 
0024 /* load nvm chunk response */
0025 enum {
0026     READ_NVM_CHUNK_SUCCEED = 0,
0027     READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
0028 };
0029 
0030 /*
0031  * prepare the NVM host command w/ the pointers to the nvm buffer
0032  * and send it to fw
0033  */
0034 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
0035                    u16 offset, u16 length, const u8 *data)
0036 {
0037     struct iwl_nvm_access_cmd nvm_access_cmd = {
0038         .offset = cpu_to_le16(offset),
0039         .length = cpu_to_le16(length),
0040         .type = cpu_to_le16(section),
0041         .op_code = NVM_WRITE_OPCODE,
0042     };
0043     struct iwl_host_cmd cmd = {
0044         .id = NVM_ACCESS_CMD,
0045         .len = { sizeof(struct iwl_nvm_access_cmd), length },
0046         .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
0047         .data = { &nvm_access_cmd, data },
0048         /* data may come from vmalloc, so use _DUP */
0049         .dataflags = { 0, IWL_HCMD_DFL_DUP },
0050     };
0051     struct iwl_rx_packet *pkt;
0052     struct iwl_nvm_access_resp *nvm_resp;
0053     int ret;
0054 
0055     ret = iwl_mvm_send_cmd(mvm, &cmd);
0056     if (ret)
0057         return ret;
0058 
0059     pkt = cmd.resp_pkt;
0060     /* Extract & check NVM write response */
0061     nvm_resp = (void *)pkt->data;
0062     if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
0063         IWL_ERR(mvm,
0064             "NVM access write command failed for section %u (status = 0x%x)\n",
0065             section, le16_to_cpu(nvm_resp->status));
0066         ret = -EIO;
0067     }
0068 
0069     iwl_free_resp(&cmd);
0070     return ret;
0071 }
0072 
0073 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
0074                   u16 offset, u16 length, u8 *data)
0075 {
0076     struct iwl_nvm_access_cmd nvm_access_cmd = {
0077         .offset = cpu_to_le16(offset),
0078         .length = cpu_to_le16(length),
0079         .type = cpu_to_le16(section),
0080         .op_code = NVM_READ_OPCODE,
0081     };
0082     struct iwl_nvm_access_resp *nvm_resp;
0083     struct iwl_rx_packet *pkt;
0084     struct iwl_host_cmd cmd = {
0085         .id = NVM_ACCESS_CMD,
0086         .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
0087         .data = { &nvm_access_cmd, },
0088     };
0089     int ret, bytes_read, offset_read;
0090     u8 *resp_data;
0091 
0092     cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
0093 
0094     ret = iwl_mvm_send_cmd(mvm, &cmd);
0095     if (ret)
0096         return ret;
0097 
0098     pkt = cmd.resp_pkt;
0099 
0100     /* Extract NVM response */
0101     nvm_resp = (void *)pkt->data;
0102     ret = le16_to_cpu(nvm_resp->status);
0103     bytes_read = le16_to_cpu(nvm_resp->length);
0104     offset_read = le16_to_cpu(nvm_resp->offset);
0105     resp_data = nvm_resp->data;
0106     if (ret) {
0107         if ((offset != 0) &&
0108             (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
0109             /*
0110              * meaning of NOT_VALID_ADDRESS:
0111              * driver try to read chunk from address that is
0112              * multiple of 2K and got an error since addr is empty.
0113              * meaning of (offset != 0): driver already
0114              * read valid data from another chunk so this case
0115              * is not an error.
0116              */
0117             IWL_DEBUG_EEPROM(mvm->trans->dev,
0118                      "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
0119                      offset);
0120             ret = 0;
0121         } else {
0122             IWL_DEBUG_EEPROM(mvm->trans->dev,
0123                      "NVM access command failed with status %d (device: %s)\n",
0124                      ret, mvm->trans->name);
0125             ret = -ENODATA;
0126         }
0127         goto exit;
0128     }
0129 
0130     if (offset_read != offset) {
0131         IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
0132             offset_read);
0133         ret = -EINVAL;
0134         goto exit;
0135     }
0136 
0137     /* Write data to NVM */
0138     memcpy(data + offset, resp_data, bytes_read);
0139     ret = bytes_read;
0140 
0141 exit:
0142     iwl_free_resp(&cmd);
0143     return ret;
0144 }
0145 
0146 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
0147                  const u8 *data, u16 length)
0148 {
0149     int offset = 0;
0150 
0151     /* copy data in chunks of 2k (and remainder if any) */
0152 
0153     while (offset < length) {
0154         int chunk_size, ret;
0155 
0156         chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
0157                  length - offset);
0158 
0159         ret = iwl_nvm_write_chunk(mvm, section, offset,
0160                       chunk_size, data + offset);
0161         if (ret < 0)
0162             return ret;
0163 
0164         offset += chunk_size;
0165     }
0166 
0167     return 0;
0168 }
0169 
0170 /*
0171  * Reads an NVM section completely.
0172  * NICs prior to 7000 family doesn't have a real NVM, but just read
0173  * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
0174  * by uCode, we need to manually check in this case that we don't
0175  * overflow and try to read more than the EEPROM size.
0176  * For 7000 family NICs, we supply the maximal size we can read, and
0177  * the uCode fills the response with as much data as we can,
0178  * without overflowing, so no check is needed.
0179  */
0180 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
0181                 u8 *data, u32 size_read)
0182 {
0183     u16 length, offset = 0;
0184     int ret;
0185 
0186     /* Set nvm section read length */
0187     length = IWL_NVM_DEFAULT_CHUNK_SIZE;
0188 
0189     ret = length;
0190 
0191     /* Read the NVM until exhausted (reading less than requested) */
0192     while (ret == length) {
0193         /* Check no memory assumptions fail and cause an overflow */
0194         if ((size_read + offset + length) >
0195             mvm->trans->trans_cfg->base_params->eeprom_size) {
0196             IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
0197             return -ENOBUFS;
0198         }
0199 
0200         ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
0201         if (ret < 0) {
0202             IWL_DEBUG_EEPROM(mvm->trans->dev,
0203                      "Cannot read NVM from section %d offset %d, length %d\n",
0204                      section, offset, length);
0205             return ret;
0206         }
0207         offset += ret;
0208     }
0209 
0210     iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
0211 
0212     IWL_DEBUG_EEPROM(mvm->trans->dev,
0213              "NVM section %d read completed\n", section);
0214     return offset;
0215 }
0216 
0217 static struct iwl_nvm_data *
0218 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
0219 {
0220     struct iwl_nvm_section *sections = mvm->nvm_sections;
0221     const __be16 *hw;
0222     const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
0223     int regulatory_type;
0224 
0225     /* Checking for required sections */
0226     if (mvm->trans->cfg->nvm_type == IWL_NVM) {
0227         if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
0228             !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
0229             IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
0230             return NULL;
0231         }
0232     } else {
0233         if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
0234             regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
0235         else
0236             regulatory_type = NVM_SECTION_TYPE_REGULATORY;
0237 
0238         /* SW and REGULATORY sections are mandatory */
0239         if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
0240             !mvm->nvm_sections[regulatory_type].data) {
0241             IWL_ERR(mvm,
0242                 "Can't parse empty family 8000 OTP/NVM sections\n");
0243             return NULL;
0244         }
0245         /* MAC_OVERRIDE or at least HW section must exist */
0246         if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
0247             !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
0248             IWL_ERR(mvm,
0249                 "Can't parse mac_address, empty sections\n");
0250             return NULL;
0251         }
0252 
0253         /* PHY_SKU section is mandatory in B0 */
0254         if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
0255             !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
0256             IWL_ERR(mvm,
0257                 "Can't parse phy_sku in B0, empty sections\n");
0258             return NULL;
0259         }
0260     }
0261 
0262     hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
0263     sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
0264     calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
0265     mac_override =
0266         (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
0267     phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
0268 
0269     regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
0270         (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
0271         (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
0272 
0273     return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
0274                   regulatory, mac_override, phy_sku,
0275                   mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant);
0276 }
0277 
0278 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
0279 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
0280 {
0281     int i, ret = 0;
0282     struct iwl_nvm_section *sections = mvm->nvm_sections;
0283 
0284     IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
0285 
0286     for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
0287         if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
0288             continue;
0289         ret = iwl_nvm_write_section(mvm, i, sections[i].data,
0290                         sections[i].length);
0291         if (ret < 0) {
0292             IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
0293             break;
0294         }
0295     }
0296     return ret;
0297 }
0298 
0299 int iwl_nvm_init(struct iwl_mvm *mvm)
0300 {
0301     int ret, section;
0302     u32 size_read = 0;
0303     u8 *nvm_buffer, *temp;
0304     const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
0305 
0306     if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
0307         return -EINVAL;
0308 
0309     /* load NVM values from nic */
0310     /* Read From FW NVM */
0311     IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
0312 
0313     nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
0314                  GFP_KERNEL);
0315     if (!nvm_buffer)
0316         return -ENOMEM;
0317     for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
0318         /* we override the constness for initial read */
0319         ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
0320                        size_read);
0321         if (ret == -ENODATA) {
0322             ret = 0;
0323             continue;
0324         }
0325         if (ret < 0)
0326             break;
0327         size_read += ret;
0328         temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
0329         if (!temp) {
0330             ret = -ENOMEM;
0331             break;
0332         }
0333 
0334         iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
0335 
0336         mvm->nvm_sections[section].data = temp;
0337         mvm->nvm_sections[section].length = ret;
0338 
0339 #ifdef CONFIG_IWLWIFI_DEBUGFS
0340         switch (section) {
0341         case NVM_SECTION_TYPE_SW:
0342             mvm->nvm_sw_blob.data = temp;
0343             mvm->nvm_sw_blob.size  = ret;
0344             break;
0345         case NVM_SECTION_TYPE_CALIBRATION:
0346             mvm->nvm_calib_blob.data = temp;
0347             mvm->nvm_calib_blob.size  = ret;
0348             break;
0349         case NVM_SECTION_TYPE_PRODUCTION:
0350             mvm->nvm_prod_blob.data = temp;
0351             mvm->nvm_prod_blob.size  = ret;
0352             break;
0353         case NVM_SECTION_TYPE_PHY_SKU:
0354             mvm->nvm_phy_sku_blob.data = temp;
0355             mvm->nvm_phy_sku_blob.size  = ret;
0356             break;
0357         case NVM_SECTION_TYPE_REGULATORY_SDP:
0358         case NVM_SECTION_TYPE_REGULATORY:
0359             mvm->nvm_reg_blob.data = temp;
0360             mvm->nvm_reg_blob.size  = ret;
0361             break;
0362         default:
0363             if (section == mvm->cfg->nvm_hw_section_num) {
0364                 mvm->nvm_hw_blob.data = temp;
0365                 mvm->nvm_hw_blob.size = ret;
0366                 break;
0367             }
0368         }
0369 #endif
0370     }
0371     if (!size_read)
0372         IWL_ERR(mvm, "OTP is blank\n");
0373     kfree(nvm_buffer);
0374 
0375     /* Only if PNVM selected in the mod param - load external NVM  */
0376     if (mvm->nvm_file_name) {
0377         /* read External NVM file from the mod param */
0378         ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
0379                         mvm->nvm_sections);
0380         if (ret) {
0381             mvm->nvm_file_name = nvm_file_C;
0382 
0383             if ((ret == -EFAULT || ret == -ENOENT) &&
0384                 mvm->nvm_file_name) {
0385                 /* in case nvm file was failed try again */
0386                 ret = iwl_read_external_nvm(mvm->trans,
0387                                 mvm->nvm_file_name,
0388                                 mvm->nvm_sections);
0389                 if (ret)
0390                     return ret;
0391             } else {
0392                 return ret;
0393             }
0394         }
0395     }
0396 
0397     /* parse the relevant nvm sections */
0398     mvm->nvm_data = iwl_parse_nvm_sections(mvm);
0399     if (!mvm->nvm_data)
0400         return -ENODATA;
0401     IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
0402              mvm->nvm_data->nvm_version);
0403 
0404     return ret < 0 ? ret : 0;
0405 }
0406 
0407 struct iwl_mcc_update_resp *
0408 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
0409            enum iwl_mcc_source src_id)
0410 {
0411     struct iwl_mcc_update_cmd mcc_update_cmd = {
0412         .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
0413         .source_id = (u8)src_id,
0414     };
0415     struct iwl_mcc_update_resp *resp_cp;
0416     struct iwl_rx_packet *pkt;
0417     struct iwl_host_cmd cmd = {
0418         .id = MCC_UPDATE_CMD,
0419         .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
0420         .data = { &mcc_update_cmd },
0421     };
0422 
0423     int ret;
0424     u32 status;
0425     int resp_len, n_channels;
0426     u16 mcc;
0427 
0428     if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
0429         return ERR_PTR(-EOPNOTSUPP);
0430 
0431     cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
0432 
0433     IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
0434               alpha2[0], alpha2[1], src_id);
0435 
0436     ret = iwl_mvm_send_cmd(mvm, &cmd);
0437     if (ret)
0438         return ERR_PTR(ret);
0439 
0440     pkt = cmd.resp_pkt;
0441 
0442     /* Extract MCC response */
0443     if (fw_has_capa(&mvm->fw->ucode_capa,
0444             IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
0445         struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
0446 
0447         n_channels =  __le32_to_cpu(mcc_resp->n_channels);
0448         resp_len = sizeof(struct iwl_mcc_update_resp) +
0449                n_channels * sizeof(__le32);
0450         resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
0451         if (!resp_cp) {
0452             resp_cp = ERR_PTR(-ENOMEM);
0453             goto exit;
0454         }
0455     } else {
0456         struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
0457 
0458         n_channels =  __le32_to_cpu(mcc_resp_v3->n_channels);
0459         resp_len = sizeof(struct iwl_mcc_update_resp) +
0460                n_channels * sizeof(__le32);
0461         resp_cp = kzalloc(resp_len, GFP_KERNEL);
0462         if (!resp_cp) {
0463             resp_cp = ERR_PTR(-ENOMEM);
0464             goto exit;
0465         }
0466 
0467         resp_cp->status = mcc_resp_v3->status;
0468         resp_cp->mcc = mcc_resp_v3->mcc;
0469         resp_cp->cap = cpu_to_le16(mcc_resp_v3->cap);
0470         resp_cp->source_id = mcc_resp_v3->source_id;
0471         resp_cp->time = mcc_resp_v3->time;
0472         resp_cp->geo_info = mcc_resp_v3->geo_info;
0473         resp_cp->n_channels = mcc_resp_v3->n_channels;
0474         memcpy(resp_cp->channels, mcc_resp_v3->channels,
0475                n_channels * sizeof(__le32));
0476     }
0477 
0478     status = le32_to_cpu(resp_cp->status);
0479 
0480     mcc = le16_to_cpu(resp_cp->mcc);
0481 
0482     /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
0483     if (mcc == 0) {
0484         mcc = 0x3030;  /* "00" - world */
0485         resp_cp->mcc = cpu_to_le16(mcc);
0486     }
0487 
0488     IWL_DEBUG_LAR(mvm,
0489               "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
0490               status, mcc, mcc >> 8, mcc & 0xff, n_channels);
0491 
0492 exit:
0493     iwl_free_resp(&cmd);
0494     return resp_cp;
0495 }
0496 
0497 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
0498 {
0499     bool tlv_lar;
0500     bool nvm_lar;
0501     int retval;
0502     struct ieee80211_regdomain *regd;
0503     char mcc[3];
0504 
0505     if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
0506         tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
0507                       IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
0508         nvm_lar = mvm->nvm_data->lar_enabled;
0509         if (tlv_lar != nvm_lar)
0510             IWL_INFO(mvm,
0511                  "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
0512                  tlv_lar ? "enabled" : "disabled",
0513                  nvm_lar ? "enabled" : "disabled");
0514     }
0515 
0516     if (!iwl_mvm_is_lar_supported(mvm))
0517         return 0;
0518 
0519     /*
0520      * try to replay the last set MCC to FW. If it doesn't exist,
0521      * queue an update to cfg80211 to retrieve the default alpha2 from FW.
0522      */
0523     retval = iwl_mvm_init_fw_regd(mvm);
0524     if (retval != -ENOENT)
0525         return retval;
0526 
0527     /*
0528      * Driver regulatory hint for initial update, this also informs the
0529      * firmware we support wifi location updates.
0530      * Disallow scans that might crash the FW while the LAR regdomain
0531      * is not set.
0532      */
0533     mvm->lar_regdom_set = false;
0534 
0535     regd = iwl_mvm_get_current_regdomain(mvm, NULL);
0536     if (IS_ERR_OR_NULL(regd))
0537         return -EIO;
0538 
0539     if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
0540         !iwl_acpi_get_mcc(mvm->dev, mcc)) {
0541         kfree(regd);
0542         regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
0543                          MCC_SOURCE_BIOS, NULL);
0544         if (IS_ERR_OR_NULL(regd))
0545             return -EIO;
0546     }
0547 
0548     retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
0549     kfree(regd);
0550     return retval;
0551 }
0552 
0553 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
0554                 struct iwl_rx_cmd_buffer *rxb)
0555 {
0556     struct iwl_rx_packet *pkt = rxb_addr(rxb);
0557     struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
0558     enum iwl_mcc_source src;
0559     char mcc[3];
0560     struct ieee80211_regdomain *regd;
0561     int wgds_tbl_idx;
0562 
0563     lockdep_assert_held(&mvm->mutex);
0564 
0565     if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
0566         IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
0567         return;
0568     }
0569 
0570     if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
0571         return;
0572 
0573     mcc[0] = le16_to_cpu(notif->mcc) >> 8;
0574     mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
0575     mcc[2] = '\0';
0576     src = notif->source_id;
0577 
0578     IWL_DEBUG_LAR(mvm,
0579               "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
0580               mcc, src);
0581     regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
0582     if (IS_ERR_OR_NULL(regd))
0583         return;
0584 
0585     wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
0586     if (wgds_tbl_idx < 1)
0587         IWL_DEBUG_INFO(mvm,
0588                    "SAR WGDS is disabled or error received (%d)\n",
0589                    wgds_tbl_idx);
0590     else
0591         IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
0592                    wgds_tbl_idx);
0593 
0594     regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
0595     kfree(regd);
0596 }
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