Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /*
0003  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
0004  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
0005  * Copyright (C) 2016-2017 Intel Deutschland GmbH
0006  */
0007 #include <linux/types.h>
0008 #include <linux/slab.h>
0009 #include <linux/export.h>
0010 #include <linux/etherdevice.h>
0011 #include <linux/pci.h>
0012 #include <linux/firmware.h>
0013 
0014 #include "iwl-drv.h"
0015 #include "iwl-modparams.h"
0016 #include "iwl-nvm-parse.h"
0017 #include "iwl-prph.h"
0018 #include "iwl-io.h"
0019 #include "iwl-csr.h"
0020 #include "fw/acpi.h"
0021 #include "fw/api/nvm-reg.h"
0022 #include "fw/api/commands.h"
0023 #include "fw/api/cmdhdr.h"
0024 #include "fw/img.h"
0025 #include "mei/iwl-mei.h"
0026 
0027 /* NVM offsets (in words) definitions */
0028 enum nvm_offsets {
0029     /* NVM HW-Section offset (in words) definitions */
0030     SUBSYSTEM_ID = 0x0A,
0031     HW_ADDR = 0x15,
0032 
0033     /* NVM SW-Section offset (in words) definitions */
0034     NVM_SW_SECTION = 0x1C0,
0035     NVM_VERSION = 0,
0036     RADIO_CFG = 1,
0037     SKU = 2,
0038     N_HW_ADDRS = 3,
0039     NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
0040 
0041     /* NVM calibration section offset (in words) definitions */
0042     NVM_CALIB_SECTION = 0x2B8,
0043     XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
0044 
0045     /* NVM REGULATORY -Section offset (in words) definitions */
0046     NVM_CHANNELS_SDP = 0,
0047 };
0048 
0049 enum ext_nvm_offsets {
0050     /* NVM HW-Section offset (in words) definitions */
0051     MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
0052 
0053     /* NVM SW-Section offset (in words) definitions */
0054     NVM_VERSION_EXT_NVM = 0,
0055     N_HW_ADDRS_FAMILY_8000 = 3,
0056 
0057     /* NVM PHY_SKU-Section offset (in words) definitions */
0058     RADIO_CFG_FAMILY_EXT_NVM = 0,
0059     SKU_FAMILY_8000 = 2,
0060 
0061     /* NVM REGULATORY -Section offset (in words) definitions */
0062     NVM_CHANNELS_EXTENDED = 0,
0063     NVM_LAR_OFFSET_OLD = 0x4C7,
0064     NVM_LAR_OFFSET = 0x507,
0065     NVM_LAR_ENABLED = 0x7,
0066 };
0067 
0068 /* SKU Capabilities (actual values from NVM definition) */
0069 enum nvm_sku_bits {
0070     NVM_SKU_CAP_BAND_24GHZ      = BIT(0),
0071     NVM_SKU_CAP_BAND_52GHZ      = BIT(1),
0072     NVM_SKU_CAP_11N_ENABLE      = BIT(2),
0073     NVM_SKU_CAP_11AC_ENABLE     = BIT(3),
0074     NVM_SKU_CAP_MIMO_DISABLE    = BIT(5),
0075 };
0076 
0077 /*
0078  * These are the channel numbers in the order that they are stored in the NVM
0079  */
0080 static const u16 iwl_nvm_channels[] = {
0081     /* 2.4 GHz */
0082     1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
0083     /* 5 GHz */
0084     36, 40, 44 , 48, 52, 56, 60, 64,
0085     100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
0086     149, 153, 157, 161, 165
0087 };
0088 
0089 static const u16 iwl_ext_nvm_channels[] = {
0090     /* 2.4 GHz */
0091     1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
0092     /* 5 GHz */
0093     36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
0094     96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
0095     149, 153, 157, 161, 165, 169, 173, 177, 181
0096 };
0097 
0098 static const u16 iwl_uhb_nvm_channels[] = {
0099     /* 2.4 GHz */
0100     1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
0101     /* 5 GHz */
0102     36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
0103     96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
0104     149, 153, 157, 161, 165, 169, 173, 177, 181,
0105     /* 6-7 GHz */
0106     1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45, 49, 53, 57, 61, 65, 69,
0107     73, 77, 81, 85, 89, 93, 97, 101, 105, 109, 113, 117, 121, 125, 129,
0108     133, 137, 141, 145, 149, 153, 157, 161, 165, 169, 173, 177, 181, 185,
0109     189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233
0110 };
0111 
0112 #define IWL_NVM_NUM_CHANNELS        ARRAY_SIZE(iwl_nvm_channels)
0113 #define IWL_NVM_NUM_CHANNELS_EXT    ARRAY_SIZE(iwl_ext_nvm_channels)
0114 #define IWL_NVM_NUM_CHANNELS_UHB    ARRAY_SIZE(iwl_uhb_nvm_channels)
0115 #define NUM_2GHZ_CHANNELS       14
0116 #define NUM_5GHZ_CHANNELS       37
0117 #define FIRST_2GHZ_HT_MINUS     5
0118 #define LAST_2GHZ_HT_PLUS       9
0119 #define N_HW_ADDR_MASK          0xF
0120 
0121 /* rate data (static) */
0122 static struct ieee80211_rate iwl_cfg80211_rates[] = {
0123     { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
0124     { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
0125       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0126     { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
0127       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0128     { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
0129       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0130     { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
0131     { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
0132     { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
0133     { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
0134     { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
0135     { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
0136     { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
0137     { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
0138 };
0139 #define RATES_24_OFFS   0
0140 #define N_RATES_24  ARRAY_SIZE(iwl_cfg80211_rates)
0141 #define RATES_52_OFFS   4
0142 #define N_RATES_52  (N_RATES_24 - RATES_52_OFFS)
0143 
0144 /**
0145  * enum iwl_nvm_channel_flags - channel flags in NVM
0146  * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
0147  * @NVM_CHANNEL_IBSS: usable as an IBSS channel
0148  * @NVM_CHANNEL_ACTIVE: active scanning allowed
0149  * @NVM_CHANNEL_RADAR: radar detection required
0150  * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
0151  * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
0152  *  on same channel on 2.4 or same UNII band on 5.2
0153  * @NVM_CHANNEL_UNIFORM: uniform spreading required
0154  * @NVM_CHANNEL_20MHZ: 20 MHz channel okay
0155  * @NVM_CHANNEL_40MHZ: 40 MHz channel okay
0156  * @NVM_CHANNEL_80MHZ: 80 MHz channel okay
0157  * @NVM_CHANNEL_160MHZ: 160 MHz channel okay
0158  * @NVM_CHANNEL_DC_HIGH: DC HIGH required/allowed (?)
0159  */
0160 enum iwl_nvm_channel_flags {
0161     NVM_CHANNEL_VALID       = BIT(0),
0162     NVM_CHANNEL_IBSS        = BIT(1),
0163     NVM_CHANNEL_ACTIVE      = BIT(3),
0164     NVM_CHANNEL_RADAR       = BIT(4),
0165     NVM_CHANNEL_INDOOR_ONLY     = BIT(5),
0166     NVM_CHANNEL_GO_CONCURRENT   = BIT(6),
0167     NVM_CHANNEL_UNIFORM     = BIT(7),
0168     NVM_CHANNEL_20MHZ       = BIT(8),
0169     NVM_CHANNEL_40MHZ       = BIT(9),
0170     NVM_CHANNEL_80MHZ       = BIT(10),
0171     NVM_CHANNEL_160MHZ      = BIT(11),
0172     NVM_CHANNEL_DC_HIGH     = BIT(12),
0173 };
0174 
0175 /**
0176  * enum iwl_reg_capa_flags - global flags applied for the whole regulatory
0177  * domain.
0178  * @REG_CAPA_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
0179  *  2.4Ghz band is allowed.
0180  * @REG_CAPA_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
0181  *  5Ghz band is allowed.
0182  * @REG_CAPA_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
0183  *  for this regulatory domain (valid only in 5Ghz).
0184  * @REG_CAPA_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
0185  *  for this regulatory domain (valid only in 5Ghz).
0186  * @REG_CAPA_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
0187  * @REG_CAPA_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
0188  * @REG_CAPA_40MHZ_FORBIDDEN: 11n channel with a width of 40Mhz is forbidden
0189  *  for this regulatory domain (valid only in 5Ghz).
0190  * @REG_CAPA_DC_HIGH_ENABLED: DC HIGH allowed.
0191  * @REG_CAPA_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
0192  */
0193 enum iwl_reg_capa_flags {
0194     REG_CAPA_BF_CCD_LOW_BAND    = BIT(0),
0195     REG_CAPA_BF_CCD_HIGH_BAND   = BIT(1),
0196     REG_CAPA_160MHZ_ALLOWED     = BIT(2),
0197     REG_CAPA_80MHZ_ALLOWED      = BIT(3),
0198     REG_CAPA_MCS_8_ALLOWED      = BIT(4),
0199     REG_CAPA_MCS_9_ALLOWED      = BIT(5),
0200     REG_CAPA_40MHZ_FORBIDDEN    = BIT(7),
0201     REG_CAPA_DC_HIGH_ENABLED    = BIT(9),
0202     REG_CAPA_11AX_DISABLED      = BIT(10),
0203 };
0204 
0205 /**
0206  * enum iwl_reg_capa_flags_v2 - global flags applied for the whole regulatory
0207  * domain (version 2).
0208  * @REG_CAPA_V2_STRADDLE_DISABLED: Straddle channels (144, 142, 138) are
0209  *  disabled.
0210  * @REG_CAPA_V2_BF_CCD_LOW_BAND: Beam-forming or Cyclic Delay Diversity in the
0211  *  2.4Ghz band is allowed.
0212  * @REG_CAPA_V2_BF_CCD_HIGH_BAND: Beam-forming or Cyclic Delay Diversity in the
0213  *  5Ghz band is allowed.
0214  * @REG_CAPA_V2_160MHZ_ALLOWED: 11ac channel with a width of 160Mhz is allowed
0215  *  for this regulatory domain (valid only in 5Ghz).
0216  * @REG_CAPA_V2_80MHZ_ALLOWED: 11ac channel with a width of 80Mhz is allowed
0217  *  for this regulatory domain (valid only in 5Ghz).
0218  * @REG_CAPA_V2_MCS_8_ALLOWED: 11ac with MCS 8 is allowed.
0219  * @REG_CAPA_V2_MCS_9_ALLOWED: 11ac with MCS 9 is allowed.
0220  * @REG_CAPA_V2_WEATHER_DISABLED: Weather radar channels (120, 124, 128, 118,
0221  *  126, 122) are disabled.
0222  * @REG_CAPA_V2_40MHZ_ALLOWED: 11n channel with a width of 40Mhz is allowed
0223  *  for this regulatory domain (uvalid only in 5Ghz).
0224  * @REG_CAPA_V2_11AX_DISABLED: 11ax is forbidden for this regulatory domain.
0225  */
0226 enum iwl_reg_capa_flags_v2 {
0227     REG_CAPA_V2_STRADDLE_DISABLED   = BIT(0),
0228     REG_CAPA_V2_BF_CCD_LOW_BAND = BIT(1),
0229     REG_CAPA_V2_BF_CCD_HIGH_BAND    = BIT(2),
0230     REG_CAPA_V2_160MHZ_ALLOWED  = BIT(3),
0231     REG_CAPA_V2_80MHZ_ALLOWED   = BIT(4),
0232     REG_CAPA_V2_MCS_8_ALLOWED   = BIT(5),
0233     REG_CAPA_V2_MCS_9_ALLOWED   = BIT(6),
0234     REG_CAPA_V2_WEATHER_DISABLED    = BIT(7),
0235     REG_CAPA_V2_40MHZ_ALLOWED   = BIT(8),
0236     REG_CAPA_V2_11AX_DISABLED   = BIT(10),
0237 };
0238 
0239 /*
0240 * API v2 for reg_capa_flags is relevant from version 6 and onwards of the
0241 * MCC update command response.
0242 */
0243 #define REG_CAPA_V2_RESP_VER    6
0244 
0245 /**
0246  * struct iwl_reg_capa - struct for global regulatory capabilities, Used for
0247  * handling the different APIs of reg_capa_flags.
0248  *
0249  * @allow_40mhz: 11n channel with a width of 40Mhz is allowed
0250  *  for this regulatory domain (valid only in 5Ghz).
0251  * @allow_80mhz: 11ac channel with a width of 80Mhz is allowed
0252  *  for this regulatory domain (valid only in 5Ghz).
0253  * @allow_160mhz: 11ac channel with a width of 160Mhz is allowed
0254  *  for this regulatory domain (valid only in 5Ghz).
0255  * @disable_11ax: 11ax is forbidden for this regulatory domain.
0256  */
0257 struct iwl_reg_capa {
0258     u16 allow_40mhz;
0259     u16 allow_80mhz;
0260     u16 allow_160mhz;
0261     u16 disable_11ax;
0262 };
0263 
0264 static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
0265                            int chan, u32 flags)
0266 {
0267 #define CHECK_AND_PRINT_I(x)    \
0268     ((flags & NVM_CHANNEL_##x) ? " " #x : "")
0269 
0270     if (!(flags & NVM_CHANNEL_VALID)) {
0271         IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
0272                   chan, flags);
0273         return;
0274     }
0275 
0276     /* Note: already can print up to 101 characters, 110 is the limit! */
0277     IWL_DEBUG_DEV(dev, level,
0278               "Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
0279               chan, flags,
0280               CHECK_AND_PRINT_I(VALID),
0281               CHECK_AND_PRINT_I(IBSS),
0282               CHECK_AND_PRINT_I(ACTIVE),
0283               CHECK_AND_PRINT_I(RADAR),
0284               CHECK_AND_PRINT_I(INDOOR_ONLY),
0285               CHECK_AND_PRINT_I(GO_CONCURRENT),
0286               CHECK_AND_PRINT_I(UNIFORM),
0287               CHECK_AND_PRINT_I(20MHZ),
0288               CHECK_AND_PRINT_I(40MHZ),
0289               CHECK_AND_PRINT_I(80MHZ),
0290               CHECK_AND_PRINT_I(160MHZ),
0291               CHECK_AND_PRINT_I(DC_HIGH));
0292 #undef CHECK_AND_PRINT_I
0293 }
0294 
0295 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band,
0296                  u32 nvm_flags, const struct iwl_cfg *cfg)
0297 {
0298     u32 flags = IEEE80211_CHAN_NO_HT40;
0299 
0300     if (band == NL80211_BAND_2GHZ && (nvm_flags & NVM_CHANNEL_40MHZ)) {
0301         if (ch_num <= LAST_2GHZ_HT_PLUS)
0302             flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
0303         if (ch_num >= FIRST_2GHZ_HT_MINUS)
0304             flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
0305     } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
0306         if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
0307             flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
0308         else
0309             flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
0310     }
0311     if (!(nvm_flags & NVM_CHANNEL_80MHZ))
0312         flags |= IEEE80211_CHAN_NO_80MHZ;
0313     if (!(nvm_flags & NVM_CHANNEL_160MHZ))
0314         flags |= IEEE80211_CHAN_NO_160MHZ;
0315 
0316     if (!(nvm_flags & NVM_CHANNEL_IBSS))
0317         flags |= IEEE80211_CHAN_NO_IR;
0318 
0319     if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
0320         flags |= IEEE80211_CHAN_NO_IR;
0321 
0322     if (nvm_flags & NVM_CHANNEL_RADAR)
0323         flags |= IEEE80211_CHAN_RADAR;
0324 
0325     if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
0326         flags |= IEEE80211_CHAN_INDOOR_ONLY;
0327 
0328     /* Set the GO concurrent flag only in case that NO_IR is set.
0329      * Otherwise it is meaningless
0330      */
0331     if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
0332         (flags & IEEE80211_CHAN_NO_IR))
0333         flags |= IEEE80211_CHAN_IR_CONCURRENT;
0334 
0335     return flags;
0336 }
0337 
0338 static enum nl80211_band iwl_nl80211_band_from_channel_idx(int ch_idx)
0339 {
0340     if (ch_idx >= NUM_2GHZ_CHANNELS + NUM_5GHZ_CHANNELS) {
0341         return NL80211_BAND_6GHZ;
0342     }
0343 
0344     if (ch_idx >= NUM_2GHZ_CHANNELS)
0345         return NL80211_BAND_5GHZ;
0346     return NL80211_BAND_2GHZ;
0347 }
0348 
0349 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
0350                 struct iwl_nvm_data *data,
0351                 const void * const nvm_ch_flags,
0352                 u32 sbands_flags, bool v4)
0353 {
0354     int ch_idx;
0355     int n_channels = 0;
0356     struct ieee80211_channel *channel;
0357     u32 ch_flags;
0358     int num_of_ch;
0359     const u16 *nvm_chan;
0360 
0361     if (cfg->uhb_supported) {
0362         num_of_ch = IWL_NVM_NUM_CHANNELS_UHB;
0363         nvm_chan = iwl_uhb_nvm_channels;
0364     } else if (cfg->nvm_type == IWL_NVM_EXT) {
0365         num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
0366         nvm_chan = iwl_ext_nvm_channels;
0367     } else {
0368         num_of_ch = IWL_NVM_NUM_CHANNELS;
0369         nvm_chan = iwl_nvm_channels;
0370     }
0371 
0372     for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
0373         enum nl80211_band band =
0374             iwl_nl80211_band_from_channel_idx(ch_idx);
0375 
0376         if (v4)
0377             ch_flags =
0378                 __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx);
0379         else
0380             ch_flags =
0381                 __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx);
0382 
0383         if (band == NL80211_BAND_5GHZ &&
0384             !data->sku_cap_band_52ghz_enable)
0385             continue;
0386 
0387         /* workaround to disable wide channels in 5GHz */
0388         if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
0389             band == NL80211_BAND_5GHZ) {
0390             ch_flags &= ~(NVM_CHANNEL_40MHZ |
0391                      NVM_CHANNEL_80MHZ |
0392                      NVM_CHANNEL_160MHZ);
0393         }
0394 
0395         if (ch_flags & NVM_CHANNEL_160MHZ)
0396             data->vht160_supported = true;
0397 
0398         if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
0399             !(ch_flags & NVM_CHANNEL_VALID)) {
0400             /*
0401              * Channels might become valid later if lar is
0402              * supported, hence we still want to add them to
0403              * the list of supported channels to cfg80211.
0404              */
0405             iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
0406                             nvm_chan[ch_idx], ch_flags);
0407             continue;
0408         }
0409 
0410         channel = &data->channels[n_channels];
0411         n_channels++;
0412 
0413         channel->hw_value = nvm_chan[ch_idx];
0414         channel->band = band;
0415         channel->center_freq =
0416             ieee80211_channel_to_frequency(
0417                 channel->hw_value, channel->band);
0418 
0419         /* Initialize regulatory-based run-time data */
0420 
0421         /*
0422          * Default value - highest tx power value.  max_power
0423          * is not used in mvm, and is used for backwards compatibility
0424          */
0425         channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
0426 
0427         /* don't put limitations in case we're using LAR */
0428         if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
0429             channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
0430                                    ch_idx, band,
0431                                    ch_flags, cfg);
0432         else
0433             channel->flags = 0;
0434 
0435         /* TODO: Don't put limitations on UHB devices as we still don't
0436          * have NVM for them
0437          */
0438         if (cfg->uhb_supported)
0439             channel->flags = 0;
0440         iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
0441                         channel->hw_value, ch_flags);
0442         IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
0443                  channel->hw_value, channel->max_power);
0444     }
0445 
0446     return n_channels;
0447 }
0448 
0449 static void iwl_init_vht_hw_capab(struct iwl_trans *trans,
0450                   struct iwl_nvm_data *data,
0451                   struct ieee80211_sta_vht_cap *vht_cap,
0452                   u8 tx_chains, u8 rx_chains)
0453 {
0454     const struct iwl_cfg *cfg = trans->cfg;
0455     int num_rx_ants = num_of_ant(rx_chains);
0456     int num_tx_ants = num_of_ant(tx_chains);
0457 
0458     vht_cap->vht_supported = true;
0459 
0460     vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
0461                IEEE80211_VHT_CAP_RXSTBC_1 |
0462                IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
0463                3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
0464                IEEE80211_VHT_MAX_AMPDU_1024K <<
0465                IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
0466 
0467     if (data->vht160_supported)
0468         vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ |
0469                 IEEE80211_VHT_CAP_SHORT_GI_160;
0470 
0471     if (cfg->vht_mu_mimo_supported)
0472         vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
0473 
0474     if (cfg->ht_params->ldpc)
0475         vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
0476 
0477     if (data->sku_cap_mimo_disabled) {
0478         num_rx_ants = 1;
0479         num_tx_ants = 1;
0480     }
0481 
0482     if (num_tx_ants > 1)
0483         vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
0484     else
0485         vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
0486 
0487     switch (iwlwifi_mod_params.amsdu_size) {
0488     case IWL_AMSDU_DEF:
0489         if (trans->trans_cfg->mq_rx_supported)
0490             vht_cap->cap |=
0491                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
0492         else
0493             vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
0494         break;
0495     case IWL_AMSDU_2K:
0496         if (trans->trans_cfg->mq_rx_supported)
0497             vht_cap->cap |=
0498                 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
0499         else
0500             WARN(1, "RB size of 2K is not supported by this device\n");
0501         break;
0502     case IWL_AMSDU_4K:
0503         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
0504         break;
0505     case IWL_AMSDU_8K:
0506         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
0507         break;
0508     case IWL_AMSDU_12K:
0509         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
0510         break;
0511     default:
0512         break;
0513     }
0514 
0515     vht_cap->vht_mcs.rx_mcs_map =
0516         cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
0517                 IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
0518                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
0519                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
0520                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
0521                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
0522                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
0523                 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
0524 
0525     if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
0526         vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
0527         /* this works because NOT_SUPPORTED == 3 */
0528         vht_cap->vht_mcs.rx_mcs_map |=
0529             cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
0530     }
0531 
0532     vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
0533 
0534     vht_cap->vht_mcs.tx_highest |=
0535         cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
0536 }
0537 
0538 static const u8 iwl_vendor_caps[] = {
0539     0xdd,           /* vendor element */
0540     0x06,           /* length */
0541     0x00, 0x17, 0x35,   /* Intel OUI */
0542     0x08,           /* type (Intel Capabilities) */
0543     /* followed by 16 bits of capabilities */
0544 #define IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE  BIT(0)
0545     IWL_VENDOR_CAP_IMPROVED_BF_FDBK_HE,
0546     0x00
0547 };
0548 
0549 static const struct ieee80211_sband_iftype_data iwl_he_capa[] = {
0550     {
0551         .types_mask = BIT(NL80211_IFTYPE_STATION),
0552         .he_cap = {
0553             .has_he = true,
0554             .he_cap_elem = {
0555                 .mac_cap_info[0] =
0556                     IEEE80211_HE_MAC_CAP0_HTC_HE,
0557                 .mac_cap_info[1] =
0558                     IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
0559                     IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
0560                 .mac_cap_info[2] =
0561                     IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
0562                 .mac_cap_info[3] =
0563                     IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
0564                     IEEE80211_HE_MAC_CAP3_RX_CTRL_FRAME_TO_MULTIBSS,
0565                 .mac_cap_info[4] =
0566                     IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU |
0567                     IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
0568                 .mac_cap_info[5] =
0569                     IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
0570                     IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 |
0571                     IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU |
0572                     IEEE80211_HE_MAC_CAP5_HE_DYNAMIC_SM_PS |
0573                     IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX,
0574                 .phy_cap_info[0] =
0575                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
0576                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
0577                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G,
0578                 .phy_cap_info[1] =
0579                     IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
0580                     IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
0581                     IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
0582                 .phy_cap_info[2] =
0583                     IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
0584                     IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ,
0585                 .phy_cap_info[3] =
0586                     IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK |
0587                     IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
0588                     IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK |
0589                     IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
0590                 .phy_cap_info[4] =
0591                     IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
0592                     IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
0593                     IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
0594                 .phy_cap_info[6] =
0595                     IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
0596                     IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB |
0597                     IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
0598                 .phy_cap_info[7] =
0599                     IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
0600                     IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
0601                 .phy_cap_info[8] =
0602                     IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
0603                     IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
0604                     IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
0605                     IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
0606                     IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
0607                 .phy_cap_info[9] =
0608                     IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
0609                     IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB |
0610                     (IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED <<
0611                     IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS),
0612                 .phy_cap_info[10] =
0613                     IEEE80211_HE_PHY_CAP10_HE_MU_M1RU_MAX_LTF,
0614             },
0615             /*
0616              * Set default Tx/Rx HE MCS NSS Support field.
0617              * Indicate support for up to 2 spatial streams and all
0618              * MCS, without any special cases
0619              */
0620             .he_mcs_nss_supp = {
0621                 .rx_mcs_80 = cpu_to_le16(0xfffa),
0622                 .tx_mcs_80 = cpu_to_le16(0xfffa),
0623                 .rx_mcs_160 = cpu_to_le16(0xfffa),
0624                 .tx_mcs_160 = cpu_to_le16(0xfffa),
0625                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
0626                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
0627             },
0628             /*
0629              * Set default PPE thresholds, with PPET16 set to 0,
0630              * PPET8 set to 7
0631              */
0632             .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
0633         },
0634     },
0635     {
0636         .types_mask = BIT(NL80211_IFTYPE_AP),
0637         .he_cap = {
0638             .has_he = true,
0639             .he_cap_elem = {
0640                 .mac_cap_info[0] =
0641                     IEEE80211_HE_MAC_CAP0_HTC_HE,
0642                 .mac_cap_info[1] =
0643                     IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
0644                     IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
0645                 .mac_cap_info[3] =
0646                     IEEE80211_HE_MAC_CAP3_OMI_CONTROL,
0647                 .phy_cap_info[0] =
0648                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
0649                     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G,
0650                 .phy_cap_info[1] =
0651                     IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD,
0652                 .phy_cap_info[2] =
0653                     IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
0654                     IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US,
0655                 .phy_cap_info[3] =
0656                     IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK |
0657                     IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
0658                     IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK |
0659                     IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
0660                 .phy_cap_info[6] =
0661                     IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
0662                 .phy_cap_info[7] =
0663                     IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI,
0664                 .phy_cap_info[8] =
0665                     IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
0666                     IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_242,
0667                 .phy_cap_info[9] =
0668                     IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED
0669                     << IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_POS,
0670             },
0671             /*
0672              * Set default Tx/Rx HE MCS NSS Support field.
0673              * Indicate support for up to 2 spatial streams and all
0674              * MCS, without any special cases
0675              */
0676             .he_mcs_nss_supp = {
0677                 .rx_mcs_80 = cpu_to_le16(0xfffa),
0678                 .tx_mcs_80 = cpu_to_le16(0xfffa),
0679                 .rx_mcs_160 = cpu_to_le16(0xfffa),
0680                 .tx_mcs_160 = cpu_to_le16(0xfffa),
0681                 .rx_mcs_80p80 = cpu_to_le16(0xffff),
0682                 .tx_mcs_80p80 = cpu_to_le16(0xffff),
0683             },
0684             /*
0685              * Set default PPE thresholds, with PPET16 set to 0,
0686              * PPET8 set to 7
0687              */
0688             .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
0689         },
0690     },
0691 };
0692 
0693 static void iwl_init_he_6ghz_capa(struct iwl_trans *trans,
0694                   struct iwl_nvm_data *data,
0695                   struct ieee80211_supported_band *sband,
0696                   u8 tx_chains, u8 rx_chains)
0697 {
0698     struct ieee80211_sta_ht_cap ht_cap;
0699     struct ieee80211_sta_vht_cap vht_cap = {};
0700     struct ieee80211_sband_iftype_data *iftype_data;
0701     u16 he_6ghz_capa = 0;
0702     u32 exp;
0703     int i;
0704 
0705     if (sband->band != NL80211_BAND_6GHZ)
0706         return;
0707 
0708     /* grab HT/VHT capabilities and calculate HE 6 GHz capabilities */
0709     iwl_init_ht_hw_capab(trans, data, &ht_cap, NL80211_BAND_5GHZ,
0710                  tx_chains, rx_chains);
0711     WARN_ON(!ht_cap.ht_supported);
0712     iwl_init_vht_hw_capab(trans, data, &vht_cap, tx_chains, rx_chains);
0713     WARN_ON(!vht_cap.vht_supported);
0714 
0715     he_6ghz_capa |=
0716         u16_encode_bits(ht_cap.ampdu_density,
0717                 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
0718     exp = u32_get_bits(vht_cap.cap,
0719                IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK);
0720     he_6ghz_capa |=
0721         u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
0722     exp = u32_get_bits(vht_cap.cap, IEEE80211_VHT_CAP_MAX_MPDU_MASK);
0723     he_6ghz_capa |=
0724         u16_encode_bits(exp, IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
0725     /* we don't support extended_ht_cap_info anywhere, so no RD_RESPONDER */
0726     if (vht_cap.cap & IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN)
0727         he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS;
0728     if (vht_cap.cap & IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN)
0729         he_6ghz_capa |= IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
0730 
0731     IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa);
0732 
0733     /* we know it's writable - we set it before ourselves */
0734     iftype_data = (void *)(uintptr_t)sband->iftype_data;
0735     for (i = 0; i < sband->n_iftype_data; i++)
0736         iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa);
0737 }
0738 
0739 static void
0740 iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans,
0741              struct ieee80211_supported_band *sband,
0742              struct ieee80211_sband_iftype_data *iftype_data,
0743              u8 tx_chains, u8 rx_chains,
0744              const struct iwl_fw *fw)
0745 {
0746     bool is_ap = iftype_data->types_mask & BIT(NL80211_IFTYPE_AP);
0747 
0748     /* Advertise an A-MPDU exponent extension based on
0749      * operating band
0750      */
0751     if (sband->band != NL80211_BAND_2GHZ)
0752         iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
0753             IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_1;
0754     else
0755         iftype_data->he_cap.he_cap_elem.mac_cap_info[3] |=
0756             IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
0757 
0758     if (is_ap && iwlwifi_mod_params.nvm_file)
0759         iftype_data->he_cap.he_cap_elem.phy_cap_info[0] |=
0760             IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
0761 
0762     if ((tx_chains & rx_chains) == ANT_AB) {
0763         iftype_data->he_cap.he_cap_elem.phy_cap_info[2] |=
0764             IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ;
0765         iftype_data->he_cap.he_cap_elem.phy_cap_info[5] |=
0766             IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
0767             IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2;
0768         if (!is_ap)
0769             iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
0770                 IEEE80211_HE_PHY_CAP7_MAX_NC_2;
0771     } else if (!is_ap) {
0772         /* If not 2x2, we need to indicate 1x1 in the
0773          * Midamble RX Max NSTS - but not for AP mode
0774          */
0775         iftype_data->he_cap.he_cap_elem.phy_cap_info[1] &=
0776             ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS;
0777         iftype_data->he_cap.he_cap_elem.phy_cap_info[2] &=
0778             ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS;
0779         iftype_data->he_cap.he_cap_elem.phy_cap_info[7] |=
0780             IEEE80211_HE_PHY_CAP7_MAX_NC_1;
0781     }
0782 
0783     switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) {
0784     case IWL_CFG_RF_TYPE_GF:
0785     case IWL_CFG_RF_TYPE_MR:
0786     case IWL_CFG_RF_TYPE_MS:
0787         iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
0788             IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
0789         if (!is_ap)
0790             iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
0791                 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
0792         break;
0793     }
0794 
0795     if (fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_BROADCAST_TWT))
0796         iftype_data->he_cap.he_cap_elem.mac_cap_info[2] |=
0797             IEEE80211_HE_MAC_CAP2_BCAST_TWT;
0798 
0799     if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000 &&
0800         !is_ap) {
0801         iftype_data->vendor_elems.data = iwl_vendor_caps;
0802         iftype_data->vendor_elems.len = ARRAY_SIZE(iwl_vendor_caps);
0803     }
0804 }
0805 
0806 static void iwl_init_he_hw_capab(struct iwl_trans *trans,
0807                  struct iwl_nvm_data *data,
0808                  struct ieee80211_supported_band *sband,
0809                  u8 tx_chains, u8 rx_chains,
0810                  const struct iwl_fw *fw)
0811 {
0812     struct ieee80211_sband_iftype_data *iftype_data;
0813     int i;
0814 
0815     /* should only initialize once */
0816     if (WARN_ON(sband->iftype_data))
0817         return;
0818 
0819     BUILD_BUG_ON(sizeof(data->iftd.low) != sizeof(iwl_he_capa));
0820     BUILD_BUG_ON(sizeof(data->iftd.high) != sizeof(iwl_he_capa));
0821 
0822     switch (sband->band) {
0823     case NL80211_BAND_2GHZ:
0824         iftype_data = data->iftd.low;
0825         break;
0826     case NL80211_BAND_5GHZ:
0827     case NL80211_BAND_6GHZ:
0828         iftype_data = data->iftd.high;
0829         break;
0830     default:
0831         WARN_ON(1);
0832         return;
0833     }
0834 
0835     memcpy(iftype_data, iwl_he_capa, sizeof(iwl_he_capa));
0836 
0837     sband->iftype_data = iftype_data;
0838     sband->n_iftype_data = ARRAY_SIZE(iwl_he_capa);
0839 
0840     for (i = 0; i < sband->n_iftype_data; i++)
0841         iwl_nvm_fixup_sband_iftd(trans, sband, &iftype_data[i],
0842                      tx_chains, rx_chains, fw);
0843 
0844     iwl_init_he_6ghz_capa(trans, data, sband, tx_chains, rx_chains);
0845 }
0846 
0847 static void iwl_init_sbands(struct iwl_trans *trans,
0848                 struct iwl_nvm_data *data,
0849                 const void *nvm_ch_flags, u8 tx_chains,
0850                 u8 rx_chains, u32 sbands_flags, bool v4,
0851                 const struct iwl_fw *fw)
0852 {
0853     struct device *dev = trans->dev;
0854     const struct iwl_cfg *cfg = trans->cfg;
0855     int n_channels;
0856     int n_used = 0;
0857     struct ieee80211_supported_band *sband;
0858 
0859     n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
0860                       sbands_flags, v4);
0861     sband = &data->bands[NL80211_BAND_2GHZ];
0862     sband->band = NL80211_BAND_2GHZ;
0863     sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
0864     sband->n_bitrates = N_RATES_24;
0865     n_used += iwl_init_sband_channels(data, sband, n_channels,
0866                       NL80211_BAND_2GHZ);
0867     iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
0868                  tx_chains, rx_chains);
0869 
0870     if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
0871         iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
0872                      fw);
0873 
0874     sband = &data->bands[NL80211_BAND_5GHZ];
0875     sband->band = NL80211_BAND_5GHZ;
0876     sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
0877     sband->n_bitrates = N_RATES_52;
0878     n_used += iwl_init_sband_channels(data, sband, n_channels,
0879                       NL80211_BAND_5GHZ);
0880     iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
0881                  tx_chains, rx_chains);
0882     if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
0883         iwl_init_vht_hw_capab(trans, data, &sband->vht_cap,
0884                       tx_chains, rx_chains);
0885 
0886     if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
0887         iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
0888                      fw);
0889 
0890     /* 6GHz band. */
0891     sband = &data->bands[NL80211_BAND_6GHZ];
0892     sband->band = NL80211_BAND_6GHZ;
0893     /* use the same rates as 5GHz band */
0894     sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
0895     sband->n_bitrates = N_RATES_52;
0896     n_used += iwl_init_sband_channels(data, sband, n_channels,
0897                       NL80211_BAND_6GHZ);
0898 
0899     if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
0900         iwl_init_he_hw_capab(trans, data, sband, tx_chains, rx_chains,
0901                      fw);
0902     else
0903         sband->n_channels = 0;
0904     if (n_channels != n_used)
0905         IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
0906                 n_used, n_channels);
0907 }
0908 
0909 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
0910                const __le16 *phy_sku)
0911 {
0912     if (cfg->nvm_type != IWL_NVM_EXT)
0913         return le16_to_cpup(nvm_sw + SKU);
0914 
0915     return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000));
0916 }
0917 
0918 static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
0919 {
0920     if (cfg->nvm_type != IWL_NVM_EXT)
0921         return le16_to_cpup(nvm_sw + NVM_VERSION);
0922     else
0923         return le32_to_cpup((const __le32 *)(nvm_sw +
0924                              NVM_VERSION_EXT_NVM));
0925 }
0926 
0927 static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
0928                  const __le16 *phy_sku)
0929 {
0930     if (cfg->nvm_type != IWL_NVM_EXT)
0931         return le16_to_cpup(nvm_sw + RADIO_CFG);
0932 
0933     return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
0934 
0935 }
0936 
0937 static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
0938 {
0939     int n_hw_addr;
0940 
0941     if (cfg->nvm_type != IWL_NVM_EXT)
0942         return le16_to_cpup(nvm_sw + N_HW_ADDRS);
0943 
0944     n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
0945 
0946     return n_hw_addr & N_HW_ADDR_MASK;
0947 }
0948 
0949 static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
0950                   struct iwl_nvm_data *data,
0951                   u32 radio_cfg)
0952 {
0953     if (cfg->nvm_type != IWL_NVM_EXT) {
0954         data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
0955         data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
0956         data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
0957         data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
0958         return;
0959     }
0960 
0961     /* set the radio configuration for family 8000 */
0962     data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
0963     data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
0964     data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
0965     data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
0966     data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
0967     data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
0968 }
0969 
0970 static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
0971 {
0972     const u8 *hw_addr;
0973 
0974     hw_addr = (const u8 *)&mac_addr0;
0975     dest[0] = hw_addr[3];
0976     dest[1] = hw_addr[2];
0977     dest[2] = hw_addr[1];
0978     dest[3] = hw_addr[0];
0979 
0980     hw_addr = (const u8 *)&mac_addr1;
0981     dest[4] = hw_addr[1];
0982     dest[5] = hw_addr[0];
0983 }
0984 
0985 static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
0986                     struct iwl_nvm_data *data)
0987 {
0988     __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans,
0989                           CSR_MAC_ADDR0_STRAP(trans)));
0990     __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans,
0991                           CSR_MAC_ADDR1_STRAP(trans)));
0992 
0993     iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
0994     /*
0995      * If the OEM fused a valid address, use it instead of the one in the
0996      * OTP
0997      */
0998     if (is_valid_ether_addr(data->hw_addr))
0999         return;
1000 
1001     mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP(trans)));
1002     mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP(trans)));
1003 
1004     iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1005 }
1006 
1007 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
1008                        const struct iwl_cfg *cfg,
1009                        struct iwl_nvm_data *data,
1010                        const __le16 *mac_override,
1011                        const __be16 *nvm_hw)
1012 {
1013     const u8 *hw_addr;
1014 
1015     if (mac_override) {
1016         static const u8 reserved_mac[] = {
1017             0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
1018         };
1019 
1020         hw_addr = (const u8 *)(mac_override +
1021                  MAC_ADDRESS_OVERRIDE_EXT_NVM);
1022 
1023         /*
1024          * Store the MAC address from MAO section.
1025          * No byte swapping is required in MAO section
1026          */
1027         memcpy(data->hw_addr, hw_addr, ETH_ALEN);
1028 
1029         /*
1030          * Force the use of the OTP MAC address in case of reserved MAC
1031          * address in the NVM, or if address is given but invalid.
1032          */
1033         if (is_valid_ether_addr(data->hw_addr) &&
1034             memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
1035             return;
1036 
1037         IWL_ERR(trans,
1038             "mac address from nvm override section is not valid\n");
1039     }
1040 
1041     if (nvm_hw) {
1042         /* read the mac address from WFMP registers */
1043         __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
1044                         WFMP_MAC_ADDR_0));
1045         __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
1046                         WFMP_MAC_ADDR_1));
1047 
1048         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
1049 
1050         return;
1051     }
1052 
1053     IWL_ERR(trans, "mac address is not found\n");
1054 }
1055 
1056 static int iwl_set_hw_address(struct iwl_trans *trans,
1057                   const struct iwl_cfg *cfg,
1058                   struct iwl_nvm_data *data, const __be16 *nvm_hw,
1059                   const __le16 *mac_override)
1060 {
1061     if (cfg->mac_addr_from_csr) {
1062         iwl_set_hw_address_from_csr(trans, data);
1063     } else if (cfg->nvm_type != IWL_NVM_EXT) {
1064         const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
1065 
1066         /* The byte order is little endian 16 bit, meaning 214365 */
1067         data->hw_addr[0] = hw_addr[1];
1068         data->hw_addr[1] = hw_addr[0];
1069         data->hw_addr[2] = hw_addr[3];
1070         data->hw_addr[3] = hw_addr[2];
1071         data->hw_addr[4] = hw_addr[5];
1072         data->hw_addr[5] = hw_addr[4];
1073     } else {
1074         iwl_set_hw_address_family_8000(trans, cfg, data,
1075                            mac_override, nvm_hw);
1076     }
1077 
1078     if (!is_valid_ether_addr(data->hw_addr)) {
1079         IWL_ERR(trans, "no valid mac address was found\n");
1080         return -EINVAL;
1081     }
1082 
1083     if (!trans->csme_own)
1084         IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n",
1085              data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR));
1086 
1087     return 0;
1088 }
1089 
1090 static bool
1091 iwl_nvm_no_wide_in_5ghz(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1092             const __be16 *nvm_hw)
1093 {
1094     /*
1095      * Workaround a bug in Indonesia SKUs where the regulatory in
1096      * some 7000-family OTPs erroneously allow wide channels in
1097      * 5GHz.  To check for Indonesia, we take the SKU value from
1098      * bits 1-4 in the subsystem ID and check if it is either 5 or
1099      * 9.  In those cases, we need to force-disable wide channels
1100      * in 5GHz otherwise the FW will throw a sysassert when we try
1101      * to use them.
1102      */
1103     if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
1104         /*
1105          * Unlike the other sections in the NVM, the hw
1106          * section uses big-endian.
1107          */
1108         u16 subsystem_id = be16_to_cpup(nvm_hw + SUBSYSTEM_ID);
1109         u8 sku = (subsystem_id & 0x1e) >> 1;
1110 
1111         if (sku == 5 || sku == 9) {
1112             IWL_DEBUG_EEPROM(trans->dev,
1113                      "disabling wide channels in 5GHz (0x%0x %d)\n",
1114                      subsystem_id, sku);
1115             return true;
1116         }
1117     }
1118 
1119     return false;
1120 }
1121 
1122 struct iwl_nvm_data *
1123 iwl_parse_mei_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1124                const struct iwl_mei_nvm *mei_nvm,
1125                const struct iwl_fw *fw)
1126 {
1127     struct iwl_nvm_data *data;
1128     u32 sbands_flags = 0;
1129     u8 rx_chains = fw->valid_rx_ant;
1130     u8 tx_chains = fw->valid_rx_ant;
1131 
1132     if (cfg->uhb_supported)
1133         data = kzalloc(struct_size(data, channels,
1134                        IWL_NVM_NUM_CHANNELS_UHB),
1135                        GFP_KERNEL);
1136     else
1137         data = kzalloc(struct_size(data, channels,
1138                        IWL_NVM_NUM_CHANNELS_EXT),
1139                        GFP_KERNEL);
1140     if (!data)
1141         return NULL;
1142 
1143     BUILD_BUG_ON(ARRAY_SIZE(mei_nvm->channels) !=
1144              IWL_NVM_NUM_CHANNELS_UHB);
1145     data->nvm_version = mei_nvm->nvm_version;
1146 
1147     iwl_set_radio_cfg(cfg, data, mei_nvm->radio_cfg);
1148     if (data->valid_tx_ant)
1149         tx_chains &= data->valid_tx_ant;
1150     if (data->valid_rx_ant)
1151         rx_chains &= data->valid_rx_ant;
1152 
1153     data->sku_cap_mimo_disabled = false;
1154     data->sku_cap_band_24ghz_enable = true;
1155     data->sku_cap_band_52ghz_enable = true;
1156     data->sku_cap_11n_enable =
1157         !(iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL);
1158     data->sku_cap_11ac_enable = true;
1159     data->sku_cap_11ax_enable =
1160         mei_nvm->caps & MEI_NVM_CAPS_11AX_SUPPORT;
1161 
1162     data->lar_enabled = mei_nvm->caps & MEI_NVM_CAPS_LARI_SUPPORT;
1163 
1164     data->n_hw_addrs = mei_nvm->n_hw_addrs;
1165     /* If no valid mac address was found - bail out */
1166     if (iwl_set_hw_address(trans, cfg, data, NULL, NULL)) {
1167         kfree(data);
1168         return NULL;
1169     }
1170 
1171     if (data->lar_enabled &&
1172         fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT))
1173         sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1174 
1175     iwl_init_sbands(trans, data, mei_nvm->channels, tx_chains, rx_chains,
1176             sbands_flags, true, fw);
1177 
1178     return data;
1179 }
1180 IWL_EXPORT_SYMBOL(iwl_parse_mei_nvm_data);
1181 
1182 struct iwl_nvm_data *
1183 iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
1184            const struct iwl_fw *fw,
1185            const __be16 *nvm_hw, const __le16 *nvm_sw,
1186            const __le16 *nvm_calib, const __le16 *regulatory,
1187            const __le16 *mac_override, const __le16 *phy_sku,
1188            u8 tx_chains, u8 rx_chains)
1189 {
1190     struct iwl_nvm_data *data;
1191     bool lar_enabled;
1192     u32 sku, radio_cfg;
1193     u32 sbands_flags = 0;
1194     u16 lar_config;
1195     const __le16 *ch_section;
1196 
1197     if (cfg->uhb_supported)
1198         data = kzalloc(struct_size(data, channels,
1199                        IWL_NVM_NUM_CHANNELS_UHB),
1200                        GFP_KERNEL);
1201     else if (cfg->nvm_type != IWL_NVM_EXT)
1202         data = kzalloc(struct_size(data, channels,
1203                        IWL_NVM_NUM_CHANNELS),
1204                        GFP_KERNEL);
1205     else
1206         data = kzalloc(struct_size(data, channels,
1207                        IWL_NVM_NUM_CHANNELS_EXT),
1208                        GFP_KERNEL);
1209     if (!data)
1210         return NULL;
1211 
1212     data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
1213 
1214     radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
1215     iwl_set_radio_cfg(cfg, data, radio_cfg);
1216     if (data->valid_tx_ant)
1217         tx_chains &= data->valid_tx_ant;
1218     if (data->valid_rx_ant)
1219         rx_chains &= data->valid_rx_ant;
1220 
1221     sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
1222     data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
1223     data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
1224     data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
1225     if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
1226         data->sku_cap_11n_enable = false;
1227     data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
1228                     (sku & NVM_SKU_CAP_11AC_ENABLE);
1229     data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
1230 
1231     data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
1232 
1233     if (cfg->nvm_type != IWL_NVM_EXT) {
1234         /* Checking for required sections */
1235         if (!nvm_calib) {
1236             IWL_ERR(trans,
1237                 "Can't parse empty Calib NVM sections\n");
1238             kfree(data);
1239             return NULL;
1240         }
1241 
1242         ch_section = cfg->nvm_type == IWL_NVM_SDP ?
1243                  &regulatory[NVM_CHANNELS_SDP] :
1244                  &nvm_sw[NVM_CHANNELS];
1245 
1246         /* in family 8000 Xtal calibration values moved to OTP */
1247         data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
1248         data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
1249         lar_enabled = true;
1250     } else {
1251         u16 lar_offset = data->nvm_version < 0xE39 ?
1252                  NVM_LAR_OFFSET_OLD :
1253                  NVM_LAR_OFFSET;
1254 
1255         lar_config = le16_to_cpup(regulatory + lar_offset);
1256         data->lar_enabled = !!(lar_config &
1257                        NVM_LAR_ENABLED);
1258         lar_enabled = data->lar_enabled;
1259         ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
1260     }
1261 
1262     /* If no valid mac address was found - bail out */
1263     if (iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override)) {
1264         kfree(data);
1265         return NULL;
1266     }
1267 
1268     if (lar_enabled &&
1269         fw_has_capa(&fw->ucode_capa, IWL_UCODE_TLV_CAPA_LAR_SUPPORT))
1270         sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1271 
1272     if (iwl_nvm_no_wide_in_5ghz(trans, cfg, nvm_hw))
1273         sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
1274 
1275     iwl_init_sbands(trans, data, ch_section, tx_chains, rx_chains,
1276             sbands_flags, false, fw);
1277     data->calib_version = 255;
1278 
1279     return data;
1280 }
1281 IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
1282 
1283 static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
1284                        int ch_idx, u16 nvm_flags,
1285                        struct iwl_reg_capa reg_capa,
1286                        const struct iwl_cfg *cfg)
1287 {
1288     u32 flags = NL80211_RRF_NO_HT40;
1289 
1290     if (ch_idx < NUM_2GHZ_CHANNELS &&
1291         (nvm_flags & NVM_CHANNEL_40MHZ)) {
1292         if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
1293             flags &= ~NL80211_RRF_NO_HT40PLUS;
1294         if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
1295             flags &= ~NL80211_RRF_NO_HT40MINUS;
1296     } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
1297         if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
1298             flags &= ~NL80211_RRF_NO_HT40PLUS;
1299         else
1300             flags &= ~NL80211_RRF_NO_HT40MINUS;
1301     }
1302 
1303     if (!(nvm_flags & NVM_CHANNEL_80MHZ))
1304         flags |= NL80211_RRF_NO_80MHZ;
1305     if (!(nvm_flags & NVM_CHANNEL_160MHZ))
1306         flags |= NL80211_RRF_NO_160MHZ;
1307 
1308     if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
1309         flags |= NL80211_RRF_NO_IR;
1310 
1311     if (nvm_flags & NVM_CHANNEL_RADAR)
1312         flags |= NL80211_RRF_DFS;
1313 
1314     if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
1315         flags |= NL80211_RRF_NO_OUTDOOR;
1316 
1317     /* Set the GO concurrent flag only in case that NO_IR is set.
1318      * Otherwise it is meaningless
1319      */
1320     if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
1321         (flags & NL80211_RRF_NO_IR))
1322         flags |= NL80211_RRF_GO_CONCURRENT;
1323 
1324     /*
1325      * reg_capa is per regulatory domain so apply it for every channel
1326      */
1327     if (ch_idx >= NUM_2GHZ_CHANNELS) {
1328         if (!reg_capa.allow_40mhz)
1329             flags |= NL80211_RRF_NO_HT40;
1330 
1331         if (!reg_capa.allow_80mhz)
1332             flags |= NL80211_RRF_NO_80MHZ;
1333 
1334         if (!reg_capa.allow_160mhz)
1335             flags |= NL80211_RRF_NO_160MHZ;
1336     }
1337     if (reg_capa.disable_11ax)
1338         flags |= NL80211_RRF_NO_HE;
1339 
1340     return flags;
1341 }
1342 
1343 static struct iwl_reg_capa iwl_get_reg_capa(u16 flags, u8 resp_ver)
1344 {
1345     struct iwl_reg_capa reg_capa;
1346 
1347     if (resp_ver >= REG_CAPA_V2_RESP_VER) {
1348         reg_capa.allow_40mhz = flags & REG_CAPA_V2_40MHZ_ALLOWED;
1349         reg_capa.allow_80mhz = flags & REG_CAPA_V2_80MHZ_ALLOWED;
1350         reg_capa.allow_160mhz = flags & REG_CAPA_V2_160MHZ_ALLOWED;
1351         reg_capa.disable_11ax = flags & REG_CAPA_V2_11AX_DISABLED;
1352     } else {
1353         reg_capa.allow_40mhz = !(flags & REG_CAPA_40MHZ_FORBIDDEN);
1354         reg_capa.allow_80mhz = flags & REG_CAPA_80MHZ_ALLOWED;
1355         reg_capa.allow_160mhz = flags & REG_CAPA_160MHZ_ALLOWED;
1356         reg_capa.disable_11ax = flags & REG_CAPA_11AX_DISABLED;
1357     }
1358     return reg_capa;
1359 }
1360 
1361 struct ieee80211_regdomain *
1362 iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
1363                int num_of_ch, __le32 *channels, u16 fw_mcc,
1364                u16 geo_info, u16 cap, u8 resp_ver)
1365 {
1366     int ch_idx;
1367     u16 ch_flags;
1368     u32 reg_rule_flags, prev_reg_rule_flags = 0;
1369     const u16 *nvm_chan;
1370     struct ieee80211_regdomain *regd, *copy_rd;
1371     struct ieee80211_reg_rule *rule;
1372     enum nl80211_band band;
1373     int center_freq, prev_center_freq = 0;
1374     int valid_rules = 0;
1375     bool new_rule;
1376     int max_num_ch;
1377     struct iwl_reg_capa reg_capa;
1378 
1379     if (cfg->uhb_supported) {
1380         max_num_ch = IWL_NVM_NUM_CHANNELS_UHB;
1381         nvm_chan = iwl_uhb_nvm_channels;
1382     } else if (cfg->nvm_type == IWL_NVM_EXT) {
1383         max_num_ch = IWL_NVM_NUM_CHANNELS_EXT;
1384         nvm_chan = iwl_ext_nvm_channels;
1385     } else {
1386         max_num_ch = IWL_NVM_NUM_CHANNELS;
1387         nvm_chan = iwl_nvm_channels;
1388     }
1389 
1390     if (num_of_ch > max_num_ch) {
1391         IWL_DEBUG_DEV(dev, IWL_DL_LAR,
1392                   "Num of channels (%d) is greater than expected. Truncating to %d\n",
1393                   num_of_ch, max_num_ch);
1394         num_of_ch = max_num_ch;
1395     }
1396 
1397     if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
1398         return ERR_PTR(-EINVAL);
1399 
1400     IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
1401               num_of_ch);
1402 
1403     /* build a regdomain rule for every valid channel */
1404     regd = kzalloc(struct_size(regd, reg_rules, num_of_ch), GFP_KERNEL);
1405     if (!regd)
1406         return ERR_PTR(-ENOMEM);
1407 
1408     /* set alpha2 from FW. */
1409     regd->alpha2[0] = fw_mcc >> 8;
1410     regd->alpha2[1] = fw_mcc & 0xff;
1411 
1412     /* parse regulatory capability flags */
1413     reg_capa = iwl_get_reg_capa(cap, resp_ver);
1414 
1415     for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
1416         ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
1417         band = iwl_nl80211_band_from_channel_idx(ch_idx);
1418         center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
1419                                  band);
1420         new_rule = false;
1421 
1422         if (!(ch_flags & NVM_CHANNEL_VALID)) {
1423             iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1424                             nvm_chan[ch_idx], ch_flags);
1425             continue;
1426         }
1427 
1428         reg_rule_flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
1429                                  ch_flags, reg_capa,
1430                                  cfg);
1431 
1432         /* we can't continue the same rule */
1433         if (ch_idx == 0 || prev_reg_rule_flags != reg_rule_flags ||
1434             center_freq - prev_center_freq > 20) {
1435             valid_rules++;
1436             new_rule = true;
1437         }
1438 
1439         rule = &regd->reg_rules[valid_rules - 1];
1440 
1441         if (new_rule)
1442             rule->freq_range.start_freq_khz =
1443                         MHZ_TO_KHZ(center_freq - 10);
1444 
1445         rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
1446 
1447         /* this doesn't matter - not used by FW */
1448         rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1449         rule->power_rule.max_eirp =
1450             DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1451 
1452         rule->flags = reg_rule_flags;
1453 
1454         /* rely on auto-calculation to merge BW of contiguous chans */
1455         rule->flags |= NL80211_RRF_AUTO_BW;
1456         rule->freq_range.max_bandwidth_khz = 0;
1457 
1458         prev_center_freq = center_freq;
1459         prev_reg_rule_flags = reg_rule_flags;
1460 
1461         iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
1462                         nvm_chan[ch_idx], ch_flags);
1463 
1464         if (!(geo_info & GEO_WMM_ETSI_5GHZ_INFO) ||
1465             band == NL80211_BAND_2GHZ)
1466             continue;
1467 
1468         reg_query_regdb_wmm(regd->alpha2, center_freq, rule);
1469     }
1470 
1471     /*
1472      * Certain firmware versions might report no valid channels
1473      * if booted in RF-kill, i.e. not all calibrations etc. are
1474      * running. We'll get out of this situation later when the
1475      * rfkill is removed and we update the regdomain again, but
1476      * since cfg80211 doesn't accept an empty regdomain, add a
1477      * dummy (unusable) rule here in this case so we can init.
1478      */
1479     if (!valid_rules) {
1480         valid_rules = 1;
1481         rule = &regd->reg_rules[valid_rules - 1];
1482         rule->freq_range.start_freq_khz = MHZ_TO_KHZ(2412);
1483         rule->freq_range.end_freq_khz = MHZ_TO_KHZ(2413);
1484         rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(1);
1485         rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
1486         rule->power_rule.max_eirp =
1487             DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
1488     }
1489 
1490     regd->n_reg_rules = valid_rules;
1491 
1492     /*
1493      * Narrow down regdom for unused regulatory rules to prevent hole
1494      * between reg rules to wmm rules.
1495      */
1496     copy_rd = kmemdup(regd, struct_size(regd, reg_rules, valid_rules),
1497               GFP_KERNEL);
1498     if (!copy_rd)
1499         copy_rd = ERR_PTR(-ENOMEM);
1500 
1501     kfree(regd);
1502     return copy_rd;
1503 }
1504 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
1505 
1506 #define IWL_MAX_NVM_SECTION_SIZE    0x1b58
1507 #define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
1508 #define MAX_NVM_FILE_LEN    16384
1509 
1510 void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
1511             unsigned int len)
1512 {
1513 #define IWL_4165_DEVICE_ID  0x5501
1514 #define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
1515 
1516     if (section == NVM_SECTION_TYPE_PHY_SKU &&
1517         hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
1518         (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
1519         /* OTP 0x52 bug work around: it's a 1x1 device */
1520         data[3] = ANT_B | (ANT_B << 4);
1521 }
1522 IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
1523 
1524 /*
1525  * Reads external NVM from a file into mvm->nvm_sections
1526  *
1527  * HOW TO CREATE THE NVM FILE FORMAT:
1528  * ------------------------------
1529  * 1. create hex file, format:
1530  *      3800 -> header
1531  *      0000 -> header
1532  *      5a40 -> data
1533  *
1534  *   rev - 6 bit (word1)
1535  *   len - 10 bit (word1)
1536  *   id - 4 bit (word2)
1537  *   rsv - 12 bit (word2)
1538  *
1539  * 2. flip 8bits with 8 bits per line to get the right NVM file format
1540  *
1541  * 3. create binary file from the hex file
1542  *
1543  * 4. save as "iNVM_xxx.bin" under /lib/firmware
1544  */
1545 int iwl_read_external_nvm(struct iwl_trans *trans,
1546               const char *nvm_file_name,
1547               struct iwl_nvm_section *nvm_sections)
1548 {
1549     int ret, section_size;
1550     u16 section_id;
1551     const struct firmware *fw_entry;
1552     const struct {
1553         __le16 word1;
1554         __le16 word2;
1555         u8 data[];
1556     } *file_sec;
1557     const u8 *eof;
1558     u8 *temp;
1559     int max_section_size;
1560     const __le32 *dword_buff;
1561 
1562 #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
1563 #define NVM_WORD2_ID(x) (x >> 12)
1564 #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
1565 #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
1566 #define NVM_HEADER_0    (0x2A504C54)
1567 #define NVM_HEADER_1    (0x4E564D2A)
1568 #define NVM_HEADER_SIZE (4 * sizeof(u32))
1569 
1570     IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
1571 
1572     /* Maximal size depends on NVM version */
1573     if (trans->cfg->nvm_type != IWL_NVM_EXT)
1574         max_section_size = IWL_MAX_NVM_SECTION_SIZE;
1575     else
1576         max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
1577 
1578     /*
1579      * Obtain NVM image via request_firmware. Since we already used
1580      * request_firmware_nowait() for the firmware binary load and only
1581      * get here after that we assume the NVM request can be satisfied
1582      * synchronously.
1583      */
1584     ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
1585     if (ret) {
1586         IWL_ERR(trans, "ERROR: %s isn't available %d\n",
1587             nvm_file_name, ret);
1588         return ret;
1589     }
1590 
1591     IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
1592          nvm_file_name, fw_entry->size);
1593 
1594     if (fw_entry->size > MAX_NVM_FILE_LEN) {
1595         IWL_ERR(trans, "NVM file too large\n");
1596         ret = -EINVAL;
1597         goto out;
1598     }
1599 
1600     eof = fw_entry->data + fw_entry->size;
1601     dword_buff = (const __le32 *)fw_entry->data;
1602 
1603     /* some NVM file will contain a header.
1604      * The header is identified by 2 dwords header as follow:
1605      * dword[0] = 0x2A504C54
1606      * dword[1] = 0x4E564D2A
1607      *
1608      * This header must be skipped when providing the NVM data to the FW.
1609      */
1610     if (fw_entry->size > NVM_HEADER_SIZE &&
1611         dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
1612         dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
1613         file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE);
1614         IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
1615         IWL_INFO(trans, "NVM Manufacturing date %08X\n",
1616              le32_to_cpu(dword_buff[3]));
1617 
1618         /* nvm file validation, dword_buff[2] holds the file version */
1619         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
1620             trans->hw_rev_step == SILICON_C_STEP &&
1621             le32_to_cpu(dword_buff[2]) < 0xE4A) {
1622             ret = -EFAULT;
1623             goto out;
1624         }
1625     } else {
1626         file_sec = (const void *)fw_entry->data;
1627     }
1628 
1629     while (true) {
1630         if (file_sec->data > eof) {
1631             IWL_ERR(trans,
1632                 "ERROR - NVM file too short for section header\n");
1633             ret = -EINVAL;
1634             break;
1635         }
1636 
1637         /* check for EOF marker */
1638         if (!file_sec->word1 && !file_sec->word2) {
1639             ret = 0;
1640             break;
1641         }
1642 
1643         if (trans->cfg->nvm_type != IWL_NVM_EXT) {
1644             section_size =
1645                 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
1646             section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
1647         } else {
1648             section_size = 2 * EXT_NVM_WORD2_LEN(
1649                         le16_to_cpu(file_sec->word2));
1650             section_id = EXT_NVM_WORD1_ID(
1651                         le16_to_cpu(file_sec->word1));
1652         }
1653 
1654         if (section_size > max_section_size) {
1655             IWL_ERR(trans, "ERROR - section too large (%d)\n",
1656                 section_size);
1657             ret = -EINVAL;
1658             break;
1659         }
1660 
1661         if (!section_size) {
1662             IWL_ERR(trans, "ERROR - section empty\n");
1663             ret = -EINVAL;
1664             break;
1665         }
1666 
1667         if (file_sec->data + section_size > eof) {
1668             IWL_ERR(trans,
1669                 "ERROR - NVM file too short for section (%d bytes)\n",
1670                 section_size);
1671             ret = -EINVAL;
1672             break;
1673         }
1674 
1675         if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
1676              "Invalid NVM section ID %d\n", section_id)) {
1677             ret = -EINVAL;
1678             break;
1679         }
1680 
1681         temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
1682         if (!temp) {
1683             ret = -ENOMEM;
1684             break;
1685         }
1686 
1687         iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
1688 
1689         kfree(nvm_sections[section_id].data);
1690         nvm_sections[section_id].data = temp;
1691         nvm_sections[section_id].length = section_size;
1692 
1693         /* advance to the next section */
1694         file_sec = (const void *)(file_sec->data + section_size);
1695     }
1696 out:
1697     release_firmware(fw_entry);
1698     return ret;
1699 }
1700 IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
1701 
1702 struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
1703                  const struct iwl_fw *fw)
1704 {
1705     struct iwl_nvm_get_info cmd = {};
1706     struct iwl_nvm_data *nvm;
1707     struct iwl_host_cmd hcmd = {
1708         .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
1709         .data = { &cmd, },
1710         .len = { sizeof(cmd) },
1711         .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
1712     };
1713     int  ret;
1714     bool empty_otp;
1715     u32 mac_flags;
1716     u32 sbands_flags = 0;
1717     /*
1718      * All the values in iwl_nvm_get_info_rsp v4 are the same as
1719      * in v3, except for the channel profile part of the
1720      * regulatory.  So we can just access the new struct, with the
1721      * exception of the latter.
1722      */
1723     struct iwl_nvm_get_info_rsp *rsp;
1724     struct iwl_nvm_get_info_rsp_v3 *rsp_v3;
1725     bool v4 = fw_has_api(&fw->ucode_capa,
1726                  IWL_UCODE_TLV_API_REGULATORY_NVM_INFO);
1727     size_t rsp_size = v4 ? sizeof(*rsp) : sizeof(*rsp_v3);
1728     void *channel_profile;
1729 
1730     ret = iwl_trans_send_cmd(trans, &hcmd);
1731     if (ret)
1732         return ERR_PTR(ret);
1733 
1734     if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != rsp_size,
1735          "Invalid payload len in NVM response from FW %d",
1736          iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
1737         ret = -EINVAL;
1738         goto out;
1739     }
1740 
1741     rsp = (void *)hcmd.resp_pkt->data;
1742     empty_otp = !!(le32_to_cpu(rsp->general.flags) &
1743                NVM_GENERAL_FLAGS_EMPTY_OTP);
1744     if (empty_otp)
1745         IWL_INFO(trans, "OTP is empty\n");
1746 
1747     nvm = kzalloc(struct_size(nvm, channels, IWL_NUM_CHANNELS), GFP_KERNEL);
1748     if (!nvm) {
1749         ret = -ENOMEM;
1750         goto out;
1751     }
1752 
1753     iwl_set_hw_address_from_csr(trans, nvm);
1754     /* TODO: if platform NVM has MAC address - override it here */
1755 
1756     if (!is_valid_ether_addr(nvm->hw_addr)) {
1757         IWL_ERR(trans, "no valid mac address was found\n");
1758         ret = -EINVAL;
1759         goto err_free;
1760     }
1761 
1762     IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
1763 
1764     /* Initialize general data */
1765     nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
1766     nvm->n_hw_addrs = rsp->general.n_hw_addrs;
1767     if (nvm->n_hw_addrs == 0)
1768         IWL_WARN(trans,
1769              "Firmware declares no reserved mac addresses. OTP is empty: %d\n",
1770              empty_otp);
1771 
1772     /* Initialize MAC sku data */
1773     mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
1774     nvm->sku_cap_11ac_enable =
1775         !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
1776     nvm->sku_cap_11n_enable =
1777         !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
1778     nvm->sku_cap_11ax_enable =
1779         !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED);
1780     nvm->sku_cap_band_24ghz_enable =
1781         !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
1782     nvm->sku_cap_band_52ghz_enable =
1783         !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
1784     nvm->sku_cap_mimo_disabled =
1785         !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
1786 
1787     /* Initialize PHY sku data */
1788     nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
1789     nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
1790 
1791     if (le32_to_cpu(rsp->regulatory.lar_enabled) &&
1792         fw_has_capa(&fw->ucode_capa,
1793             IWL_UCODE_TLV_CAPA_LAR_SUPPORT)) {
1794         nvm->lar_enabled = true;
1795         sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
1796     }
1797 
1798     rsp_v3 = (void *)rsp;
1799     channel_profile = v4 ? (void *)rsp->regulatory.channel_profile :
1800               (void *)rsp_v3->regulatory.channel_profile;
1801 
1802     iwl_init_sbands(trans, nvm,
1803             channel_profile,
1804             nvm->valid_tx_ant & fw->valid_tx_ant,
1805             nvm->valid_rx_ant & fw->valid_rx_ant,
1806             sbands_flags, v4, fw);
1807 
1808     iwl_free_resp(&hcmd);
1809     return nvm;
1810 
1811 err_free:
1812     kfree(nvm);
1813 out:
1814     iwl_free_resp(&hcmd);
1815     return ERR_PTR(ret);
1816 }
1817 IWL_EXPORT_SYMBOL(iwl_get_nvm);
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!