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0001 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
0002 /*
0003  * Copyright (C) 2018-2021 Intel Corporation
0004  */
0005 #ifndef __iwl_io_h__
0006 #define __iwl_io_h__
0007 
0008 #include "iwl-devtrace.h"
0009 #include "iwl-trans.h"
0010 
0011 void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val);
0012 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val);
0013 void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val);
0014 u32 iwl_read32(struct iwl_trans *trans, u32 ofs);
0015 
0016 static inline void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
0017 {
0018     iwl_trans_set_bits_mask(trans, reg, mask, mask);
0019 }
0020 
0021 static inline void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
0022 {
0023     iwl_trans_set_bits_mask(trans, reg, mask, 0);
0024 }
0025 
0026 int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
0027          u32 bits, u32 mask, int timeout);
0028 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
0029             int timeout);
0030 
0031 u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg);
0032 void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value);
0033 void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value);
0034 
0035 
0036 u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs);
0037 u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs);
0038 void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val);
0039 void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val);
0040 void iwl_write_prph_delay(struct iwl_trans *trans, u32 ofs,
0041               u32 val, u32 delay_ms);
0042 static inline void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
0043 {
0044     iwl_write_prph_delay(trans, ofs, val, 0);
0045 }
0046 
0047 int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
0048               u32 bits, u32 mask, int timeout);
0049 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
0050 void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
0051                 u32 bits, u32 mask);
0052 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
0053 void iwl_force_nmi(struct iwl_trans *trans);
0054 
0055 int iwl_finish_nic_init(struct iwl_trans *trans);
0056 
0057 /* Error handling */
0058 int iwl_dump_fh(struct iwl_trans *trans, char **buf);
0059 
0060 /*
0061  * UMAC periphery address space changed from 0xA00000 to 0xD00000 starting from
0062  * device family AX200. So peripheries used in families above and below AX200
0063  * should go through iwl_..._umac_..._prph.
0064  */
0065 static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs)
0066 {
0067     return ofs + trans->trans_cfg->umac_prph_offset;
0068 }
0069 
0070 static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs)
0071 {
0072     return iwl_read_prph_no_grab(trans, ofs +
0073                      trans->trans_cfg->umac_prph_offset);
0074 }
0075 
0076 static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs)
0077 {
0078     return iwl_read_prph(trans, ofs + trans->trans_cfg->umac_prph_offset);
0079 }
0080 
0081 static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs,
0082                            u32 val)
0083 {
0084     iwl_write_prph_no_grab(trans,  ofs + trans->trans_cfg->umac_prph_offset,
0085                    val);
0086 }
0087 
0088 static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs,
0089                        u32 val)
0090 {
0091     iwl_write_prph(trans,  ofs + trans->trans_cfg->umac_prph_offset, val);
0092 }
0093 
0094 static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr,
0095                      u32 bits, u32 mask, int timeout)
0096 {
0097     return iwl_poll_prph_bit(trans, addr +
0098                  trans->trans_cfg->umac_prph_offset,
0099                  bits, mask, timeout);
0100 }
0101 
0102 #endif