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0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /*
0003  * Copyright (C) 2005-2014, 2018-2020 Intel Corporation
0004  * Copyright (C) 2015 Intel Mobile Communications GmbH
0005  */
0006 #include <linux/types.h>
0007 #include <linux/slab.h>
0008 #include <linux/export.h>
0009 #include "iwl-drv.h"
0010 #include "iwl-modparams.h"
0011 #include "iwl-eeprom-parse.h"
0012 
0013 #if IS_ENABLED(CONFIG_IWLDVM)
0014 /* EEPROM offset definitions */
0015 
0016 /* indirect access definitions */
0017 #define ADDRESS_MSK                 0x0000FFFF
0018 #define INDIRECT_TYPE_MSK           0x000F0000
0019 #define INDIRECT_HOST               0x00010000
0020 #define INDIRECT_GENERAL            0x00020000
0021 #define INDIRECT_REGULATORY         0x00030000
0022 #define INDIRECT_CALIBRATION        0x00040000
0023 #define INDIRECT_PROCESS_ADJST      0x00050000
0024 #define INDIRECT_OTHERS             0x00060000
0025 #define INDIRECT_TXP_LIMIT          0x00070000
0026 #define INDIRECT_TXP_LIMIT_SIZE     0x00080000
0027 #define INDIRECT_ADDRESS            0x00100000
0028 
0029 /* corresponding link offsets in EEPROM */
0030 #define EEPROM_LINK_HOST             (2*0x64)
0031 #define EEPROM_LINK_GENERAL          (2*0x65)
0032 #define EEPROM_LINK_REGULATORY       (2*0x66)
0033 #define EEPROM_LINK_CALIBRATION      (2*0x67)
0034 #define EEPROM_LINK_PROCESS_ADJST    (2*0x68)
0035 #define EEPROM_LINK_OTHERS           (2*0x69)
0036 #define EEPROM_LINK_TXP_LIMIT        (2*0x6a)
0037 #define EEPROM_LINK_TXP_LIMIT_SIZE   (2*0x6b)
0038 
0039 /* General */
0040 #define EEPROM_DEVICE_ID                    (2*0x08)    /* 2 bytes */
0041 #define EEPROM_SUBSYSTEM_ID         (2*0x0A)    /* 2 bytes */
0042 #define EEPROM_MAC_ADDRESS                  (2*0x15)    /* 6  bytes */
0043 #define EEPROM_BOARD_REVISION               (2*0x35)    /* 2  bytes */
0044 #define EEPROM_BOARD_PBA_NUMBER             (2*0x3B+1)  /* 9  bytes */
0045 #define EEPROM_VERSION                      (2*0x44)    /* 2  bytes */
0046 #define EEPROM_SKU_CAP                      (2*0x45)    /* 2  bytes */
0047 #define EEPROM_OEM_MODE                     (2*0x46)    /* 2  bytes */
0048 #define EEPROM_RADIO_CONFIG                 (2*0x48)    /* 2  bytes */
0049 #define EEPROM_NUM_MAC_ADDRESS              (2*0x4C)    /* 2  bytes */
0050 
0051 /* calibration */
0052 struct iwl_eeprom_calib_hdr {
0053     u8 version;
0054     u8 pa_type;
0055     __le16 voltage;
0056 } __packed;
0057 
0058 #define EEPROM_CALIB_ALL    (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
0059 #define EEPROM_XTAL     ((2*0x128) | EEPROM_CALIB_ALL)
0060 
0061 /* temperature */
0062 #define EEPROM_KELVIN_TEMPERATURE   ((2*0x12A) | EEPROM_CALIB_ALL)
0063 #define EEPROM_RAW_TEMPERATURE      ((2*0x12B) | EEPROM_CALIB_ALL)
0064 
0065 /* SKU Capabilities (actual values from EEPROM definition) */
0066 enum eeprom_sku_bits {
0067     EEPROM_SKU_CAP_BAND_24GHZ   = BIT(4),
0068     EEPROM_SKU_CAP_BAND_52GHZ   = BIT(5),
0069     EEPROM_SKU_CAP_11N_ENABLE   = BIT(6),
0070     EEPROM_SKU_CAP_AMT_ENABLE   = BIT(7),
0071     EEPROM_SKU_CAP_IPAN_ENABLE  = BIT(8)
0072 };
0073 
0074 /* radio config bits (actual values from EEPROM definition) */
0075 #define EEPROM_RF_CFG_TYPE_MSK(x)   (x & 0x3)         /* bits 0-1   */
0076 #define EEPROM_RF_CFG_STEP_MSK(x)   ((x >> 2)  & 0x3) /* bits 2-3   */
0077 #define EEPROM_RF_CFG_DASH_MSK(x)   ((x >> 4)  & 0x3) /* bits 4-5   */
0078 #define EEPROM_RF_CFG_PNUM_MSK(x)   ((x >> 6)  & 0x3) /* bits 6-7   */
0079 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8)  & 0xF) /* bits 8-11  */
0080 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
0081 
0082 
0083 /*
0084  * EEPROM bands
0085  * These are the channel numbers from each band in the order
0086  * that they are stored in the EEPROM band information. Note
0087  * that EEPROM bands aren't the same as mac80211 bands, and
0088  * there are even special "ht40 bands" in the EEPROM.
0089  */
0090 static const u8 iwl_eeprom_band_1[14] = { /* 2.4 GHz */
0091     1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
0092 };
0093 
0094 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
0095     183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
0096 };
0097 
0098 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
0099     34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
0100 };
0101 
0102 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
0103     100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
0104 };
0105 
0106 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
0107     145, 149, 153, 157, 161, 165
0108 };
0109 
0110 static const u8 iwl_eeprom_band_6[] = { /* 2.4 ht40 channel */
0111     1, 2, 3, 4, 5, 6, 7
0112 };
0113 
0114 static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
0115     36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
0116 };
0117 
0118 #define IWL_NUM_CHANNELS    (ARRAY_SIZE(iwl_eeprom_band_1) + \
0119                  ARRAY_SIZE(iwl_eeprom_band_2) + \
0120                  ARRAY_SIZE(iwl_eeprom_band_3) + \
0121                  ARRAY_SIZE(iwl_eeprom_band_4) + \
0122                  ARRAY_SIZE(iwl_eeprom_band_5))
0123 
0124 /* rate data (static) */
0125 static struct ieee80211_rate iwl_cfg80211_rates[] = {
0126     { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
0127     { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
0128       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0129     { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
0130       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0131     { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
0132       .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
0133     { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
0134     { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
0135     { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
0136     { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
0137     { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
0138     { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
0139     { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
0140     { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
0141 };
0142 #define RATES_24_OFFS   0
0143 #define N_RATES_24  ARRAY_SIZE(iwl_cfg80211_rates)
0144 #define RATES_52_OFFS   4
0145 #define N_RATES_52  (N_RATES_24 - RATES_52_OFFS)
0146 
0147 /* EEPROM reading functions */
0148 
0149 static u16 iwl_eeprom_query16(const u8 *eeprom, size_t eeprom_size, int offset)
0150 {
0151     if (WARN_ON(offset + sizeof(u16) > eeprom_size))
0152         return 0;
0153     return le16_to_cpup((__le16 *)(eeprom + offset));
0154 }
0155 
0156 static u32 eeprom_indirect_address(const u8 *eeprom, size_t eeprom_size,
0157                    u32 address)
0158 {
0159     u16 offset = 0;
0160 
0161     if ((address & INDIRECT_ADDRESS) == 0)
0162         return address;
0163 
0164     switch (address & INDIRECT_TYPE_MSK) {
0165     case INDIRECT_HOST:
0166         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0167                         EEPROM_LINK_HOST);
0168         break;
0169     case INDIRECT_GENERAL:
0170         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0171                         EEPROM_LINK_GENERAL);
0172         break;
0173     case INDIRECT_REGULATORY:
0174         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0175                         EEPROM_LINK_REGULATORY);
0176         break;
0177     case INDIRECT_TXP_LIMIT:
0178         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0179                         EEPROM_LINK_TXP_LIMIT);
0180         break;
0181     case INDIRECT_TXP_LIMIT_SIZE:
0182         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0183                         EEPROM_LINK_TXP_LIMIT_SIZE);
0184         break;
0185     case INDIRECT_CALIBRATION:
0186         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0187                         EEPROM_LINK_CALIBRATION);
0188         break;
0189     case INDIRECT_PROCESS_ADJST:
0190         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0191                         EEPROM_LINK_PROCESS_ADJST);
0192         break;
0193     case INDIRECT_OTHERS:
0194         offset = iwl_eeprom_query16(eeprom, eeprom_size,
0195                         EEPROM_LINK_OTHERS);
0196         break;
0197     default:
0198         WARN_ON(1);
0199         break;
0200     }
0201 
0202     /* translate the offset from words to byte */
0203     return (address & ADDRESS_MSK) + (offset << 1);
0204 }
0205 
0206 static const u8 *iwl_eeprom_query_addr(const u8 *eeprom, size_t eeprom_size,
0207                        u32 offset)
0208 {
0209     u32 address = eeprom_indirect_address(eeprom, eeprom_size, offset);
0210 
0211     if (WARN_ON(address >= eeprom_size))
0212         return NULL;
0213 
0214     return &eeprom[address];
0215 }
0216 
0217 static int iwl_eeprom_read_calib(const u8 *eeprom, size_t eeprom_size,
0218                  struct iwl_nvm_data *data)
0219 {
0220     struct iwl_eeprom_calib_hdr *hdr;
0221 
0222     hdr = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
0223                         EEPROM_CALIB_ALL);
0224     if (!hdr)
0225         return -ENODATA;
0226     data->calib_version = hdr->version;
0227     data->calib_voltage = hdr->voltage;
0228 
0229     return 0;
0230 }
0231 
0232 /**
0233  * enum iwl_eeprom_channel_flags - channel flags in EEPROM
0234  * @EEPROM_CHANNEL_VALID: channel is usable for this SKU/geo
0235  * @EEPROM_CHANNEL_IBSS: usable as an IBSS channel
0236  * @EEPROM_CHANNEL_ACTIVE: active scanning allowed
0237  * @EEPROM_CHANNEL_RADAR: radar detection required
0238  * @EEPROM_CHANNEL_WIDE: 20 MHz channel okay (?)
0239  * @EEPROM_CHANNEL_DFS: dynamic freq selection candidate
0240  */
0241 enum iwl_eeprom_channel_flags {
0242     EEPROM_CHANNEL_VALID = BIT(0),
0243     EEPROM_CHANNEL_IBSS = BIT(1),
0244     EEPROM_CHANNEL_ACTIVE = BIT(3),
0245     EEPROM_CHANNEL_RADAR = BIT(4),
0246     EEPROM_CHANNEL_WIDE = BIT(5),
0247     EEPROM_CHANNEL_DFS = BIT(7),
0248 };
0249 
0250 /**
0251  * struct iwl_eeprom_channel - EEPROM channel data
0252  * @flags: %EEPROM_CHANNEL_* flags
0253  * @max_power_avg: max power (in dBm) on this channel, at most 31 dBm
0254  */
0255 struct iwl_eeprom_channel {
0256     u8 flags;
0257     s8 max_power_avg;
0258 } __packed;
0259 
0260 
0261 enum iwl_eeprom_enhanced_txpwr_flags {
0262     IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0),
0263     IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1),
0264     IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2),
0265     IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3),
0266     IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4),
0267     IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5),
0268     IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6),
0269     IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7),
0270 };
0271 
0272 /**
0273  * struct iwl_eeprom_enhanced_txpwr
0274  * @flags: entry flags
0275  * @channel: channel number
0276  * @chain_a_max: chain a max power in 1/2 dBm
0277  * @chain_b_max: chain b max power in 1/2 dBm
0278  * @chain_c_max: chain c max power in 1/2 dBm
0279  * @delta_20_in_40: 20-in-40 deltas (hi/lo)
0280  * @mimo2_max: mimo2 max power in 1/2 dBm
0281  * @mimo3_max: mimo3 max power in 1/2 dBm
0282  *
0283  * This structure presents the enhanced regulatory tx power limit layout
0284  * in an EEPROM image.
0285  */
0286 struct iwl_eeprom_enhanced_txpwr {
0287     u8 flags;
0288     u8 channel;
0289     s8 chain_a_max;
0290     s8 chain_b_max;
0291     s8 chain_c_max;
0292     u8 delta_20_in_40;
0293     s8 mimo2_max;
0294     s8 mimo3_max;
0295 } __packed;
0296 
0297 static s8 iwl_get_max_txpwr_half_dbm(const struct iwl_nvm_data *data,
0298                      struct iwl_eeprom_enhanced_txpwr *txp)
0299 {
0300     s8 result = 0; /* (.5 dBm) */
0301 
0302     /* Take the highest tx power from any valid chains */
0303     if (data->valid_tx_ant & ANT_A && txp->chain_a_max > result)
0304         result = txp->chain_a_max;
0305 
0306     if (data->valid_tx_ant & ANT_B && txp->chain_b_max > result)
0307         result = txp->chain_b_max;
0308 
0309     if (data->valid_tx_ant & ANT_C && txp->chain_c_max > result)
0310         result = txp->chain_c_max;
0311 
0312     if ((data->valid_tx_ant == ANT_AB ||
0313          data->valid_tx_ant == ANT_BC ||
0314          data->valid_tx_ant == ANT_AC) && txp->mimo2_max > result)
0315         result = txp->mimo2_max;
0316 
0317     if (data->valid_tx_ant == ANT_ABC && txp->mimo3_max > result)
0318         result = txp->mimo3_max;
0319 
0320     return result;
0321 }
0322 
0323 #define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
0324 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
0325 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
0326 
0327 #define TXP_CHECK_AND_PRINT(x) \
0328     ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) ? # x " " : "")
0329 
0330 static void
0331 iwl_eeprom_enh_txp_read_element(struct iwl_nvm_data *data,
0332                 struct iwl_eeprom_enhanced_txpwr *txp,
0333                 int n_channels, s8 max_txpower_avg)
0334 {
0335     int ch_idx;
0336     enum nl80211_band band;
0337 
0338     band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
0339         NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
0340 
0341     for (ch_idx = 0; ch_idx < n_channels; ch_idx++) {
0342         struct ieee80211_channel *chan = &data->channels[ch_idx];
0343 
0344         /* update matching channel or from common data only */
0345         if (txp->channel != 0 && chan->hw_value != txp->channel)
0346             continue;
0347 
0348         /* update matching band only */
0349         if (band != chan->band)
0350             continue;
0351 
0352         if (chan->max_power < max_txpower_avg &&
0353             !(txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ))
0354             chan->max_power = max_txpower_avg;
0355     }
0356 }
0357 
0358 static void iwl_eeprom_enhanced_txpower(struct device *dev,
0359                     struct iwl_nvm_data *data,
0360                     const u8 *eeprom, size_t eeprom_size,
0361                     int n_channels)
0362 {
0363     struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
0364     int idx, entries;
0365     __le16 *txp_len;
0366     s8 max_txp_avg_halfdbm;
0367 
0368     BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
0369 
0370     /* the length is in 16-bit words, but we want entries */
0371     txp_len = (__le16 *)iwl_eeprom_query_addr(eeprom, eeprom_size,
0372                           EEPROM_TXP_SZ_OFFS);
0373     entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
0374 
0375     txp_array = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size,
0376                           EEPROM_TXP_OFFS);
0377 
0378     for (idx = 0; idx < entries; idx++) {
0379         txp = &txp_array[idx];
0380         /* skip invalid entries */
0381         if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
0382             continue;
0383 
0384         IWL_DEBUG_EEPROM(dev, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
0385                  (txp->channel && (txp->flags &
0386                     IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
0387                     "Common " : (txp->channel) ?
0388                     "Channel" : "Common",
0389                  (txp->channel),
0390                  TXP_CHECK_AND_PRINT(VALID),
0391                  TXP_CHECK_AND_PRINT(BAND_52G),
0392                  TXP_CHECK_AND_PRINT(OFDM),
0393                  TXP_CHECK_AND_PRINT(40MHZ),
0394                  TXP_CHECK_AND_PRINT(HT_AP),
0395                  TXP_CHECK_AND_PRINT(RES1),
0396                  TXP_CHECK_AND_PRINT(RES2),
0397                  TXP_CHECK_AND_PRINT(COMMON_TYPE),
0398                  txp->flags);
0399         IWL_DEBUG_EEPROM(dev,
0400                  "\t\t chain_A: %d chain_B: %d chain_C: %d\n",
0401                  txp->chain_a_max, txp->chain_b_max,
0402                  txp->chain_c_max);
0403         IWL_DEBUG_EEPROM(dev,
0404                  "\t\t MIMO2: %d MIMO3: %d High 20_on_40: 0x%02x Low 20_on_40: 0x%02x\n",
0405                  txp->mimo2_max, txp->mimo3_max,
0406                  ((txp->delta_20_in_40 & 0xf0) >> 4),
0407                  (txp->delta_20_in_40 & 0x0f));
0408 
0409         max_txp_avg_halfdbm = iwl_get_max_txpwr_half_dbm(data, txp);
0410 
0411         iwl_eeprom_enh_txp_read_element(data, txp, n_channels,
0412                 DIV_ROUND_UP(max_txp_avg_halfdbm, 2));
0413 
0414         if (max_txp_avg_halfdbm > data->max_tx_pwr_half_dbm)
0415             data->max_tx_pwr_half_dbm = max_txp_avg_halfdbm;
0416     }
0417 }
0418 
0419 static void iwl_init_band_reference(const struct iwl_cfg *cfg,
0420                     const u8 *eeprom, size_t eeprom_size,
0421                     int eeprom_band, int *eeprom_ch_count,
0422                     const struct iwl_eeprom_channel **ch_info,
0423                     const u8 **eeprom_ch_array)
0424 {
0425     u32 offset = cfg->eeprom_params->regulatory_bands[eeprom_band - 1];
0426 
0427     offset |= INDIRECT_ADDRESS | INDIRECT_REGULATORY;
0428 
0429     *ch_info = (void *)iwl_eeprom_query_addr(eeprom, eeprom_size, offset);
0430 
0431     switch (eeprom_band) {
0432     case 1:     /* 2.4GHz band */
0433         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
0434         *eeprom_ch_array = iwl_eeprom_band_1;
0435         break;
0436     case 2:     /* 4.9GHz band */
0437         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
0438         *eeprom_ch_array = iwl_eeprom_band_2;
0439         break;
0440     case 3:     /* 5.2GHz band */
0441         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
0442         *eeprom_ch_array = iwl_eeprom_band_3;
0443         break;
0444     case 4:     /* 5.5GHz band */
0445         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
0446         *eeprom_ch_array = iwl_eeprom_band_4;
0447         break;
0448     case 5:     /* 5.7GHz band */
0449         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
0450         *eeprom_ch_array = iwl_eeprom_band_5;
0451         break;
0452     case 6:     /* 2.4GHz ht40 channels */
0453         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
0454         *eeprom_ch_array = iwl_eeprom_band_6;
0455         break;
0456     case 7:     /* 5 GHz ht40 channels */
0457         *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
0458         *eeprom_ch_array = iwl_eeprom_band_7;
0459         break;
0460     default:
0461         *eeprom_ch_count = 0;
0462         *eeprom_ch_array = NULL;
0463         WARN_ON(1);
0464     }
0465 }
0466 
0467 #define CHECK_AND_PRINT(x) \
0468     ((eeprom_ch->flags & EEPROM_CHANNEL_##x) ? # x " " : "")
0469 
0470 static void iwl_mod_ht40_chan_info(struct device *dev,
0471                    struct iwl_nvm_data *data, int n_channels,
0472                    enum nl80211_band band, u16 channel,
0473                    const struct iwl_eeprom_channel *eeprom_ch,
0474                    u8 clear_ht40_extension_channel)
0475 {
0476     struct ieee80211_channel *chan = NULL;
0477     int i;
0478 
0479     for (i = 0; i < n_channels; i++) {
0480         if (data->channels[i].band != band)
0481             continue;
0482         if (data->channels[i].hw_value != channel)
0483             continue;
0484         chan = &data->channels[i];
0485         break;
0486     }
0487 
0488     if (!chan)
0489         return;
0490 
0491     IWL_DEBUG_EEPROM(dev,
0492              "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
0493              channel,
0494              band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
0495              CHECK_AND_PRINT(IBSS),
0496              CHECK_AND_PRINT(ACTIVE),
0497              CHECK_AND_PRINT(RADAR),
0498              CHECK_AND_PRINT(WIDE),
0499              CHECK_AND_PRINT(DFS),
0500              eeprom_ch->flags,
0501              eeprom_ch->max_power_avg,
0502              ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
0503               !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? ""
0504                                       : "not ");
0505 
0506     if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
0507         chan->flags &= ~clear_ht40_extension_channel;
0508 }
0509 
0510 #define CHECK_AND_PRINT_I(x)    \
0511     ((eeprom_ch_info[ch_idx].flags & EEPROM_CHANNEL_##x) ? # x " " : "")
0512 
0513 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
0514                 struct iwl_nvm_data *data,
0515                 const u8 *eeprom, size_t eeprom_size)
0516 {
0517     int band, ch_idx;
0518     const struct iwl_eeprom_channel *eeprom_ch_info;
0519     const u8 *eeprom_ch_array;
0520     int eeprom_ch_count;
0521     int n_channels = 0;
0522 
0523     /*
0524      * Loop through the 5 EEPROM bands and add them to the parse list
0525      */
0526     for (band = 1; band <= 5; band++) {
0527         struct ieee80211_channel *channel;
0528 
0529         iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
0530                     &eeprom_ch_count, &eeprom_ch_info,
0531                     &eeprom_ch_array);
0532 
0533         /* Loop through each band adding each of the channels */
0534         for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
0535             const struct iwl_eeprom_channel *eeprom_ch;
0536 
0537             eeprom_ch = &eeprom_ch_info[ch_idx];
0538 
0539             if (!(eeprom_ch->flags & EEPROM_CHANNEL_VALID)) {
0540                 IWL_DEBUG_EEPROM(dev,
0541                          "Ch. %d Flags %x [%sGHz] - No traffic\n",
0542                          eeprom_ch_array[ch_idx],
0543                          eeprom_ch_info[ch_idx].flags,
0544                          (band != 1) ? "5.2" : "2.4");
0545                 continue;
0546             }
0547 
0548             channel = &data->channels[n_channels];
0549             n_channels++;
0550 
0551             channel->hw_value = eeprom_ch_array[ch_idx];
0552             channel->band = (band == 1) ? NL80211_BAND_2GHZ
0553                             : NL80211_BAND_5GHZ;
0554             channel->center_freq =
0555                 ieee80211_channel_to_frequency(
0556                     channel->hw_value, channel->band);
0557 
0558             /* set no-HT40, will enable as appropriate later */
0559             channel->flags = IEEE80211_CHAN_NO_HT40;
0560 
0561             if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
0562                 channel->flags |= IEEE80211_CHAN_NO_IR;
0563 
0564             if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
0565                 channel->flags |= IEEE80211_CHAN_NO_IR;
0566 
0567             if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
0568                 channel->flags |= IEEE80211_CHAN_RADAR;
0569 
0570             /* Initialize regulatory-based run-time data */
0571             channel->max_power =
0572                 eeprom_ch_info[ch_idx].max_power_avg;
0573             IWL_DEBUG_EEPROM(dev,
0574                      "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
0575                      channel->hw_value,
0576                      (band != 1) ? "5.2" : "2.4",
0577                      CHECK_AND_PRINT_I(VALID),
0578                      CHECK_AND_PRINT_I(IBSS),
0579                      CHECK_AND_PRINT_I(ACTIVE),
0580                      CHECK_AND_PRINT_I(RADAR),
0581                      CHECK_AND_PRINT_I(WIDE),
0582                      CHECK_AND_PRINT_I(DFS),
0583                      eeprom_ch_info[ch_idx].flags,
0584                      eeprom_ch_info[ch_idx].max_power_avg,
0585                      ((eeprom_ch_info[ch_idx].flags &
0586                             EEPROM_CHANNEL_IBSS) &&
0587                       !(eeprom_ch_info[ch_idx].flags &
0588                             EEPROM_CHANNEL_RADAR))
0589                         ? "" : "not ");
0590         }
0591     }
0592 
0593     if (cfg->eeprom_params->enhanced_txpower) {
0594         /*
0595          * for newer device (6000 series and up)
0596          * EEPROM contain enhanced tx power information
0597          * driver need to process addition information
0598          * to determine the max channel tx power limits
0599          */
0600         iwl_eeprom_enhanced_txpower(dev, data, eeprom, eeprom_size,
0601                         n_channels);
0602     } else {
0603         /* All others use data from channel map */
0604         int i;
0605 
0606         data->max_tx_pwr_half_dbm = -128;
0607 
0608         for (i = 0; i < n_channels; i++)
0609             data->max_tx_pwr_half_dbm =
0610                 max_t(s8, data->max_tx_pwr_half_dbm,
0611                       data->channels[i].max_power * 2);
0612     }
0613 
0614     /* Check if we do have HT40 channels */
0615     if (cfg->eeprom_params->regulatory_bands[5] ==
0616                 EEPROM_REGULATORY_BAND_NO_HT40 &&
0617         cfg->eeprom_params->regulatory_bands[6] ==
0618                 EEPROM_REGULATORY_BAND_NO_HT40)
0619         return n_channels;
0620 
0621     /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
0622     for (band = 6; band <= 7; band++) {
0623         enum nl80211_band ieeeband;
0624 
0625         iwl_init_band_reference(cfg, eeprom, eeprom_size, band,
0626                     &eeprom_ch_count, &eeprom_ch_info,
0627                     &eeprom_ch_array);
0628 
0629         /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
0630         ieeeband = (band == 6) ? NL80211_BAND_2GHZ
0631                        : NL80211_BAND_5GHZ;
0632 
0633         /* Loop through each band adding each of the channels */
0634         for (ch_idx = 0; ch_idx < eeprom_ch_count; ch_idx++) {
0635             /* Set up driver's info for lower half */
0636             iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
0637                            eeprom_ch_array[ch_idx],
0638                            &eeprom_ch_info[ch_idx],
0639                            IEEE80211_CHAN_NO_HT40PLUS);
0640 
0641             /* Set up driver's info for upper half */
0642             iwl_mod_ht40_chan_info(dev, data, n_channels, ieeeband,
0643                            eeprom_ch_array[ch_idx] + 4,
0644                            &eeprom_ch_info[ch_idx],
0645                            IEEE80211_CHAN_NO_HT40MINUS);
0646         }
0647     }
0648 
0649     return n_channels;
0650 }
0651 #endif
0652 
0653 int iwl_init_sband_channels(struct iwl_nvm_data *data,
0654                 struct ieee80211_supported_band *sband,
0655                 int n_channels, enum nl80211_band band)
0656 {
0657     struct ieee80211_channel *chan = &data->channels[0];
0658     int n = 0, idx = 0;
0659 
0660     while (idx < n_channels && chan->band != band)
0661         chan = &data->channels[++idx];
0662 
0663     sband->channels = &data->channels[idx];
0664 
0665     while (idx < n_channels && chan->band == band) {
0666         chan = &data->channels[++idx];
0667         n++;
0668     }
0669 
0670     sband->n_channels = n;
0671 
0672     return n;
0673 }
0674 
0675 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
0676 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
0677 
0678 void iwl_init_ht_hw_capab(struct iwl_trans *trans,
0679               struct iwl_nvm_data *data,
0680               struct ieee80211_sta_ht_cap *ht_info,
0681               enum nl80211_band band,
0682               u8 tx_chains, u8 rx_chains)
0683 {
0684     const struct iwl_cfg *cfg = trans->cfg;
0685     int max_bit_rate = 0;
0686 
0687     tx_chains = hweight8(tx_chains);
0688     if (cfg->rx_with_siso_diversity)
0689         rx_chains = 1;
0690     else
0691         rx_chains = hweight8(rx_chains);
0692 
0693     if (!(data->sku_cap_11n_enable) ||
0694         (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL) ||
0695         !cfg->ht_params) {
0696         ht_info->ht_supported = false;
0697         return;
0698     }
0699 
0700     if (data->sku_cap_mimo_disabled)
0701         rx_chains = 1;
0702 
0703     ht_info->ht_supported = true;
0704     ht_info->cap = IEEE80211_HT_CAP_DSSSCCK40;
0705 
0706     if (cfg->ht_params->stbc) {
0707         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
0708 
0709         if (tx_chains > 1)
0710             ht_info->cap |= IEEE80211_HT_CAP_TX_STBC;
0711     }
0712 
0713     if (cfg->ht_params->ldpc)
0714         ht_info->cap |= IEEE80211_HT_CAP_LDPC_CODING;
0715 
0716     if (trans->trans_cfg->mq_rx_supported ||
0717         iwlwifi_mod_params.amsdu_size >= IWL_AMSDU_8K)
0718         ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
0719 
0720     ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
0721     ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_4;
0722 
0723     ht_info->mcs.rx_mask[0] = 0xFF;
0724     if (rx_chains >= 2)
0725         ht_info->mcs.rx_mask[1] = 0xFF;
0726     if (rx_chains >= 3)
0727         ht_info->mcs.rx_mask[2] = 0xFF;
0728 
0729     if (cfg->ht_params->ht_greenfield_support)
0730         ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
0731     ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
0732 
0733     max_bit_rate = MAX_BIT_RATE_20_MHZ;
0734 
0735     if (cfg->ht_params->ht40_bands & BIT(band)) {
0736         ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
0737         ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
0738         max_bit_rate = MAX_BIT_RATE_40_MHZ;
0739     }
0740 
0741     /* Highest supported Rx data rate */
0742     max_bit_rate *= rx_chains;
0743     WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
0744     ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
0745 
0746     /* Tx MCS capabilities */
0747     ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
0748     if (tx_chains != rx_chains) {
0749         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
0750         ht_info->mcs.tx_params |= ((tx_chains - 1) <<
0751                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
0752     }
0753 }
0754 
0755 #if IS_ENABLED(CONFIG_IWLDVM)
0756 static void iwl_init_sbands(struct iwl_trans *trans, const struct iwl_cfg *cfg,
0757                 struct iwl_nvm_data *data,
0758                 const u8 *eeprom, size_t eeprom_size)
0759 {
0760     struct device *dev = trans->dev;
0761     int n_channels = iwl_init_channel_map(dev, cfg, data,
0762                           eeprom, eeprom_size);
0763     int n_used = 0;
0764     struct ieee80211_supported_band *sband;
0765 
0766     sband = &data->bands[NL80211_BAND_2GHZ];
0767     sband->band = NL80211_BAND_2GHZ;
0768     sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
0769     sband->n_bitrates = N_RATES_24;
0770     n_used += iwl_init_sband_channels(data, sband, n_channels,
0771                       NL80211_BAND_2GHZ);
0772     iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_2GHZ,
0773                  data->valid_tx_ant, data->valid_rx_ant);
0774 
0775     sband = &data->bands[NL80211_BAND_5GHZ];
0776     sband->band = NL80211_BAND_5GHZ;
0777     sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
0778     sband->n_bitrates = N_RATES_52;
0779     n_used += iwl_init_sband_channels(data, sband, n_channels,
0780                       NL80211_BAND_5GHZ);
0781     iwl_init_ht_hw_capab(trans, data, &sband->ht_cap, NL80211_BAND_5GHZ,
0782                  data->valid_tx_ant, data->valid_rx_ant);
0783 
0784     if (n_channels != n_used)
0785         IWL_ERR_DEV(dev, "EEPROM: used only %d of %d channels\n",
0786                 n_used, n_channels);
0787 }
0788 
0789 /* EEPROM data functions */
0790 
0791 struct iwl_nvm_data *
0792 iwl_parse_eeprom_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
0793               const u8 *eeprom, size_t eeprom_size)
0794 {
0795     struct iwl_nvm_data *data;
0796     struct device *dev = trans->dev;
0797     const void *tmp;
0798     u16 radio_cfg, sku;
0799 
0800     if (WARN_ON(!cfg || !cfg->eeprom_params))
0801         return NULL;
0802 
0803     data = kzalloc(struct_size(data, channels, IWL_NUM_CHANNELS),
0804                GFP_KERNEL);
0805     if (!data)
0806         return NULL;
0807 
0808     /* get MAC address(es) */
0809     tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_MAC_ADDRESS);
0810     if (!tmp)
0811         goto err_free;
0812     memcpy(data->hw_addr, tmp, ETH_ALEN);
0813     data->n_hw_addrs = iwl_eeprom_query16(eeprom, eeprom_size,
0814                           EEPROM_NUM_MAC_ADDRESS);
0815 
0816     if (iwl_eeprom_read_calib(eeprom, eeprom_size, data))
0817         goto err_free;
0818 
0819     tmp = iwl_eeprom_query_addr(eeprom, eeprom_size, EEPROM_XTAL);
0820     if (!tmp)
0821         goto err_free;
0822     memcpy(data->xtal_calib, tmp, sizeof(data->xtal_calib));
0823 
0824     tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
0825                     EEPROM_RAW_TEMPERATURE);
0826     if (!tmp)
0827         goto err_free;
0828     data->raw_temperature = *(__le16 *)tmp;
0829 
0830     tmp = iwl_eeprom_query_addr(eeprom, eeprom_size,
0831                     EEPROM_KELVIN_TEMPERATURE);
0832     if (!tmp)
0833         goto err_free;
0834     data->kelvin_temperature = *(__le16 *)tmp;
0835     data->kelvin_voltage = *((__le16 *)tmp + 1);
0836 
0837     radio_cfg = iwl_eeprom_query16(eeprom, eeprom_size,
0838                          EEPROM_RADIO_CONFIG);
0839     data->radio_cfg_dash = EEPROM_RF_CFG_DASH_MSK(radio_cfg);
0840     data->radio_cfg_pnum = EEPROM_RF_CFG_PNUM_MSK(radio_cfg);
0841     data->radio_cfg_step = EEPROM_RF_CFG_STEP_MSK(radio_cfg);
0842     data->radio_cfg_type = EEPROM_RF_CFG_TYPE_MSK(radio_cfg);
0843     data->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
0844     data->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
0845 
0846     sku = iwl_eeprom_query16(eeprom, eeprom_size,
0847                  EEPROM_SKU_CAP);
0848     data->sku_cap_11n_enable = sku & EEPROM_SKU_CAP_11N_ENABLE;
0849     data->sku_cap_amt_enable = sku & EEPROM_SKU_CAP_AMT_ENABLE;
0850     data->sku_cap_band_24ghz_enable = sku & EEPROM_SKU_CAP_BAND_24GHZ;
0851     data->sku_cap_band_52ghz_enable = sku & EEPROM_SKU_CAP_BAND_52GHZ;
0852     data->sku_cap_ipan_enable = sku & EEPROM_SKU_CAP_IPAN_ENABLE;
0853     if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
0854         data->sku_cap_11n_enable = false;
0855 
0856     data->nvm_version = iwl_eeprom_query16(eeprom, eeprom_size,
0857                            EEPROM_VERSION);
0858 
0859     /* check overrides (some devices have wrong EEPROM) */
0860     if (cfg->valid_tx_ant)
0861         data->valid_tx_ant = cfg->valid_tx_ant;
0862     if (cfg->valid_rx_ant)
0863         data->valid_rx_ant = cfg->valid_rx_ant;
0864 
0865     if (!data->valid_tx_ant || !data->valid_rx_ant) {
0866         IWL_ERR_DEV(dev, "invalid antennas (0x%x, 0x%x)\n",
0867                 data->valid_tx_ant, data->valid_rx_ant);
0868         goto err_free;
0869     }
0870 
0871     iwl_init_sbands(trans, cfg, data, eeprom, eeprom_size);
0872 
0873     return data;
0874  err_free:
0875     kfree(data);
0876     return NULL;
0877 }
0878 IWL_EXPORT_SYMBOL(iwl_parse_eeprom_data);
0879 #endif
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