intel/iwlwifi/iwl-config.h

0001 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
0002 /*
0003  * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
0004  * Copyright (C) 2016-2017 Intel Deutschland GmbH
0005  */
0006 #ifndef __IWL_CONFIG_H__
0007 #define __IWL_CONFIG_H__
0008
0009 #include <linux/types.h>
0010 #include <linux/netdevice.h>
0011 #include <linux/ieee80211.h>
0012 #include <linux/nl80211.h>
0013 #include "iwl-csr.h"
0014
0015 enum iwl_device_family {
0016     IWL_DEVICE_FAMILY_UNDEFINED,
0017     IWL_DEVICE_FAMILY_1000,
0018     IWL_DEVICE_FAMILY_100,
0019     IWL_DEVICE_FAMILY_2000,
0020     IWL_DEVICE_FAMILY_2030,
0021     IWL_DEVICE_FAMILY_105,
0022     IWL_DEVICE_FAMILY_135,
0023     IWL_DEVICE_FAMILY_5000,
0024     IWL_DEVICE_FAMILY_5150,
0025     IWL_DEVICE_FAMILY_6000,
0026     IWL_DEVICE_FAMILY_6000i,
0027     IWL_DEVICE_FAMILY_6005,
0028     IWL_DEVICE_FAMILY_6030,
0029     IWL_DEVICE_FAMILY_6050,
0030     IWL_DEVICE_FAMILY_6150,
0031     IWL_DEVICE_FAMILY_7000,
0032     IWL_DEVICE_FAMILY_8000,
0033     IWL_DEVICE_FAMILY_9000,
0034     IWL_DEVICE_FAMILY_22000,
0035     IWL_DEVICE_FAMILY_AX210,
0036     IWL_DEVICE_FAMILY_BZ,
0037 };
0038
0039 /*
0040  * LED mode
0041  *    IWL_LED_DEFAULT:  use device default
0042  *    IWL_LED_RF_STATE: turn LED on/off based on RF state
0043  *          LED ON  = RF ON
0044  *          LED OFF = RF OFF
0045  *    IWL_LED_BLINK:    adjust led blink rate based on blink table
0046  *    IWL_LED_DISABLE:  led disabled
0047  */
0048 enum iwl_led_mode {
0049     IWL_LED_DEFAULT,
0050     IWL_LED_RF_STATE,
0051     IWL_LED_BLINK,
0052     IWL_LED_DISABLE,
0053 };
0054
0055 /**
0056  * enum iwl_nvm_type - nvm formats
0057  * @IWL_NVM: the regular format
0058  * @IWL_NVM_EXT: extended NVM format
0059  * @IWL_NVM_SDP: NVM format used by 3168 series
0060  */
0061 enum iwl_nvm_type {
0062     IWL_NVM,
0063     IWL_NVM_EXT,
0064     IWL_NVM_SDP,
0065 };
0066
0067 /*
0068  * This is the threshold value of plcp error rate per 100mSecs.  It is
0069  * used to set and check for the validity of plcp_delta.
0070  */
0071 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN      1
0072 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF      50
0073 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
0074 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
0075 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX      255
0076 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE  0
0077
0078 /* TX queue watchdog timeouts in mSecs */
0079 #define IWL_WATCHDOG_DISABLED   0
0080 #define IWL_DEF_WD_TIMEOUT  2500
0081 #define IWL_LONG_WD_TIMEOUT 10000
0082 #define IWL_MAX_WD_TIMEOUT  120000
0083
0084 #define IWL_DEFAULT_MAX_TX_POWER 22
0085 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
0086                  NETIF_F_TSO | NETIF_F_TSO6)
0087 #define IWL_TX_CSUM_NETIF_FLAGS_BZ (NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6)
0088 #define IWL_CSUM_NETIF_FLAGS_MASK (IWL_TX_CSUM_NETIF_FLAGS | \
0089                    IWL_TX_CSUM_NETIF_FLAGS_BZ | \
0090                    NETIF_F_RXCSUM)
0091
0092 /* Antenna presence definitions */
0093 #define ANT_NONE    0x0
0094 #define ANT_INVALID 0xff
0095 #define ANT_A       BIT(0)
0096 #define ANT_B       BIT(1)
0097 #define ANT_C       BIT(2)
0098 #define ANT_AB      (ANT_A | ANT_B)
0099 #define ANT_AC      (ANT_A | ANT_C)
0100 #define ANT_BC      (ANT_B | ANT_C)
0101 #define ANT_ABC     (ANT_A | ANT_B | ANT_C)
0102
0103
0104 static inline u8 num_of_ant(u8 mask)
0105 {
0106     return  !!((mask) & ANT_A) +
0107         !!((mask) & ANT_B) +
0108         !!((mask) & ANT_C);
0109 }
0110
0111 /**
0112  * struct iwl_base_params - params not likely to change within a device family
0113  * @max_ll_items: max number of OTP blocks
0114  * @shadow_ram_support: shadow support for OTP memory
0115  * @led_compensation: compensate on the led on/off time per HW according
0116  *  to the deviation to achieve the desired led frequency.
0117  *  The detail algorithm is described in iwl-led.c
0118  * @wd_timeout: TX queues watchdog timeout
0119  * @max_event_log_size: size of event log buffer size for ucode event logging
0120  * @shadow_reg_enable: HW shadow register support
0121  * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
0122  *  is in flight. This is due to a HW bug in 7260, 3160 and 7265.
0123  * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
0124  * @max_tfd_queue_size: max number of entries in tfd queue.
0125  */
0126 struct iwl_base_params {
0127     unsigned int wd_timeout;
0128
0129     u16 eeprom_size;
0130     u16 max_event_log_size;
0131
0132     u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
0133        shadow_ram_support:1,
0134        shadow_reg_enable:1,
0135        pcie_l1_allowed:1,
0136        apmg_wake_up_wa:1,
0137        scd_chain_ext_wa:1;
0138
0139     u16 num_of_queues;  /* def: HW dependent */
0140     u32 max_tfd_queue_size; /* def: HW dependent */
0141
0142     u8 max_ll_items;
0143     u8 led_compensation;
0144 };
0145
0146 /*
0147  * @stbc: support Tx STBC and 1*SS Rx STBC
0148  * @ldpc: support Tx/Rx with LDPC
0149  * @use_rts_for_aggregation: use rts/cts protection for HT traffic
0150  * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
0151  */
0152 struct iwl_ht_params {
0153     u8 ht_greenfield_support:1,
0154        stbc:1,
0155        ldpc:1,
0156        use_rts_for_aggregation:1;
0157     u8 ht40_bands;
0158 };
0159
0160 /*
0161  * Tx-backoff threshold
0162  * @temperature: The threshold in Celsius
0163  * @backoff: The tx-backoff in uSec
0164  */
0165 struct iwl_tt_tx_backoff {
0166     s32 temperature;
0167     u32 backoff;
0168 };
0169
0170 #define TT_TX_BACKOFF_SIZE 6
0171
0172 /**
0173  * struct iwl_tt_params - thermal throttling parameters
0174  * @ct_kill_entry: CT Kill entry threshold
0175  * @ct_kill_exit: CT Kill exit threshold
0176  * @ct_kill_duration: The time  intervals (in uSec) in which the driver needs
0177  *  to checks whether to exit CT Kill.
0178  * @dynamic_smps_entry: Dynamic SMPS entry threshold
0179  * @dynamic_smps_exit: Dynamic SMPS exit threshold
0180  * @tx_protection_entry: TX protection entry threshold
0181  * @tx_protection_exit: TX protection exit threshold
0182  * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
0183  * @support_ct_kill: Support CT Kill?
0184  * @support_dynamic_smps: Support dynamic SMPS?
0185  * @support_tx_protection: Support tx protection?
0186  * @support_tx_backoff: Support tx-backoff?
0187  */
0188 struct iwl_tt_params {
0189     u32 ct_kill_entry;
0190     u32 ct_kill_exit;
0191     u32 ct_kill_duration;
0192     u32 dynamic_smps_entry;
0193     u32 dynamic_smps_exit;
0194     u32 tx_protection_entry;
0195     u32 tx_protection_exit;
0196     struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
0197     u8 support_ct_kill:1,
0198        support_dynamic_smps:1,
0199        support_tx_protection:1,
0200        support_tx_backoff:1;
0201 };
0202
0203 /*
0204  * information on how to parse the EEPROM
0205  */
0206 #define EEPROM_REG_BAND_1_CHANNELS      0x08
0207 #define EEPROM_REG_BAND_2_CHANNELS      0x26
0208 #define EEPROM_REG_BAND_3_CHANNELS      0x42
0209 #define EEPROM_REG_BAND_4_CHANNELS      0x5C
0210 #define EEPROM_REG_BAND_5_CHANNELS      0x74
0211 #define EEPROM_REG_BAND_24_HT40_CHANNELS    0x82
0212 #define EEPROM_REG_BAND_52_HT40_CHANNELS    0x92
0213 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS   0x80
0214 #define EEPROM_REGULATORY_BAND_NO_HT40      0
0215
0216 /* lower blocks contain EEPROM image and calibration data */
0217 #define OTP_LOW_IMAGE_SIZE_2K       (2 * 512 * sizeof(u16))  /*  2 KB */
0218 #define OTP_LOW_IMAGE_SIZE_16K      (16 * 512 * sizeof(u16)) /* 16 KB */
0219 #define OTP_LOW_IMAGE_SIZE_32K      (32 * 512 * sizeof(u16)) /* 32 KB */
0220
0221 struct iwl_eeprom_params {
0222     const u8 regulatory_bands[7];
0223     bool enhanced_txpower;
0224 };
0225
0226 /* Tx-backoff power threshold
0227  * @pwr: The power limit in mw
0228  * @backoff: The tx-backoff in uSec
0229  */
0230 struct iwl_pwr_tx_backoff {
0231     u32 pwr;
0232     u32 backoff;
0233 };
0234
0235 enum iwl_cfg_trans_ltr_delay {
0236     IWL_CFG_TRANS_LTR_DELAY_NONE    = 0,
0237     IWL_CFG_TRANS_LTR_DELAY_200US   = 1,
0238     IWL_CFG_TRANS_LTR_DELAY_2500US  = 2,
0239     IWL_CFG_TRANS_LTR_DELAY_1820US  = 3,
0240 };
0241
0242 /**
0243  * struct iwl_cfg_trans - information needed to start the trans
0244  *
0245  * These values are specific to the device ID and do not change when
0246  * multiple configs are used for a single device ID.  They values are
0247  * used, among other things, to boot the NIC so that the HW REV or
0248  * RFID can be read before deciding the remaining parameters to use.
0249  *
0250  * @base_params: pointer to basic parameters
0251  * @csr: csr flags and addresses that are different across devices
0252  * @device_family: the device family
0253  * @umac_prph_offset: offset to add to UMAC periphery address
0254  * @xtal_latency: power up latency to get the xtal stabilized
0255  * @extra_phy_cfg_flags: extra configuration flags to pass to the PHY
0256  * @rf_id: need to read rf_id to determine the firmware image
0257  * @use_tfh: use TFH
0258  * @gen2: 22000 and on transport operation
0259  * @mq_rx_supported: multi-queue rx support
0260  * @integrated: discrete or integrated
0261  * @low_latency_xtal: use the low latency xtal if supported
0262  * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay.
0263  * @imr_enabled: use the IMR if supported.
0264  */
0265 struct iwl_cfg_trans_params {
0266     const struct iwl_base_params *base_params;
0267     enum iwl_device_family device_family;
0268     u32 umac_prph_offset;
0269     u32 xtal_latency;
0270     u32 extra_phy_cfg_flags;
0271     u32 rf_id:1,
0272         use_tfh:1,
0273         gen2:1,
0274         mq_rx_supported:1,
0275         integrated:1,
0276         low_latency_xtal:1,
0277         bisr_workaround:1,
0278         ltr_delay:2,
0279         imr_enabled:1;
0280 };
0281
0282 /**
0283  * struct iwl_fw_mon_reg - FW monitor register info
0284  * @addr: register address
0285  * @mask: register mask
0286  */
0287 struct iwl_fw_mon_reg {
0288     u32 addr;
0289     u32 mask;
0290 };
0291
0292 /**
0293  * struct iwl_fw_mon_regs - FW monitor registers
0294  * @write_ptr: write pointer register
0295  * @cycle_cnt: cycle count register
0296  * @cur_frag: current fragment in use
0297  */
0298 struct iwl_fw_mon_regs {
0299     struct iwl_fw_mon_reg write_ptr;
0300     struct iwl_fw_mon_reg cycle_cnt;
0301     struct iwl_fw_mon_reg cur_frag;
0302 };
0303
0304 /**
0305  * struct iwl_cfg
0306  * @trans: the trans-specific configuration part
0307  * @name: Official name of the device
0308  * @fw_name_pre: Firmware filename prefix. The api version and extension
0309  *  (.ucode) will be added to filename before loading from disk. The
0310  *  filename is constructed as fw_name_pre<api>.ucode.
0311  * @ucode_api_max: Highest version of uCode API supported by driver.
0312  * @ucode_api_min: Lowest version of uCode API supported by driver.
0313  * @max_inst_size: The maximal length of the fw inst section (only DVM)
0314  * @max_data_size: The maximal length of the fw data section (only DVM)
0315  * @valid_tx_ant: valid transmit antenna
0316  * @valid_rx_ant: valid receive antenna
0317  * @non_shared_ant: the antenna that is for WiFi only
0318  * @nvm_ver: NVM version
0319  * @nvm_calib_ver: NVM calibration version
0320  * @lib: pointer to the lib ops
0321  * @ht_params: point to ht parameters
0322  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
0323  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
0324  * @tx_with_siso_diversity: 1x1 device with tx antenna diversity
0325  * @internal_wimax_coex: internal wifi/wimax combo device
0326  * @high_temp: Is this NIC is designated to be in high temperature.
0327  * @host_interrupt_operation_mode: device needs host interrupt operation
0328  *  mode set
0329  * @nvm_hw_section_num: the ID of the HW NVM section
0330  * @mac_addr_from_csr: read HW address from CSR registers at this offset
0331  * @features: hw features, any combination of feature_passlist
0332  * @pwr_tx_backoffs: translation table between power limits and backoffs
0333  * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
0334  * @dccm_offset: offset from which DCCM begins
0335  * @dccm_len: length of DCCM (including runtime stack CCM)
0336  * @dccm2_offset: offset from which the second DCCM begins
0337  * @dccm2_len: length of the second DCCM
0338  * @smem_offset: offset from which the SMEM begins
0339  * @smem_len: the length of SMEM
0340  * @vht_mu_mimo_supported: VHT MU-MIMO support
0341  * @cdb: CDB support
0342  * @nvm_type: see &enum iwl_nvm_type
0343  * @d3_debug_data_base_addr: base address where D3 debug data is stored
0344  * @d3_debug_data_length: length of the D3 debug data
0345  * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
0346  * @min_txq_size: minimum number of slots required in a TX queue
0347  * @uhb_supported: ultra high band channels supported
0348  * @min_ba_txq_size: minimum number of slots required in a TX queue which
0349  *  based on hardware support (HE - 256, EHT - 1K).
0350  * @num_rbds: number of receive buffer descriptors to use
0351  *  (only used for multi-queue capable devices)
0352  * @mac_addr_csr_base: CSR base register for MAC address access, if not set
0353  *  assume 0x380
0354  *
0355  * We enable the driver to be backward compatible wrt. hardware features.
0356  * API differences in uCode shouldn't be handled here but through TLVs
0357  * and/or the uCode API version instead.
0358  */
0359 struct iwl_cfg {
0360     struct iwl_cfg_trans_params trans;
0361     /* params specific to an individual device within a device family */
0362     const char *name;
0363     const char *fw_name_pre;
0364     /* params likely to change within a device family */
0365     const struct iwl_ht_params *ht_params;
0366     const struct iwl_eeprom_params *eeprom_params;
0367     const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
0368     const char *default_nvm_file_C_step;
0369     const struct iwl_tt_params *thermal_params;
0370     enum iwl_led_mode led_mode;
0371     enum iwl_nvm_type nvm_type;
0372     u32 max_data_size;
0373     u32 max_inst_size;
0374     netdev_features_t features;
0375     u32 dccm_offset;
0376     u32 dccm_len;
0377     u32 dccm2_offset;
0378     u32 dccm2_len;
0379     u32 smem_offset;
0380     u32 smem_len;
0381     u16 nvm_ver;
0382     u16 nvm_calib_ver;
0383     u32 rx_with_siso_diversity:1,
0384         tx_with_siso_diversity:1,
0385         bt_shared_single_ant:1,
0386         internal_wimax_coex:1,
0387         host_interrupt_operation_mode:1,
0388         high_temp:1,
0389         mac_addr_from_csr:10,
0390         lp_xtal_workaround:1,
0391         disable_dummy_notification:1,
0392         apmg_not_supported:1,
0393         vht_mu_mimo_supported:1,
0394         cdb:1,
0395         dbgc_supported:1,
0396         uhb_supported:1;
0397     u8 valid_tx_ant;
0398     u8 valid_rx_ant;
0399     u8 non_shared_ant;
0400     u8 nvm_hw_section_num;
0401     u8 max_tx_agg_size;
0402     u8 ucode_api_max;
0403     u8 ucode_api_min;
0404     u16 num_rbds;
0405     u32 min_umac_error_event_table;
0406     u32 d3_debug_data_base_addr;
0407     u32 d3_debug_data_length;
0408     u32 min_txq_size;
0409     u32 gp2_reg_addr;
0410     u32 min_ba_txq_size;
0411     const struct iwl_fw_mon_regs mon_dram_regs;
0412     const struct iwl_fw_mon_regs mon_smem_regs;
0413     const struct iwl_fw_mon_regs mon_dbgi_regs;
0414 };
0415
0416 #define IWL_CFG_ANY (~0)
0417
0418 #define IWL_CFG_MAC_TYPE_PU     0x31
0419 #define IWL_CFG_MAC_TYPE_PNJ        0x32
0420 #define IWL_CFG_MAC_TYPE_TH     0x32
0421 #define IWL_CFG_MAC_TYPE_QU     0x33
0422 #define IWL_CFG_MAC_TYPE_QUZ        0x35
0423 #define IWL_CFG_MAC_TYPE_QNJ        0x36
0424 #define IWL_CFG_MAC_TYPE_SO     0x37
0425 #define IWL_CFG_MAC_TYPE_SNJ        0x42
0426 #define IWL_CFG_MAC_TYPE_SOF        0x43
0427 #define IWL_CFG_MAC_TYPE_MA     0x44
0428 #define IWL_CFG_MAC_TYPE_BZ     0x46
0429 #define IWL_CFG_MAC_TYPE_GL     0x47
0430
0431 #define IWL_CFG_RF_TYPE_TH      0x105
0432 #define IWL_CFG_RF_TYPE_TH1     0x108
0433 #define IWL_CFG_RF_TYPE_JF2     0x105
0434 #define IWL_CFG_RF_TYPE_JF1     0x108
0435 #define IWL_CFG_RF_TYPE_HR2     0x10A
0436 #define IWL_CFG_RF_TYPE_HR1     0x10C
0437 #define IWL_CFG_RF_TYPE_GF      0x10D
0438 #define IWL_CFG_RF_TYPE_MR      0x110
0439 #define IWL_CFG_RF_TYPE_MS      0x111
0440 #define IWL_CFG_RF_TYPE_FM      0x112
0441
0442 #define IWL_CFG_RF_ID_TH        0x1
0443 #define IWL_CFG_RF_ID_TH1       0x1
0444 #define IWL_CFG_RF_ID_JF        0x3
0445 #define IWL_CFG_RF_ID_JF1       0x6
0446 #define IWL_CFG_RF_ID_JF1_DIV       0xA
0447 #define IWL_CFG_RF_ID_HR        0x7
0448 #define IWL_CFG_RF_ID_HR1       0x4
0449
0450 #define IWL_CFG_NO_160          0x1
0451 #define IWL_CFG_160         0x0
0452
0453 #define IWL_CFG_CORES_BT        0x0
0454 #define IWL_CFG_CORES_BT_GNSS       0x5
0455
0456 #define IWL_CFG_NO_CDB          0x0
0457 #define IWL_CFG_CDB         0x1
0458
0459 #define IWL_CFG_NO_JACKET       0x0
0460 #define IWL_CFG_IS_JACKET       0x1
0461
0462 #define IWL_SUBDEVICE_RF_ID(subdevice)  ((u16)((subdevice) & 0x00F0) >> 4)
0463 #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0200) >> 9)
0464 #define IWL_SUBDEVICE_CORES(subdevice)  ((u16)((subdevice) & 0x1C00) >> 10)
0465
0466 struct iwl_dev_info {
0467     u16 device;
0468     u16 subdevice;
0469     u16 mac_type;
0470     u16 rf_type;
0471     u8 mac_step;
0472     u8 rf_id;
0473     u8 no_160;
0474     u8 cores;
0475     u8 cdb;
0476     u8 jacket;
0477     const struct iwl_cfg *cfg;
0478     const char *name;
0479 };
0480
0481 /*
0482  * This list declares the config structures for all devices.
0483  */
0484 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg;
0485 extern const struct iwl_cfg_trans_params iwl9560_trans_cfg;
0486 extern const struct iwl_cfg_trans_params iwl9560_long_latency_trans_cfg;
0487 extern const struct iwl_cfg_trans_params iwl9560_shared_clk_trans_cfg;
0488 extern const struct iwl_cfg_trans_params iwl_qnj_trans_cfg;
0489 extern const struct iwl_cfg_trans_params iwl_qu_trans_cfg;
0490 extern const struct iwl_cfg_trans_params iwl_qu_medium_latency_trans_cfg;
0491 extern const struct iwl_cfg_trans_params iwl_qu_long_latency_trans_cfg;
0492 extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg;
0493 extern const struct iwl_cfg_trans_params iwl_snj_trans_cfg;
0494 extern const struct iwl_cfg_trans_params iwl_so_trans_cfg;
0495 extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg;
0496 extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg;
0497 extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg;
0498 extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg;
0499 extern const char iwl9162_name[];
0500 extern const char iwl9260_name[];
0501 extern const char iwl9260_1_name[];
0502 extern const char iwl9270_name[];
0503 extern const char iwl9461_name[];
0504 extern const char iwl9462_name[];
0505 extern const char iwl9560_name[];
0506 extern const char iwl9162_160_name[];
0507 extern const char iwl9260_160_name[];
0508 extern const char iwl9270_160_name[];
0509 extern const char iwl9461_160_name[];
0510 extern const char iwl9462_160_name[];
0511 extern const char iwl9560_160_name[];
0512 extern const char iwl9260_killer_1550_name[];
0513 extern const char iwl9560_killer_1550i_name[];
0514 extern const char iwl9560_killer_1550s_name[];
0515 extern const char iwl_ax200_name[];
0516 extern const char iwl_ax203_name[];
0517 extern const char iwl_ax204_name[];
0518 extern const char iwl_ax201_name[];
0519 extern const char iwl_ax101_name[];
0520 extern const char iwl_ax200_killer_1650w_name[];
0521 extern const char iwl_ax200_killer_1650x_name[];
0522 extern const char iwl_ax201_killer_1650s_name[];
0523 extern const char iwl_ax201_killer_1650i_name[];
0524 extern const char iwl_ax210_killer_1675w_name[];
0525 extern const char iwl_ax210_killer_1675x_name[];
0526 extern const char iwl9560_killer_1550i_160_name[];
0527 extern const char iwl9560_killer_1550s_160_name[];
0528 extern const char iwl_ax211_killer_1675s_name[];
0529 extern const char iwl_ax211_killer_1675i_name[];
0530 extern const char iwl_ax411_killer_1690s_name[];
0531 extern const char iwl_ax411_killer_1690i_name[];
0532 extern const char iwl_ax211_name[];
0533 extern const char iwl_ax221_name[];
0534 extern const char iwl_ax231_name[];
0535 extern const char iwl_ax411_name[];
0536 extern const char iwl_bz_name[];
0537 #if IS_ENABLED(CONFIG_IWLDVM)
0538 extern const struct iwl_cfg iwl5300_agn_cfg;
0539 extern const struct iwl_cfg iwl5100_agn_cfg;
0540 extern const struct iwl_cfg iwl5350_agn_cfg;
0541 extern const struct iwl_cfg iwl5100_bgn_cfg;
0542 extern const struct iwl_cfg iwl5100_abg_cfg;
0543 extern const struct iwl_cfg iwl5150_agn_cfg;
0544 extern const struct iwl_cfg iwl5150_abg_cfg;
0545 extern const struct iwl_cfg iwl6005_2agn_cfg;
0546 extern const struct iwl_cfg iwl6005_2abg_cfg;
0547 extern const struct iwl_cfg iwl6005_2bg_cfg;
0548 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
0549 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
0550 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
0551 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
0552 extern const struct iwl_cfg iwl1030_bgn_cfg;
0553 extern const struct iwl_cfg iwl1030_bg_cfg;
0554 extern const struct iwl_cfg iwl6030_2agn_cfg;
0555 extern const struct iwl_cfg iwl6030_2abg_cfg;
0556 extern const struct iwl_cfg iwl6030_2bgn_cfg;
0557 extern const struct iwl_cfg iwl6030_2bg_cfg;
0558 extern const struct iwl_cfg iwl6000i_2agn_cfg;
0559 extern const struct iwl_cfg iwl6000i_2abg_cfg;
0560 extern const struct iwl_cfg iwl6000i_2bg_cfg;
0561 extern const struct iwl_cfg iwl6000_3agn_cfg;
0562 extern const struct iwl_cfg iwl6050_2agn_cfg;
0563 extern const struct iwl_cfg iwl6050_2abg_cfg;
0564 extern const struct iwl_cfg iwl6150_bgn_cfg;
0565 extern const struct iwl_cfg iwl6150_bg_cfg;
0566 extern const struct iwl_cfg iwl1000_bgn_cfg;
0567 extern const struct iwl_cfg iwl1000_bg_cfg;
0568 extern const struct iwl_cfg iwl100_bgn_cfg;
0569 extern const struct iwl_cfg iwl100_bg_cfg;
0570 extern const struct iwl_cfg iwl130_bgn_cfg;
0571 extern const struct iwl_cfg iwl130_bg_cfg;
0572 extern const struct iwl_cfg iwl2000_2bgn_cfg;
0573 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
0574 extern const struct iwl_cfg iwl2030_2bgn_cfg;
0575 extern const struct iwl_cfg iwl6035_2agn_cfg;
0576 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
0577 extern const struct iwl_cfg iwl105_bgn_cfg;
0578 extern const struct iwl_cfg iwl105_bgn_d_cfg;
0579 extern const struct iwl_cfg iwl135_bgn_cfg;
0580 #endif /* CONFIG_IWLDVM */
0581 #if IS_ENABLED(CONFIG_IWLMVM)
0582 extern const struct iwl_cfg iwl7260_2ac_cfg;
0583 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
0584 extern const struct iwl_cfg iwl7260_2n_cfg;
0585 extern const struct iwl_cfg iwl7260_n_cfg;
0586 extern const struct iwl_cfg iwl3160_2ac_cfg;
0587 extern const struct iwl_cfg iwl3160_2n_cfg;
0588 extern const struct iwl_cfg iwl3160_n_cfg;
0589 extern const struct iwl_cfg iwl3165_2ac_cfg;
0590 extern const struct iwl_cfg iwl3168_2ac_cfg;
0591 extern const struct iwl_cfg iwl7265_2ac_cfg;
0592 extern const struct iwl_cfg iwl7265_2n_cfg;
0593 extern const struct iwl_cfg iwl7265_n_cfg;
0594 extern const struct iwl_cfg iwl7265d_2ac_cfg;
0595 extern const struct iwl_cfg iwl7265d_2n_cfg;
0596 extern const struct iwl_cfg iwl7265d_n_cfg;
0597 extern const struct iwl_cfg iwl8260_2n_cfg;
0598 extern const struct iwl_cfg iwl8260_2ac_cfg;
0599 extern const struct iwl_cfg iwl8265_2ac_cfg;
0600 extern const struct iwl_cfg iwl8275_2ac_cfg;
0601 extern const struct iwl_cfg iwl4165_2ac_cfg;
0602 extern const struct iwl_cfg iwl9260_2ac_cfg;
0603 extern const struct iwl_cfg iwl9560_qu_b0_jf_b0_cfg;
0604 extern const struct iwl_cfg iwl9560_qu_c0_jf_b0_cfg;
0605 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
0606 extern const struct iwl_cfg iwl9560_qnj_b0_jf_b0_cfg;
0607 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
0608 extern const struct iwl_cfg iwl_qu_b0_hr1_b0;
0609 extern const struct iwl_cfg iwl_qu_c0_hr1_b0;
0610 extern const struct iwl_cfg iwl_quz_a0_hr1_b0;
0611 extern const struct iwl_cfg iwl_qu_b0_hr_b0;
0612 extern const struct iwl_cfg iwl_qu_c0_hr_b0;
0613 extern const struct iwl_cfg iwl_ax200_cfg_cc;
0614 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
0615 extern const struct iwl_cfg iwl_ax201_cfg_qu_c0_hr_b0;
0616 extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
0617 extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
0618 extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
0619 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_b0_hr_b0;
0620 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_b0_hr_b0;
0621 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_c0_hr_b0;
0622 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_c0_hr_b0;
0623 extern const struct iwl_cfg killer1650x_2ax_cfg;
0624 extern const struct iwl_cfg killer1650w_2ax_cfg;
0625 extern const struct iwl_cfg iwl_qnj_b0_hr_b0_cfg;
0626 extern const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0;
0627 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0;
0628 extern const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long;
0629 extern const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0;
0630 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0;
0631 extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
0632 extern const struct iwl_cfg iwlax411_2ax_cfg_sosnj_gf4_a0;
0633 extern const struct iwl_cfg iwlax211_cfg_snj_gf_a0;
0634 extern const struct iwl_cfg iwl_cfg_snj_hr_b0;
0635 extern const struct iwl_cfg iwl_cfg_snj_a0_jf_b0;
0636 extern const struct iwl_cfg iwl_cfg_ma_a0_hr_b0;
0637 extern const struct iwl_cfg iwl_cfg_ma_a0_gf_a0;
0638 extern const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0;
0639 extern const struct iwl_cfg iwl_cfg_ma_a0_mr_a0;
0640 extern const struct iwl_cfg iwl_cfg_ma_a0_ms_a0;
0641 extern const struct iwl_cfg iwl_cfg_ma_a0_fm_a0;
0642 extern const struct iwl_cfg iwl_cfg_snj_a0_mr_a0;
0643 extern const struct iwl_cfg iwl_cfg_snj_a0_ms_a0;
0644 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
0645 extern const struct iwl_cfg iwl_cfg_so_a0_ms_a0;
0646 extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0;
0647 extern const struct iwl_cfg iwl_cfg_bz_a0_hr_b0;
0648 extern const struct iwl_cfg iwl_cfg_bz_a0_gf_a0;
0649 extern const struct iwl_cfg iwl_cfg_bz_a0_gf4_a0;
0650 extern const struct iwl_cfg iwl_cfg_bz_a0_mr_a0;
0651 extern const struct iwl_cfg iwl_cfg_bz_a0_fm_a0;
0652 extern const struct iwl_cfg iwl_cfg_gl_a0_fm_a0;
0653 extern const struct iwl_cfg iwl_cfg_bz_z0_gf_a0;
0654 extern const struct iwl_cfg iwl_cfg_bnj_a0_fm_a0;
0655 extern const struct iwl_cfg iwl_cfg_bnj_a0_fm4_a0;
0656 extern const struct iwl_cfg iwl_cfg_bnj_a0_gf_a0;
0657 extern const struct iwl_cfg iwl_cfg_bnj_a0_gf4_a0;
0658 extern const struct iwl_cfg iwl_cfg_bnj_a0_hr_b0;
0659 #endif /* CONFIG_IWLMVM */
0660
0661 #endif /* __IWL_CONFIG_H__ */