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0001 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
0002 /*
0003  * Copyright (C) 2017 Intel Deutschland GmbH
0004  * Copyright (C) 2019-2021 Intel Corporation
0005  */
0006 #include "iwl-drv.h"
0007 #include "runtime.h"
0008 #include "dbg.h"
0009 #include "debugfs.h"
0010 
0011 #include "fw/api/system.h"
0012 #include "fw/api/commands.h"
0013 #include "fw/api/rx.h"
0014 #include "fw/api/datapath.h"
0015 
0016 void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans,
0017             const struct iwl_fw *fw,
0018             const struct iwl_fw_runtime_ops *ops, void *ops_ctx,
0019             const struct iwl_dump_sanitize_ops *sanitize_ops,
0020             void *sanitize_ctx,
0021             struct dentry *dbgfs_dir)
0022 {
0023     int i;
0024 
0025     memset(fwrt, 0, sizeof(*fwrt));
0026     fwrt->trans = trans;
0027     fwrt->fw = fw;
0028     fwrt->dev = trans->dev;
0029     fwrt->dump.conf = FW_DBG_INVALID;
0030     fwrt->ops = ops;
0031     fwrt->sanitize_ops = sanitize_ops;
0032     fwrt->sanitize_ctx = sanitize_ctx;
0033     fwrt->ops_ctx = ops_ctx;
0034     for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) {
0035         fwrt->dump.wks[i].idx = i;
0036         INIT_DELAYED_WORK(&fwrt->dump.wks[i].wk, iwl_fw_error_dump_wk);
0037     }
0038     iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir);
0039 }
0040 IWL_EXPORT_SYMBOL(iwl_fw_runtime_init);
0041 
0042 void iwl_fw_runtime_suspend(struct iwl_fw_runtime *fwrt)
0043 {
0044     iwl_fw_suspend_timestamp(fwrt);
0045     iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_START, NULL);
0046 }
0047 IWL_EXPORT_SYMBOL(iwl_fw_runtime_suspend);
0048 
0049 void iwl_fw_runtime_resume(struct iwl_fw_runtime *fwrt)
0050 {
0051     iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_END, NULL);
0052     iwl_fw_resume_timestamp(fwrt);
0053 }
0054 IWL_EXPORT_SYMBOL(iwl_fw_runtime_resume);
0055 
0056 /* set device type and latency */
0057 int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt)
0058 {
0059     struct iwl_soc_configuration_cmd cmd = {};
0060     struct iwl_host_cmd hcmd = {
0061         .id = WIDE_ID(SYSTEM_GROUP, SOC_CONFIGURATION_CMD),
0062         .data[0] = &cmd,
0063         .len[0] = sizeof(cmd),
0064     };
0065     int ret;
0066 
0067     /*
0068      * In VER_1 of this command, the discrete value is considered
0069      * an integer; In VER_2, it's a bitmask.  Since we have only 2
0070      * values in VER_1, this is backwards-compatible with VER_2,
0071      * as long as we don't set any other bits.
0072      */
0073     if (!fwrt->trans->trans_cfg->integrated)
0074         cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE);
0075 
0076     BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE !=
0077              SOC_FLAGS_LTR_APPLY_DELAY_NONE);
0078     BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US !=
0079              SOC_FLAGS_LTR_APPLY_DELAY_200);
0080     BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US !=
0081              SOC_FLAGS_LTR_APPLY_DELAY_2500);
0082     BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US !=
0083              SOC_FLAGS_LTR_APPLY_DELAY_1820);
0084 
0085     if (fwrt->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE &&
0086         !WARN_ON(!fwrt->trans->trans_cfg->integrated))
0087         cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay,
0088                           SOC_FLAGS_LTR_APPLY_DELAY_MASK);
0089 
0090     if (iwl_fw_lookup_cmd_ver(fwrt->fw, SCAN_REQ_UMAC,
0091                   IWL_FW_CMD_VER_UNKNOWN) >= 2 &&
0092         fwrt->trans->trans_cfg->low_latency_xtal)
0093         cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY);
0094 
0095     cmd.latency = cpu_to_le32(fwrt->trans->trans_cfg->xtal_latency);
0096 
0097     ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
0098     if (ret)
0099         IWL_ERR(fwrt, "Failed to set soc latency: %d\n", ret);
0100     return ret;
0101 }
0102 IWL_EXPORT_SYMBOL(iwl_set_soc_latency);
0103 
0104 int iwl_configure_rxq(struct iwl_fw_runtime *fwrt)
0105 {
0106     int i, num_queues, size, ret;
0107     struct iwl_rfh_queue_config *cmd;
0108     struct iwl_host_cmd hcmd = {
0109         .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD),
0110         .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
0111     };
0112 
0113     /*
0114      * The default queue is configured via context info, so if we
0115      * have a single queue, there's nothing to do here.
0116      */
0117     if (fwrt->trans->num_rx_queues == 1)
0118         return 0;
0119 
0120     if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_22000)
0121         return 0;
0122 
0123     /* skip the default queue */
0124     num_queues = fwrt->trans->num_rx_queues - 1;
0125 
0126     size = struct_size(cmd, data, num_queues);
0127 
0128     cmd = kzalloc(size, GFP_KERNEL);
0129     if (!cmd)
0130         return -ENOMEM;
0131 
0132     cmd->num_queues = num_queues;
0133 
0134     for (i = 0; i < num_queues; i++) {
0135         struct iwl_trans_rxq_dma_data data;
0136 
0137         cmd->data[i].q_num = i + 1;
0138         iwl_trans_get_rxq_dma_data(fwrt->trans, i + 1, &data);
0139 
0140         cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb);
0141         cmd->data[i].urbd_stts_wrptr =
0142             cpu_to_le64(data.urbd_stts_wrptr);
0143         cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb);
0144         cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid);
0145     }
0146 
0147     hcmd.data[0] = cmd;
0148     hcmd.len[0] = size;
0149 
0150     ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
0151 
0152     kfree(cmd);
0153 
0154     if (ret)
0155         IWL_ERR(fwrt, "Failed to configure RX queues: %d\n", ret);
0156 
0157     return ret;
0158 }
0159 IWL_EXPORT_SYMBOL(iwl_configure_rxq);