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0001 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 0002 /* 0003 * Copyright (C) 2012-2014, 2018-2019 Intel Corporation 0004 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 0005 * Copyright (C) 2016-2017 Intel Deutschland GmbH 0006 */ 0007 #ifndef __iwl_fw_api_config_h__ 0008 #define __iwl_fw_api_config_h__ 0009 0010 /* 0011 * struct iwl_dqa_enable_cmd 0012 * @cmd_queue: the TXQ number of the command queue 0013 */ 0014 struct iwl_dqa_enable_cmd { 0015 __le32 cmd_queue; 0016 } __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */ 0017 0018 /* 0019 * struct iwl_tx_ant_cfg_cmd 0020 * @valid: valid antenna configuration 0021 */ 0022 struct iwl_tx_ant_cfg_cmd { 0023 __le32 valid; 0024 } __packed; 0025 0026 /** 0027 * struct iwl_calib_ctrl - Calibration control struct. 0028 * Sent as part of the phy configuration command. 0029 * @flow_trigger: bitmap for which calibrations to perform according to 0030 * flow triggers, using &enum iwl_calib_cfg 0031 * @event_trigger: bitmap for which calibrations to perform according to 0032 * event triggers, using &enum iwl_calib_cfg 0033 */ 0034 struct iwl_calib_ctrl { 0035 __le32 flow_trigger; 0036 __le32 event_trigger; 0037 } __packed; 0038 0039 /* This enum defines the bitmap of various calibrations to enable in both 0040 * init ucode and runtime ucode through CALIBRATION_CFG_CMD. 0041 */ 0042 enum iwl_calib_cfg { 0043 IWL_CALIB_CFG_XTAL_IDX = BIT(0), 0044 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), 0045 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), 0046 IWL_CALIB_CFG_PAPD_IDX = BIT(3), 0047 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), 0048 IWL_CALIB_CFG_DC_IDX = BIT(5), 0049 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), 0050 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), 0051 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), 0052 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9), 0053 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10), 0054 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11), 0055 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12), 0056 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13), 0057 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14), 0058 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15), 0059 IWL_CALIB_CFG_DAC_IDX = BIT(16), 0060 IWL_CALIB_CFG_ABS_IDX = BIT(17), 0061 IWL_CALIB_CFG_AGC_IDX = BIT(18), 0062 }; 0063 0064 /** 0065 * struct iwl_phy_specific_cfg - specific PHY filter configuration 0066 * 0067 * Sent as part of the phy configuration command (v3) to configure specific FW 0068 * defined PHY filters that can be applied to each antenna. 0069 * 0070 * @filter_cfg_chain_a: filter config id for LMAC1 chain A 0071 * @filter_cfg_chain_b: filter config id for LMAC1 chain B 0072 * @filter_cfg_chain_c: filter config id for LMAC2 chain A 0073 * @filter_cfg_chain_d: filter config id for LMAC2 chain B 0074 * values: 0 - no filter; 0xffffffff - reserved; otherwise - filter id 0075 */ 0076 struct iwl_phy_specific_cfg { 0077 __le32 filter_cfg_chain_a; 0078 __le32 filter_cfg_chain_b; 0079 __le32 filter_cfg_chain_c; 0080 __le32 filter_cfg_chain_d; 0081 } __packed; /* PHY_SPECIFIC_CONFIGURATION_API_VER_1*/ 0082 0083 /** 0084 * struct iwl_phy_cfg_cmd - Phy configuration command 0085 * 0086 * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg 0087 * @calib_control: calibration control data 0088 */ 0089 struct iwl_phy_cfg_cmd_v1 { 0090 __le32 phy_cfg; 0091 struct iwl_calib_ctrl calib_control; 0092 } __packed; 0093 0094 /** 0095 * struct iwl_phy_cfg_cmd_v3 - Phy configuration command (v3) 0096 * 0097 * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg 0098 * @calib_control: calibration control data 0099 * @phy_specific_cfg: configure predefined PHY filters 0100 */ 0101 struct iwl_phy_cfg_cmd_v3 { 0102 __le32 phy_cfg; 0103 struct iwl_calib_ctrl calib_control; 0104 struct iwl_phy_specific_cfg phy_specific_cfg; 0105 } __packed; /* PHY_CONFIGURATION_CMD_API_S_VER_3 */ 0106 0107 /* 0108 * enum iwl_dc2dc_config_id - flag ids 0109 * 0110 * Ids of dc2dc configuration flags 0111 */ 0112 enum iwl_dc2dc_config_id { 0113 DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */ 0114 DCDC_FREQ_TUNE_SET = 0x2, 0115 }; /* MARKER_ID_API_E_VER_1 */ 0116 0117 #endif /* __iwl_fw_api_config_h__ */
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