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0008 #include <linux/etherdevice.h>
0009 #include "iwl-trans.h"
0010 #include "iwl-modparams.h"
0011 #include "dev.h"
0012 #include "agn.h"
0013 #include "calib.h"
0014
0015
0016
0017
0018 void iwl_connection_init_rx_config(struct iwl_priv *priv,
0019 struct iwl_rxon_context *ctx)
0020 {
0021 memset(&ctx->staging, 0, sizeof(ctx->staging));
0022
0023 if (!ctx->vif) {
0024 ctx->staging.dev_type = ctx->unused_devtype;
0025 } else
0026 switch (ctx->vif->type) {
0027 case NL80211_IFTYPE_AP:
0028 ctx->staging.dev_type = ctx->ap_devtype;
0029 break;
0030
0031 case NL80211_IFTYPE_STATION:
0032 ctx->staging.dev_type = ctx->station_devtype;
0033 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
0034 break;
0035
0036 case NL80211_IFTYPE_ADHOC:
0037 ctx->staging.dev_type = ctx->ibss_devtype;
0038 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
0039 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
0040 RXON_FILTER_ACCEPT_GRP_MSK;
0041 break;
0042
0043 case NL80211_IFTYPE_MONITOR:
0044 ctx->staging.dev_type = RXON_DEV_TYPE_SNIFFER;
0045 break;
0046
0047 default:
0048 IWL_ERR(priv, "Unsupported interface type %d\n",
0049 ctx->vif->type);
0050 break;
0051 }
0052
0053 #if 0
0054
0055
0056 if (!hw_to_local(priv->hw)->short_preamble)
0057 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
0058 else
0059 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
0060 #endif
0061
0062 ctx->staging.channel =
0063 cpu_to_le16(priv->hw->conf.chandef.chan->hw_value);
0064 priv->band = priv->hw->conf.chandef.chan->band;
0065
0066 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
0067
0068
0069 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
0070 RXON_FLG_CHANNEL_MODE_PURE_40);
0071 if (ctx->vif)
0072 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
0073
0074 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
0075 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
0076 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
0077 }
0078
0079 static int iwlagn_disable_bss(struct iwl_priv *priv,
0080 struct iwl_rxon_context *ctx,
0081 struct iwl_rxon_cmd *send)
0082 {
0083 __le32 old_filter = send->filter_flags;
0084 int ret;
0085
0086 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
0087 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
0088 0, sizeof(*send), send);
0089
0090 send->filter_flags = old_filter;
0091
0092 if (ret)
0093 IWL_DEBUG_QUIET_RFKILL(priv,
0094 "Error clearing ASSOC_MSK on BSS (%d)\n", ret);
0095
0096 return ret;
0097 }
0098
0099 static int iwlagn_disable_pan(struct iwl_priv *priv,
0100 struct iwl_rxon_context *ctx,
0101 struct iwl_rxon_cmd *send)
0102 {
0103 struct iwl_notification_wait disable_wait;
0104 __le32 old_filter = send->filter_flags;
0105 u8 old_dev_type = send->dev_type;
0106 int ret;
0107 static const u16 deactivate_cmd[] = {
0108 REPLY_WIPAN_DEACTIVATION_COMPLETE
0109 };
0110
0111 iwl_init_notification_wait(&priv->notif_wait, &disable_wait,
0112 deactivate_cmd, ARRAY_SIZE(deactivate_cmd),
0113 NULL, NULL);
0114
0115 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
0116 send->dev_type = RXON_DEV_TYPE_P2P;
0117 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
0118 0, sizeof(*send), send);
0119
0120 send->filter_flags = old_filter;
0121 send->dev_type = old_dev_type;
0122
0123 if (ret) {
0124 IWL_ERR(priv, "Error disabling PAN (%d)\n", ret);
0125 iwl_remove_notification(&priv->notif_wait, &disable_wait);
0126 } else {
0127 ret = iwl_wait_notification(&priv->notif_wait,
0128 &disable_wait, HZ);
0129 if (ret)
0130 IWL_ERR(priv, "Timed out waiting for PAN disable\n");
0131 }
0132
0133 return ret;
0134 }
0135
0136 static int iwlagn_disconn_pan(struct iwl_priv *priv,
0137 struct iwl_rxon_context *ctx,
0138 struct iwl_rxon_cmd *send)
0139 {
0140 __le32 old_filter = send->filter_flags;
0141 int ret;
0142
0143 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
0144 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, 0,
0145 sizeof(*send), send);
0146
0147 send->filter_flags = old_filter;
0148
0149 return ret;
0150 }
0151
0152 static void iwlagn_update_qos(struct iwl_priv *priv,
0153 struct iwl_rxon_context *ctx)
0154 {
0155 int ret;
0156
0157 if (!ctx->is_active)
0158 return;
0159
0160 ctx->qos_data.def_qos_parm.qos_flags = 0;
0161
0162 if (ctx->qos_data.qos_active)
0163 ctx->qos_data.def_qos_parm.qos_flags |=
0164 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
0165
0166 if (ctx->ht.enabled)
0167 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
0168
0169 IWL_DEBUG_INFO(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
0170 ctx->qos_data.qos_active,
0171 ctx->qos_data.def_qos_parm.qos_flags);
0172
0173 ret = iwl_dvm_send_cmd_pdu(priv, ctx->qos_cmd, 0,
0174 sizeof(struct iwl_qosparam_cmd),
0175 &ctx->qos_data.def_qos_parm);
0176 if (ret)
0177 IWL_DEBUG_QUIET_RFKILL(priv, "Failed to update QoS\n");
0178 }
0179
0180 static int iwlagn_update_beacon(struct iwl_priv *priv,
0181 struct ieee80211_vif *vif)
0182 {
0183 lockdep_assert_held(&priv->mutex);
0184
0185 dev_kfree_skb(priv->beacon_skb);
0186 priv->beacon_skb = ieee80211_beacon_get(priv->hw, vif, 0);
0187 if (!priv->beacon_skb)
0188 return -ENOMEM;
0189 return iwlagn_send_beacon_cmd(priv);
0190 }
0191
0192 static int iwlagn_send_rxon_assoc(struct iwl_priv *priv,
0193 struct iwl_rxon_context *ctx)
0194 {
0195 int ret = 0;
0196 struct iwl_rxon_assoc_cmd rxon_assoc;
0197 const struct iwl_rxon_cmd *rxon1 = &ctx->staging;
0198 const struct iwl_rxon_cmd *rxon2 = &ctx->active;
0199
0200 if ((rxon1->flags == rxon2->flags) &&
0201 (rxon1->filter_flags == rxon2->filter_flags) &&
0202 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
0203 (rxon1->ofdm_ht_single_stream_basic_rates ==
0204 rxon2->ofdm_ht_single_stream_basic_rates) &&
0205 (rxon1->ofdm_ht_dual_stream_basic_rates ==
0206 rxon2->ofdm_ht_dual_stream_basic_rates) &&
0207 (rxon1->ofdm_ht_triple_stream_basic_rates ==
0208 rxon2->ofdm_ht_triple_stream_basic_rates) &&
0209 (rxon1->acquisition_data == rxon2->acquisition_data) &&
0210 (rxon1->rx_chain == rxon2->rx_chain) &&
0211 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
0212 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
0213 return 0;
0214 }
0215
0216 rxon_assoc.flags = ctx->staging.flags;
0217 rxon_assoc.filter_flags = ctx->staging.filter_flags;
0218 rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
0219 rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
0220 rxon_assoc.reserved1 = 0;
0221 rxon_assoc.reserved2 = 0;
0222 rxon_assoc.reserved3 = 0;
0223 rxon_assoc.ofdm_ht_single_stream_basic_rates =
0224 ctx->staging.ofdm_ht_single_stream_basic_rates;
0225 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
0226 ctx->staging.ofdm_ht_dual_stream_basic_rates;
0227 rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
0228 rxon_assoc.ofdm_ht_triple_stream_basic_rates =
0229 ctx->staging.ofdm_ht_triple_stream_basic_rates;
0230 rxon_assoc.acquisition_data = ctx->staging.acquisition_data;
0231
0232 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_assoc_cmd,
0233 CMD_ASYNC, sizeof(rxon_assoc), &rxon_assoc);
0234 return ret;
0235 }
0236
0237 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
0238 {
0239 u16 new_val;
0240 u16 beacon_factor;
0241
0242
0243
0244
0245
0246
0247
0248 if (!beacon_val)
0249 return DEFAULT_BEACON_INTERVAL;
0250
0251
0252
0253
0254
0255
0256
0257
0258
0259
0260
0261
0262
0263 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
0264 new_val = beacon_val / beacon_factor;
0265
0266 if (!new_val)
0267 new_val = max_beacon_val;
0268
0269 return new_val;
0270 }
0271
0272 static int iwl_send_rxon_timing(struct iwl_priv *priv,
0273 struct iwl_rxon_context *ctx)
0274 {
0275 u64 tsf;
0276 s32 interval_tm, rem;
0277 struct ieee80211_conf *conf = NULL;
0278 u16 beacon_int;
0279 struct ieee80211_vif *vif = ctx->vif;
0280
0281 conf = &priv->hw->conf;
0282
0283 lockdep_assert_held(&priv->mutex);
0284
0285 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
0286
0287 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
0288 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
0289
0290 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
0291
0292
0293
0294
0295
0296 ctx->timing.atim_window = 0;
0297
0298 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
0299 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
0300 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
0301 priv->contexts[IWL_RXON_CTX_BSS].vif &&
0302 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
0303 ctx->timing.beacon_interval =
0304 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
0305 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
0306 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
0307 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
0308 priv->contexts[IWL_RXON_CTX_PAN].vif &&
0309 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
0310 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
0311 !ctx->vif->bss_conf.beacon_int)) {
0312 ctx->timing.beacon_interval =
0313 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
0314 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
0315 } else {
0316 beacon_int = iwl_adjust_beacon_interval(beacon_int,
0317 IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);
0318 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
0319 }
0320
0321 ctx->beacon_int = beacon_int;
0322
0323 tsf = priv->timestamp;
0324 interval_tm = beacon_int * TIME_UNIT;
0325 rem = do_div(tsf, interval_tm);
0326 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
0327
0328 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
0329
0330 IWL_DEBUG_ASSOC(priv,
0331 "beacon interval %d beacon timer %d beacon tim %d\n",
0332 le16_to_cpu(ctx->timing.beacon_interval),
0333 le32_to_cpu(ctx->timing.beacon_init_val),
0334 le16_to_cpu(ctx->timing.atim_window));
0335
0336 return iwl_dvm_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
0337 0, sizeof(ctx->timing), &ctx->timing);
0338 }
0339
0340 static int iwlagn_rxon_disconn(struct iwl_priv *priv,
0341 struct iwl_rxon_context *ctx)
0342 {
0343 int ret;
0344 struct iwl_rxon_cmd *active = (void *)&ctx->active;
0345
0346 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
0347 ret = iwlagn_disable_bss(priv, ctx, &ctx->staging);
0348 } else {
0349 ret = iwlagn_disable_pan(priv, ctx, &ctx->staging);
0350 if (ret)
0351 return ret;
0352 if (ctx->vif) {
0353 ret = iwl_send_rxon_timing(priv, ctx);
0354 if (ret) {
0355 IWL_ERR(priv, "Failed to send timing (%d)!\n", ret);
0356 return ret;
0357 }
0358 ret = iwlagn_disconn_pan(priv, ctx, &ctx->staging);
0359 }
0360 }
0361 if (ret)
0362 return ret;
0363
0364
0365
0366
0367
0368 iwl_clear_ucode_stations(priv, ctx);
0369
0370 iwl_update_bcast_station(priv, ctx);
0371 iwl_restore_stations(priv, ctx);
0372 ret = iwl_restore_default_wep_keys(priv, ctx);
0373 if (ret) {
0374 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
0375 return ret;
0376 }
0377
0378 memcpy(active, &ctx->staging, sizeof(*active));
0379 return 0;
0380 }
0381
0382 static int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
0383 {
0384 int ret;
0385 s8 prev_tx_power;
0386 bool defer;
0387 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
0388
0389 if (priv->calib_disabled & IWL_TX_POWER_CALIB_DISABLED)
0390 return 0;
0391
0392 lockdep_assert_held(&priv->mutex);
0393
0394 if (priv->tx_power_user_lmt == tx_power && !force)
0395 return 0;
0396
0397 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
0398 IWL_WARN(priv,
0399 "Requested user TXPOWER %d below lower limit %d.\n",
0400 tx_power,
0401 IWLAGN_TX_POWER_TARGET_POWER_MIN);
0402 return -EINVAL;
0403 }
0404
0405 if (tx_power > DIV_ROUND_UP(priv->nvm_data->max_tx_pwr_half_dbm, 2)) {
0406 IWL_WARN(priv,
0407 "Requested user TXPOWER %d above upper limit %d.\n",
0408 tx_power, priv->nvm_data->max_tx_pwr_half_dbm);
0409 return -EINVAL;
0410 }
0411
0412 if (!iwl_is_ready_rf(priv))
0413 return -EIO;
0414
0415
0416
0417 priv->tx_power_next = tx_power;
0418
0419
0420 defer = test_bit(STATUS_SCANNING, &priv->status) ||
0421 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
0422 if (defer && !force) {
0423 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
0424 return 0;
0425 }
0426
0427 prev_tx_power = priv->tx_power_user_lmt;
0428 priv->tx_power_user_lmt = tx_power;
0429
0430 ret = iwlagn_send_tx_power(priv);
0431
0432
0433 if (ret) {
0434 priv->tx_power_user_lmt = prev_tx_power;
0435 priv->tx_power_next = prev_tx_power;
0436 }
0437 return ret;
0438 }
0439
0440 static int iwlagn_rxon_connect(struct iwl_priv *priv,
0441 struct iwl_rxon_context *ctx)
0442 {
0443 int ret;
0444 struct iwl_rxon_cmd *active = (void *)&ctx->active;
0445
0446
0447 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
0448 ret = iwl_send_rxon_timing(priv, ctx);
0449 if (ret) {
0450 IWL_ERR(priv, "Failed to send timing (%d)!\n", ret);
0451 return ret;
0452 }
0453 }
0454
0455 iwlagn_update_qos(priv, ctx);
0456
0457
0458
0459
0460
0461
0462 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_AP)) {
0463 ret = iwlagn_update_beacon(priv, ctx->vif);
0464 if (ret) {
0465 IWL_ERR(priv,
0466 "Error sending required beacon (%d)!\n",
0467 ret);
0468 return ret;
0469 }
0470 }
0471
0472 priv->start_calib = 0;
0473
0474
0475
0476
0477
0478
0479 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, 0,
0480 sizeof(struct iwl_rxon_cmd), &ctx->staging);
0481 if (ret) {
0482 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
0483 return ret;
0484 }
0485 memcpy(active, &ctx->staging, sizeof(*active));
0486
0487
0488 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC))
0489 if (iwlagn_update_beacon(priv, ctx->vif))
0490 IWL_ERR(priv, "Error sending IBSS beacon\n");
0491 iwl_init_sensitivity(priv);
0492
0493
0494
0495
0496
0497
0498
0499
0500 ret = iwl_set_tx_power(priv, priv->tx_power_next, true);
0501 if (ret) {
0502 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
0503 return ret;
0504 }
0505
0506 return 0;
0507 }
0508
0509 int iwlagn_set_pan_params(struct iwl_priv *priv)
0510 {
0511 struct iwl_wipan_params_cmd cmd;
0512 struct iwl_rxon_context *ctx_bss, *ctx_pan;
0513 int slot0 = 300, slot1 = 0;
0514 int ret;
0515
0516 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS))
0517 return 0;
0518
0519 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
0520
0521 lockdep_assert_held(&priv->mutex);
0522
0523 ctx_bss = &priv->contexts[IWL_RXON_CTX_BSS];
0524 ctx_pan = &priv->contexts[IWL_RXON_CTX_PAN];
0525
0526
0527
0528
0529
0530
0531
0532 if (!ctx_pan->is_active)
0533 return 0;
0534
0535 memset(&cmd, 0, sizeof(cmd));
0536
0537
0538 cmd.num_slots = 2;
0539
0540 cmd.slots[0].type = 0;
0541 cmd.slots[1].type = 1;
0542
0543 if (ctx_bss->vif && ctx_pan->vif) {
0544 int bcnint = ctx_pan->beacon_int;
0545 int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1;
0546
0547
0548 cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE);
0549
0550 if (ctx_pan->vif->type == NL80211_IFTYPE_AP &&
0551 bcnint &&
0552 bcnint != ctx_bss->beacon_int) {
0553 IWL_ERR(priv,
0554 "beacon intervals don't match (%d, %d)\n",
0555 ctx_bss->beacon_int, ctx_pan->beacon_int);
0556 } else
0557 bcnint = max_t(int, bcnint,
0558 ctx_bss->beacon_int);
0559 if (!bcnint)
0560 bcnint = DEFAULT_BEACON_INTERVAL;
0561 slot0 = bcnint / 2;
0562 slot1 = bcnint - slot0;
0563
0564 if (test_bit(STATUS_SCAN_HW, &priv->status) ||
0565 (!ctx_bss->vif->cfg.idle &&
0566 !ctx_bss->vif->cfg.assoc)) {
0567 slot0 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
0568 slot1 = IWL_MIN_SLOT_TIME;
0569 } else if (!ctx_pan->vif->cfg.idle &&
0570 !ctx_pan->vif->cfg.assoc) {
0571 slot1 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
0572 slot0 = IWL_MIN_SLOT_TIME;
0573 }
0574 } else if (ctx_pan->vif) {
0575 slot0 = 0;
0576 slot1 = max_t(int, 1, ctx_pan->vif->bss_conf.dtim_period) *
0577 ctx_pan->beacon_int;
0578 slot1 = max_t(int, DEFAULT_BEACON_INTERVAL, slot1);
0579
0580 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
0581 slot0 = slot1 * 3 - IWL_MIN_SLOT_TIME;
0582 slot1 = IWL_MIN_SLOT_TIME;
0583 }
0584 }
0585
0586 cmd.slots[0].width = cpu_to_le16(slot0);
0587 cmd.slots[1].width = cpu_to_le16(slot1);
0588
0589 ret = iwl_dvm_send_cmd_pdu(priv, REPLY_WIPAN_PARAMS, 0,
0590 sizeof(cmd), &cmd);
0591 if (ret)
0592 IWL_ERR(priv, "Error setting PAN parameters (%d)\n", ret);
0593
0594 return ret;
0595 }
0596
0597 static void _iwl_set_rxon_ht(struct iwl_priv *priv,
0598 struct iwl_ht_config *ht_conf,
0599 struct iwl_rxon_context *ctx)
0600 {
0601 struct iwl_rxon_cmd *rxon = &ctx->staging;
0602
0603 if (!ctx->ht.enabled) {
0604 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
0605 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
0606 RXON_FLG_HT40_PROT_MSK |
0607 RXON_FLG_HT_PROT_MSK);
0608 return;
0609 }
0610
0611
0612
0613
0614 rxon->flags |= cpu_to_le32(ctx->ht.protection <<
0615 RXON_FLG_HT_OPERATING_MODE_POS);
0616
0617
0618
0619
0620 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
0621 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
0622 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
0623
0624 if (ctx->ht.protection ==
0625 IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
0626 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
0627
0628
0629
0630
0631 switch (ctx->ht.extension_chan_offset) {
0632 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
0633 rxon->flags &=
0634 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
0635 break;
0636 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
0637 rxon->flags |=
0638 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
0639 break;
0640 }
0641 } else {
0642
0643
0644
0645
0646 switch (ctx->ht.extension_chan_offset) {
0647 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
0648 rxon->flags &=
0649 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
0650 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
0651 break;
0652 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
0653 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
0654 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
0655 break;
0656 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
0657 default:
0658
0659
0660
0661
0662 IWL_ERR(priv,
0663 "invalid extension channel offset\n");
0664 break;
0665 }
0666 }
0667 } else {
0668 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
0669 }
0670
0671 iwlagn_set_rxon_chain(priv, ctx);
0672
0673 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
0674 "extension channel offset 0x%x\n",
0675 le32_to_cpu(rxon->flags), ctx->ht.protection,
0676 ctx->ht.extension_chan_offset);
0677 }
0678
0679 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
0680 {
0681 struct iwl_rxon_context *ctx;
0682
0683 for_each_context(priv, ctx)
0684 _iwl_set_rxon_ht(priv, ht_conf, ctx);
0685 }
0686
0687
0688
0689
0690
0691
0692
0693
0694 void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
0695 struct iwl_rxon_context *ctx)
0696 {
0697 enum nl80211_band band = ch->band;
0698 u16 channel = ch->hw_value;
0699
0700 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
0701 (priv->band == band))
0702 return;
0703
0704 ctx->staging.channel = cpu_to_le16(channel);
0705 if (band == NL80211_BAND_5GHZ)
0706 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
0707 else
0708 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
0709
0710 priv->band = band;
0711
0712 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
0713
0714 }
0715
0716 void iwl_set_flags_for_band(struct iwl_priv *priv,
0717 struct iwl_rxon_context *ctx,
0718 enum nl80211_band band,
0719 struct ieee80211_vif *vif)
0720 {
0721 if (band == NL80211_BAND_5GHZ) {
0722 ctx->staging.flags &=
0723 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
0724 | RXON_FLG_CCK_MSK);
0725 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
0726 } else {
0727
0728 if (vif && vif->bss_conf.use_short_slot)
0729 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
0730 else
0731 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
0732
0733 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
0734 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
0735 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
0736 }
0737 }
0738
0739 static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv,
0740 struct iwl_rxon_context *ctx, int hw_decrypt)
0741 {
0742 struct iwl_rxon_cmd *rxon = &ctx->staging;
0743
0744 if (hw_decrypt)
0745 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
0746 else
0747 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
0748
0749 }
0750
0751
0752 static int iwl_check_rxon_cmd(struct iwl_priv *priv,
0753 struct iwl_rxon_context *ctx)
0754 {
0755 struct iwl_rxon_cmd *rxon = &ctx->staging;
0756 u32 errors = 0;
0757
0758 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
0759 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
0760 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
0761 errors |= BIT(0);
0762 }
0763 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
0764 IWL_WARN(priv, "check 2.4G: wrong radar\n");
0765 errors |= BIT(1);
0766 }
0767 } else {
0768 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
0769 IWL_WARN(priv, "check 5.2G: not short slot!\n");
0770 errors |= BIT(2);
0771 }
0772 if (rxon->flags & RXON_FLG_CCK_MSK) {
0773 IWL_WARN(priv, "check 5.2G: CCK!\n");
0774 errors |= BIT(3);
0775 }
0776 }
0777 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
0778 IWL_WARN(priv, "mac/bssid mcast!\n");
0779 errors |= BIT(4);
0780 }
0781
0782
0783 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
0784 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
0785 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
0786 errors |= BIT(5);
0787 }
0788
0789 if (le16_to_cpu(rxon->assoc_id) > 2007) {
0790 IWL_WARN(priv, "aid > 2007\n");
0791 errors |= BIT(6);
0792 }
0793
0794 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
0795 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
0796 IWL_WARN(priv, "CCK and short slot\n");
0797 errors |= BIT(7);
0798 }
0799
0800 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
0801 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
0802 IWL_WARN(priv, "CCK and auto detect\n");
0803 errors |= BIT(8);
0804 }
0805
0806 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
0807 RXON_FLG_TGG_PROTECT_MSK)) ==
0808 RXON_FLG_TGG_PROTECT_MSK) {
0809 IWL_WARN(priv, "TGg but no auto-detect\n");
0810 errors |= BIT(9);
0811 }
0812
0813 if (rxon->channel == 0) {
0814 IWL_WARN(priv, "zero channel is invalid\n");
0815 errors |= BIT(10);
0816 }
0817
0818 WARN(errors, "Invalid RXON (%#x), channel %d",
0819 errors, le16_to_cpu(rxon->channel));
0820
0821 return errors ? -EINVAL : 0;
0822 }
0823
0824
0825
0826
0827
0828
0829
0830
0831
0832 static int iwl_full_rxon_required(struct iwl_priv *priv,
0833 struct iwl_rxon_context *ctx)
0834 {
0835 const struct iwl_rxon_cmd *staging = &ctx->staging;
0836 const struct iwl_rxon_cmd *active = &ctx->active;
0837
0838 #define CHK(cond) \
0839 if ((cond)) { \
0840 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
0841 return 1; \
0842 }
0843
0844 #define CHK_NEQ(c1, c2) \
0845 if ((c1) != (c2)) { \
0846 IWL_DEBUG_INFO(priv, "need full RXON - " \
0847 #c1 " != " #c2 " - %d != %d\n", \
0848 (c1), (c2)); \
0849 return 1; \
0850 }
0851
0852
0853 CHK(!iwl_is_associated_ctx(ctx));
0854 CHK(!ether_addr_equal(staging->bssid_addr, active->bssid_addr));
0855 CHK(!ether_addr_equal(staging->node_addr, active->node_addr));
0856 CHK(!ether_addr_equal(staging->wlap_bssid_addr,
0857 active->wlap_bssid_addr));
0858 CHK_NEQ(staging->dev_type, active->dev_type);
0859 CHK_NEQ(staging->channel, active->channel);
0860 CHK_NEQ(staging->air_propagation, active->air_propagation);
0861 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
0862 active->ofdm_ht_single_stream_basic_rates);
0863 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
0864 active->ofdm_ht_dual_stream_basic_rates);
0865 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
0866 active->ofdm_ht_triple_stream_basic_rates);
0867 CHK_NEQ(staging->assoc_id, active->assoc_id);
0868
0869
0870
0871
0872
0873
0874 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
0875 active->flags & RXON_FLG_BAND_24G_MSK);
0876
0877
0878 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
0879 active->filter_flags & RXON_FILTER_ASSOC_MSK);
0880
0881 #undef CHK
0882 #undef CHK_NEQ
0883
0884 return 0;
0885 }
0886
0887 #ifdef CONFIG_IWLWIFI_DEBUG
0888 void iwl_print_rx_config_cmd(struct iwl_priv *priv,
0889 enum iwl_rxon_context_id ctxid)
0890 {
0891 struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
0892 struct iwl_rxon_cmd *rxon = &ctx->staging;
0893
0894 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
0895 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
0896 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n",
0897 le16_to_cpu(rxon->channel));
0898 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n",
0899 le32_to_cpu(rxon->flags));
0900 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
0901 le32_to_cpu(rxon->filter_flags));
0902 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
0903 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
0904 rxon->ofdm_basic_rates);
0905 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n",
0906 rxon->cck_basic_rates);
0907 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
0908 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
0909 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n",
0910 le16_to_cpu(rxon->assoc_id));
0911 }
0912 #endif
0913
0914 static void iwl_calc_basic_rates(struct iwl_priv *priv,
0915 struct iwl_rxon_context *ctx)
0916 {
0917 int lowest_present_ofdm = 100;
0918 int lowest_present_cck = 100;
0919 u8 cck = 0;
0920 u8 ofdm = 0;
0921
0922 if (ctx->vif) {
0923 struct ieee80211_supported_band *sband;
0924 unsigned long basic = ctx->vif->bss_conf.basic_rates;
0925 int i;
0926
0927 sband = priv->hw->wiphy->bands[priv->hw->conf.chandef.chan->band];
0928
0929 for_each_set_bit(i, &basic, BITS_PER_LONG) {
0930 int hw = sband->bitrates[i].hw_value;
0931 if (hw >= IWL_FIRST_OFDM_RATE) {
0932 ofdm |= BIT(hw - IWL_FIRST_OFDM_RATE);
0933 if (lowest_present_ofdm > hw)
0934 lowest_present_ofdm = hw;
0935 } else {
0936 BUILD_BUG_ON(IWL_FIRST_CCK_RATE != 0);
0937
0938 cck |= BIT(hw);
0939 if (lowest_present_cck > hw)
0940 lowest_present_cck = hw;
0941 }
0942 }
0943 }
0944
0945
0946
0947
0948
0949
0950
0951
0952
0953
0954
0955
0956
0957
0958
0959
0960
0961
0962
0963
0964
0965
0966
0967
0968 if (IWL_RATE_24M_INDEX < lowest_present_ofdm)
0969 ofdm |= IWL_RATE_24M_MASK >> IWL_FIRST_OFDM_RATE;
0970 if (IWL_RATE_12M_INDEX < lowest_present_ofdm)
0971 ofdm |= IWL_RATE_12M_MASK >> IWL_FIRST_OFDM_RATE;
0972
0973 ofdm |= IWL_RATE_6M_MASK >> IWL_FIRST_OFDM_RATE;
0974
0975
0976
0977
0978
0979
0980
0981
0982
0983
0984
0985
0986
0987
0988 if (IWL_RATE_11M_INDEX < lowest_present_cck)
0989 cck |= IWL_RATE_11M_MASK >> IWL_FIRST_CCK_RATE;
0990 if (IWL_RATE_5M_INDEX < lowest_present_cck)
0991 cck |= IWL_RATE_5M_MASK >> IWL_FIRST_CCK_RATE;
0992 if (IWL_RATE_2M_INDEX < lowest_present_cck)
0993 cck |= IWL_RATE_2M_MASK >> IWL_FIRST_CCK_RATE;
0994
0995 cck |= IWL_RATE_1M_MASK >> IWL_FIRST_CCK_RATE;
0996
0997 IWL_DEBUG_RATE(priv, "Set basic rates cck:0x%.2x ofdm:0x%.2x\n",
0998 cck, ofdm);
0999
1000
1001 ctx->staging.cck_basic_rates = cck;
1002 ctx->staging.ofdm_basic_rates = ofdm;
1003 }
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023 int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
1024 {
1025
1026 struct iwl_rxon_cmd *active = (void *)&ctx->active;
1027 bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1028 int ret;
1029
1030 lockdep_assert_held(&priv->mutex);
1031
1032 if (!iwl_is_alive(priv))
1033 return -EBUSY;
1034
1035
1036 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
1037
1038 if (!ctx->is_active)
1039 return 0;
1040
1041
1042 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1043
1044
1045 iwl_calc_basic_rates(priv, ctx);
1046
1047
1048
1049
1050
1051 if (!priv->hw_params.use_rts_for_aggregation)
1052 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
1053
1054 if ((ctx->vif && ctx->vif->bss_conf.use_short_slot) ||
1055 !(ctx->staging.flags & RXON_FLG_BAND_24G_MSK))
1056 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1057 else
1058 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1059
1060 iwl_print_rx_config_cmd(priv, ctx->ctxid);
1061 ret = iwl_check_rxon_cmd(priv, ctx);
1062 if (ret) {
1063 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
1064 return -EINVAL;
1065 }
1066
1067
1068
1069
1070
1071 if (test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status) &&
1072 (priv->switch_channel != ctx->staging.channel)) {
1073 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
1074 le16_to_cpu(priv->switch_channel));
1075 iwl_chswitch_done(priv, false);
1076 }
1077
1078
1079
1080
1081
1082
1083 if (!iwl_full_rxon_required(priv, ctx)) {
1084 ret = iwlagn_send_rxon_assoc(priv, ctx);
1085 if (ret) {
1086 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
1087 return ret;
1088 }
1089
1090 memcpy(active, &ctx->staging, sizeof(*active));
1091
1092
1093
1094
1095 iwl_set_tx_power(priv, priv->tx_power_next, false);
1096
1097
1098 iwl_power_update_mode(priv, true);
1099
1100 return 0;
1101 }
1102
1103 iwl_set_rxon_hwcrypto(priv, ctx, !iwlwifi_mod_params.swcrypto);
1104
1105 IWL_DEBUG_INFO(priv,
1106 "Going to commit RXON\n"
1107 " * with%s RXON_FILTER_ASSOC_MSK\n"
1108 " * channel = %d\n"
1109 " * bssid = %pM\n",
1110 (new_assoc ? "" : "out"),
1111 le16_to_cpu(ctx->staging.channel),
1112 ctx->staging.bssid_addr);
1113
1114
1115
1116
1117
1118
1119
1120 ret = iwlagn_rxon_disconn(priv, ctx);
1121 if (ret)
1122 return ret;
1123
1124 ret = iwlagn_set_pan_params(priv);
1125 if (ret)
1126 return ret;
1127
1128 if (new_assoc)
1129 return iwlagn_rxon_connect(priv, ctx);
1130
1131 return 0;
1132 }
1133
1134 void iwlagn_config_ht40(struct ieee80211_conf *conf,
1135 struct iwl_rxon_context *ctx)
1136 {
1137 if (conf_is_ht40_minus(conf)) {
1138 ctx->ht.extension_chan_offset =
1139 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
1140 ctx->ht.is_40mhz = true;
1141 } else if (conf_is_ht40_plus(conf)) {
1142 ctx->ht.extension_chan_offset =
1143 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
1144 ctx->ht.is_40mhz = true;
1145 } else {
1146 ctx->ht.extension_chan_offset =
1147 IEEE80211_HT_PARAM_CHA_SEC_NONE;
1148 ctx->ht.is_40mhz = false;
1149 }
1150 }
1151
1152 int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
1153 {
1154 struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
1155 struct iwl_rxon_context *ctx;
1156 struct ieee80211_conf *conf = &hw->conf;
1157 struct ieee80211_channel *channel = conf->chandef.chan;
1158 int ret = 0;
1159
1160 IWL_DEBUG_MAC80211(priv, "enter: changed %#x\n", changed);
1161
1162 mutex_lock(&priv->mutex);
1163
1164 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
1165 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
1166 goto out;
1167 }
1168
1169 if (!iwl_is_ready(priv)) {
1170 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
1171 goto out;
1172 }
1173
1174 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
1175 IEEE80211_CONF_CHANGE_CHANNEL)) {
1176
1177 priv->current_ht_config.smps = conf->smps_mode;
1178
1179
1180
1181
1182
1183
1184
1185
1186 for_each_context(priv, ctx)
1187 iwlagn_set_rxon_chain(priv, ctx);
1188 }
1189
1190 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1191 for_each_context(priv, ctx) {
1192
1193 if (ctx->ht.enabled != conf_is_ht(conf))
1194 ctx->ht.enabled = conf_is_ht(conf);
1195
1196 if (ctx->ht.enabled) {
1197
1198
1199 if (!ctx->ht.is_40mhz ||
1200 !iwl_is_associated_ctx(ctx))
1201 iwlagn_config_ht40(conf, ctx);
1202 } else
1203 ctx->ht.is_40mhz = false;
1204
1205
1206
1207
1208
1209 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
1210
1211
1212
1213
1214 if (le16_to_cpu(ctx->staging.channel) !=
1215 channel->hw_value)
1216 ctx->staging.flags = 0;
1217
1218 iwl_set_rxon_channel(priv, channel, ctx);
1219 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1220
1221 iwl_set_flags_for_band(priv, ctx, channel->band,
1222 ctx->vif);
1223 }
1224
1225 iwl_update_bcast_stations(priv);
1226 }
1227
1228 if (changed & (IEEE80211_CONF_CHANGE_PS |
1229 IEEE80211_CONF_CHANGE_IDLE)) {
1230 ret = iwl_power_update_mode(priv, false);
1231 if (ret)
1232 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
1233 }
1234
1235 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1236 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
1237 priv->tx_power_user_lmt, conf->power_level);
1238
1239 iwl_set_tx_power(priv, conf->power_level, false);
1240 }
1241
1242 for_each_context(priv, ctx) {
1243 if (!memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1244 continue;
1245 iwlagn_commit_rxon(priv, ctx);
1246 }
1247 out:
1248 mutex_unlock(&priv->mutex);
1249 IWL_DEBUG_MAC80211(priv, "leave\n");
1250
1251 return ret;
1252 }
1253
1254 static void iwlagn_check_needed_chains(struct iwl_priv *priv,
1255 struct iwl_rxon_context *ctx,
1256 struct ieee80211_bss_conf *bss_conf)
1257 {
1258 struct ieee80211_vif *vif = ctx->vif;
1259 struct iwl_rxon_context *tmp;
1260 struct ieee80211_sta *sta;
1261 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
1262 struct ieee80211_sta_ht_cap *ht_cap;
1263 bool need_multiple;
1264
1265 lockdep_assert_held(&priv->mutex);
1266
1267 switch (vif->type) {
1268 case NL80211_IFTYPE_STATION:
1269 rcu_read_lock();
1270 sta = ieee80211_find_sta(vif, bss_conf->bssid);
1271 if (!sta) {
1272
1273
1274
1275
1276
1277
1278 need_multiple = false;
1279 rcu_read_unlock();
1280 break;
1281 }
1282
1283 ht_cap = &sta->deflink.ht_cap;
1284
1285 need_multiple = true;
1286
1287
1288
1289
1290
1291 if (ht_cap->mcs.rx_mask[1] == 0 &&
1292 ht_cap->mcs.rx_mask[2] == 0) {
1293 need_multiple = false;
1294 } else if (!(ht_cap->mcs.tx_params &
1295 IEEE80211_HT_MCS_TX_DEFINED)) {
1296
1297 need_multiple = false;
1298 } else if (ht_cap->mcs.tx_params &
1299 IEEE80211_HT_MCS_TX_RX_DIFF) {
1300 int maxstreams;
1301
1302
1303
1304
1305
1306
1307
1308
1309 maxstreams = (ht_cap->mcs.tx_params &
1310 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK);
1311 maxstreams >>=
1312 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1313 maxstreams += 1;
1314
1315 if (maxstreams <= 1)
1316 need_multiple = false;
1317 }
1318
1319 rcu_read_unlock();
1320 break;
1321 case NL80211_IFTYPE_ADHOC:
1322
1323 need_multiple = false;
1324 break;
1325 default:
1326
1327 need_multiple = true;
1328 break;
1329 }
1330
1331 ctx->ht_need_multiple_chains = need_multiple;
1332
1333 if (!need_multiple) {
1334
1335 for_each_context(priv, tmp) {
1336 if (!tmp->vif)
1337 continue;
1338 if (tmp->ht_need_multiple_chains) {
1339 need_multiple = true;
1340 break;
1341 }
1342 }
1343 }
1344
1345 ht_conf->single_chain_sufficient = !need_multiple;
1346 }
1347
1348 static void iwlagn_chain_noise_reset(struct iwl_priv *priv)
1349 {
1350 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
1351 int ret;
1352
1353 if (priv->calib_disabled & IWL_CHAIN_NOISE_CALIB_DISABLED)
1354 return;
1355
1356 if ((data->state == IWL_CHAIN_NOISE_ALIVE) &&
1357 iwl_is_any_associated(priv)) {
1358 struct iwl_calib_chain_noise_reset_cmd cmd;
1359
1360
1361 data->chain_noise_a = 0;
1362 data->chain_noise_b = 0;
1363 data->chain_noise_c = 0;
1364 data->chain_signal_a = 0;
1365 data->chain_signal_b = 0;
1366 data->chain_signal_c = 0;
1367 data->beacon_count = 0;
1368
1369 memset(&cmd, 0, sizeof(cmd));
1370 iwl_set_calib_hdr(&cmd.hdr,
1371 priv->phy_calib_chain_noise_reset_cmd);
1372 ret = iwl_dvm_send_cmd_pdu(priv,
1373 REPLY_PHY_CALIBRATION_CMD,
1374 0, sizeof(cmd), &cmd);
1375 if (ret)
1376 IWL_ERR(priv,
1377 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
1378 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1379 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
1380 }
1381 }
1382
1383 void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
1384 struct ieee80211_vif *vif,
1385 struct ieee80211_bss_conf *bss_conf,
1386 u64 changes)
1387 {
1388 struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
1389 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1390 int ret;
1391 bool force = false;
1392
1393 mutex_lock(&priv->mutex);
1394
1395 if (changes & BSS_CHANGED_IDLE && vif->cfg.idle) {
1396
1397
1398
1399
1400 iwlagn_lift_passive_no_rx(priv);
1401 }
1402
1403 if (unlikely(!iwl_is_ready(priv))) {
1404 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
1405 mutex_unlock(&priv->mutex);
1406 return;
1407 }
1408
1409 if (unlikely(!ctx->vif)) {
1410 IWL_DEBUG_MAC80211(priv, "leave - vif is NULL\n");
1411 mutex_unlock(&priv->mutex);
1412 return;
1413 }
1414
1415 if (changes & BSS_CHANGED_BEACON_INT)
1416 force = true;
1417
1418 if (changes & BSS_CHANGED_QOS) {
1419 ctx->qos_data.qos_active = bss_conf->qos;
1420 iwlagn_update_qos(priv, ctx);
1421 }
1422
1423 ctx->staging.assoc_id = cpu_to_le16(vif->cfg.aid);
1424 if (vif->bss_conf.use_short_preamble)
1425 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1426 else
1427 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1428
1429 if (changes & BSS_CHANGED_ASSOC) {
1430 if (vif->cfg.assoc) {
1431 priv->timestamp = bss_conf->sync_tsf;
1432 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1433 } else {
1434 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1435
1436 if (ctx->ctxid == IWL_RXON_CTX_BSS)
1437 priv->have_rekey_data = false;
1438 }
1439
1440 iwlagn_bt_coex_rssi_monitor(priv);
1441 }
1442
1443 if (ctx->ht.enabled) {
1444 ctx->ht.protection = bss_conf->ht_operation_mode &
1445 IEEE80211_HT_OP_MODE_PROTECTION;
1446 ctx->ht.non_gf_sta_present = !!(bss_conf->ht_operation_mode &
1447 IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
1448 iwlagn_check_needed_chains(priv, ctx, bss_conf);
1449 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1450 }
1451
1452 iwlagn_set_rxon_chain(priv, ctx);
1453
1454 if (bss_conf->use_cts_prot && (priv->band != NL80211_BAND_5GHZ))
1455 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
1456 else
1457 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1458
1459 if (bss_conf->use_cts_prot)
1460 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
1461 else
1462 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
1463
1464 memcpy(ctx->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
1465
1466 if (vif->type == NL80211_IFTYPE_AP ||
1467 vif->type == NL80211_IFTYPE_ADHOC) {
1468 if (vif->bss_conf.enable_beacon) {
1469 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1470 priv->beacon_ctx = ctx;
1471 } else {
1472 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1473 priv->beacon_ctx = NULL;
1474 }
1475 }
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485 if (vif->type == NL80211_IFTYPE_STATION) {
1486 if (!vif->cfg.assoc)
1487 ctx->staging.filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1488 else
1489 ctx->staging.filter_flags &=
1490 ~RXON_FILTER_BCON_AWARE_MSK;
1491 }
1492
1493 if (force || memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1494 iwlagn_commit_rxon(priv, ctx);
1495
1496 if (changes & BSS_CHANGED_ASSOC && vif->cfg.assoc) {
1497
1498
1499
1500
1501
1502 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
1503 iwl_power_update_mode(priv, false);
1504
1505
1506 iwlagn_chain_noise_reset(priv);
1507 priv->start_calib = 1;
1508 }
1509
1510 if (changes & BSS_CHANGED_IBSS) {
1511 ret = iwlagn_manage_ibss_station(priv, vif,
1512 vif->cfg.ibss_joined);
1513 if (ret)
1514 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1515 vif->cfg.ibss_joined ? "add" : "remove",
1516 bss_conf->bssid);
1517 }
1518
1519 if (changes & BSS_CHANGED_BEACON && priv->beacon_ctx == ctx) {
1520 if (iwlagn_update_beacon(priv, vif))
1521 IWL_ERR(priv, "Error updating beacon\n");
1522 }
1523
1524 mutex_unlock(&priv->mutex);
1525 }
1526
1527 void iwlagn_post_scan(struct iwl_priv *priv)
1528 {
1529 struct iwl_rxon_context *ctx;
1530
1531
1532
1533
1534
1535 iwl_power_set_mode(priv, &priv->power_data.sleep_cmd_next, false);
1536 iwl_set_tx_power(priv, priv->tx_power_next, false);
1537
1538
1539
1540
1541
1542 for_each_context(priv, ctx)
1543 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1544 iwlagn_commit_rxon(priv, ctx);
1545
1546 iwlagn_set_pan_params(priv);
1547 }