iwlwifi/dvm/power.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /******************************************************************************
0003  *
0004  * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
0005  * Copyright (C) 2019 Intel Corporation
0006  *
0007  * Portions of this file are derived from the ipw3945 project, as well
0008  * as portions of the ieee80211 subsystem header files.
0009  *****************************************************************************/
0010
0011
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/slab.h>
0015 #include <net/mac80211.h>
0016 #include "iwl-io.h"
0017 #include "iwl-debug.h"
0018 #include "iwl-trans.h"
0019 #include "iwl-modparams.h"
0020 #include "dev.h"
0021 #include "agn.h"
0022 #include "commands.h"
0023 #include "power.h"
0024
0025 static bool force_cam = true;
0026 module_param(force_cam, bool, 0644);
0027 MODULE_PARM_DESC(force_cam, "force continuously aware mode (no power saving at all)");
0028
0029 /*
0030  * Setting power level allows the card to go to sleep when not busy.
0031  *
0032  * We calculate a sleep command based on the required latency, which
0033  * we get from mac80211. In order to handle thermal throttling, we can
0034  * also use pre-defined power levels.
0035  */
0036
0037 /*
0038  * This defines the old power levels. They are still used by default
0039  * (level 1) and for thermal throttle (levels 3 through 5)
0040  */
0041
0042 struct iwl_power_vec_entry {
0043     struct iwl_powertable_cmd cmd;
0044     u8 no_dtim; /* number of skip dtim */
0045 };
0046
0047 #define IWL_DTIM_RANGE_0_MAX    2
0048 #define IWL_DTIM_RANGE_1_MAX    10
0049
0050 #define NOSLP cpu_to_le16(0), 0, 0
0051 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
0052 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK |    \
0053         IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
0054         IWL_POWER_ADVANCE_PM_ENA_MSK)
0055 #define ASLP_TOUT(T) cpu_to_le32(T)
0056 #define TU_TO_USEC 1024
0057 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
0058 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
0059                      cpu_to_le32(X1), \
0060                      cpu_to_le32(X2), \
0061                      cpu_to_le32(X3), \
0062                      cpu_to_le32(X4)}
0063 /* default power management (not Tx power) table values */
0064 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
0065 /* DTIM 0 - 2 */
0066 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
0067     {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
0068     {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
0069     {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
0070     {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
0071     {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
0072 };
0073
0074
0075 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
0076 /* DTIM 3 - 10 */
0077 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
0078     {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
0079     {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
0080     {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
0081     {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
0082     {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
0083 };
0084
0085 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
0086 /* DTIM 11 - */
0087 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
0088     {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
0089     {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
0090     {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
0091     {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
0092     {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
0093 };
0094
0095 /* advance power management */
0096 /* DTIM 0 - 2 */
0097 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
0098     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0099         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0100     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0101         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0102     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0103         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0104     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0105         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0106     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0107         SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
0108 };
0109
0110
0111 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
0112 /* DTIM 3 - 10 */
0113 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
0114     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0115         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0116     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0117         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0118     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0119         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0120     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0121         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0122     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0123         SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
0124 };
0125
0126 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
0127 /* DTIM 11 - */
0128 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
0129     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0130         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0131     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0132         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0133     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0134         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0135     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0136         SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
0137     {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
0138         SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
0139 };
0140
0141 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
0142                  struct iwl_powertable_cmd *cmd,
0143                  enum iwl_power_level lvl, int period)
0144 {
0145     const struct iwl_power_vec_entry *table;
0146     int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
0147     int i;
0148     u8 skip;
0149     u32 slp_itrvl;
0150
0151     if (priv->lib->adv_pm) {
0152         table = apm_range_2;
0153         if (period <= IWL_DTIM_RANGE_1_MAX)
0154             table = apm_range_1;
0155         if (period <= IWL_DTIM_RANGE_0_MAX)
0156             table = apm_range_0;
0157     } else {
0158         table = range_2;
0159         if (period <= IWL_DTIM_RANGE_1_MAX)
0160             table = range_1;
0161         if (period <= IWL_DTIM_RANGE_0_MAX)
0162             table = range_0;
0163     }
0164
0165     if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
0166         memset(cmd, 0, sizeof(*cmd));
0167     else
0168         *cmd = table[lvl].cmd;
0169
0170     if (period == 0) {
0171         skip = 0;
0172         period = 1;
0173         for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
0174             max_sleep[i] =  1;
0175
0176     } else {
0177         skip = table[lvl].no_dtim;
0178         for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
0179             max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
0180         max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
0181     }
0182
0183     slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
0184     /* figure out the listen interval based on dtim period and skip */
0185     if (slp_itrvl == 0xFF)
0186         cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
0187             cpu_to_le32(period * (skip + 1));
0188
0189     slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
0190     if (slp_itrvl > period)
0191         cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
0192             cpu_to_le32((slp_itrvl / period) * period);
0193
0194     if (skip)
0195         cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
0196     else
0197         cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
0198
0199     if (priv->trans->trans_cfg->base_params->shadow_reg_enable)
0200         cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
0201     else
0202         cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
0203
0204     if (iwl_advanced_bt_coexist(priv)) {
0205         if (!priv->lib->bt_params->bt_sco_disable)
0206             cmd->flags |= IWL_POWER_BT_SCO_ENA;
0207         else
0208             cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
0209     }
0210
0211
0212     slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
0213     if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
0214         cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
0215             cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
0216
0217     /* enforce max sleep interval */
0218     for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
0219         if (le32_to_cpu(cmd->sleep_interval[i]) >
0220             (max_sleep[i] * period))
0221             cmd->sleep_interval[i] =
0222                 cpu_to_le32(max_sleep[i] * period);
0223         if (i != (IWL_POWER_VEC_SIZE - 1)) {
0224             if (le32_to_cpu(cmd->sleep_interval[i]) >
0225                 le32_to_cpu(cmd->sleep_interval[i+1]))
0226                 cmd->sleep_interval[i] =
0227                     cmd->sleep_interval[i+1];
0228         }
0229     }
0230
0231     if (priv->power_data.bus_pm)
0232         cmd->flags |= IWL_POWER_PCI_PM_MSK;
0233     else
0234         cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
0235
0236     IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
0237             skip, period);
0238     /* The power level here is 0-4 (used as array index), but user expects
0239     to see 1-5 (according to spec). */
0240     IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
0241 }
0242
0243 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
0244                     struct iwl_powertable_cmd *cmd)
0245 {
0246     memset(cmd, 0, sizeof(*cmd));
0247
0248     if (priv->power_data.bus_pm)
0249         cmd->flags |= IWL_POWER_PCI_PM_MSK;
0250
0251     IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
0252 }
0253
0254 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
0255 {
0256     IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
0257     IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
0258     IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
0259     IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
0260     IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
0261             le32_to_cpu(cmd->sleep_interval[0]),
0262             le32_to_cpu(cmd->sleep_interval[1]),
0263             le32_to_cpu(cmd->sleep_interval[2]),
0264             le32_to_cpu(cmd->sleep_interval[3]),
0265             le32_to_cpu(cmd->sleep_interval[4]));
0266
0267     return iwl_dvm_send_cmd_pdu(priv, POWER_TABLE_CMD, 0,
0268                 sizeof(struct iwl_powertable_cmd), cmd);
0269 }
0270
0271 static void iwl_power_build_cmd(struct iwl_priv *priv,
0272                 struct iwl_powertable_cmd *cmd)
0273 {
0274     bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
0275     int dtimper;
0276
0277     if (force_cam) {
0278         iwl_power_sleep_cam_cmd(priv, cmd);
0279         return;
0280     }
0281
0282     dtimper = priv->hw->conf.ps_dtim_period ?: 1;
0283
0284     if (priv->wowlan)
0285         iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
0286     else if (!priv->lib->no_idle_support &&
0287          priv->hw->conf.flags & IEEE80211_CONF_IDLE)
0288         iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
0289     else if (iwl_tt_is_low_power_state(priv)) {
0290         /* in thermal throttling low power state */
0291         iwl_static_sleep_cmd(priv, cmd,
0292             iwl_tt_current_power_mode(priv), dtimper);
0293     } else if (!enabled)
0294         iwl_power_sleep_cam_cmd(priv, cmd);
0295     else if (priv->power_data.debug_sleep_level_override >= 0)
0296         iwl_static_sleep_cmd(priv, cmd,
0297                      priv->power_data.debug_sleep_level_override,
0298                      dtimper);
0299     else {
0300         /* Note that the user parameter is 1-5 (according to spec),
0301         but we pass 0-4 because it acts as an array index. */
0302         if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
0303             iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
0304             iwl_static_sleep_cmd(priv, cmd,
0305                 iwlwifi_mod_params.power_level - 1, dtimper);
0306         else
0307             iwl_static_sleep_cmd(priv, cmd,
0308                 IWL_POWER_INDEX_1, dtimper);
0309     }
0310 }
0311
0312 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
0313                bool force)
0314 {
0315     int ret;
0316     bool update_chains;
0317
0318     lockdep_assert_held(&priv->mutex);
0319
0320     /* Don't update the RX chain when chain noise calibration is running */
0321     update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
0322             priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
0323
0324     if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
0325         return 0;
0326
0327     if (!iwl_is_ready_rf(priv))
0328         return -EIO;
0329
0330     /* scan complete use sleep_power_next, need to be updated */
0331     memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
0332     if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
0333         IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
0334         return 0;
0335     }
0336
0337     if (cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)
0338         iwl_dvm_set_pmi(priv, true);
0339
0340     ret = iwl_set_power(priv, cmd);
0341     if (!ret) {
0342         if (!(cmd->flags & IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))
0343             iwl_dvm_set_pmi(priv, false);
0344
0345         if (update_chains)
0346             iwl_update_chain_flags(priv);
0347         else
0348             IWL_DEBUG_POWER(priv,
0349                     "Cannot update the power, chain noise "
0350                     "calibration running: %d\n",
0351                     priv->chain_noise_data.state);
0352
0353         memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
0354     } else
0355         IWL_ERR(priv, "set power fail, ret = %d\n", ret);
0356
0357     return ret;
0358 }
0359
0360 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
0361 {
0362     struct iwl_powertable_cmd cmd;
0363
0364     iwl_power_build_cmd(priv, &cmd);
0365     return iwl_power_set_mode(priv, &cmd, force);
0366 }
0367
0368 /* initialize to default */
0369 void iwl_power_initialize(struct iwl_priv *priv)
0370 {
0371     priv->power_data.bus_pm = priv->trans->pm_support;
0372
0373     priv->power_data.debug_sleep_level_override = -1;
0374
0375     memset(&priv->power_data.sleep_cmd, 0,
0376         sizeof(priv->power_data.sleep_cmd));
0377 }