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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /******************************************************************************
0003 
0004   Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
0005 
0006 
0007   Contact Information:
0008   Intel Linux Wireless <ilw@linux.intel.com>
0009   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
0010 
0011 ******************************************************************************/
0012 #ifndef _IPW2100_H
0013 #define _IPW2100_H
0014 
0015 #include <linux/sched.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/netdevice.h>
0018 #include <linux/etherdevice.h>
0019 #include <linux/list.h>
0020 #include <linux/delay.h>
0021 #include <linux/skbuff.h>
0022 #include <asm/io.h>
0023 #include <linux/socket.h>
0024 #include <linux/if_arp.h>
0025 #include <linux/wireless.h>
0026 #include <net/iw_handler.h> // new driver API
0027 
0028 #ifdef CONFIG_IPW2100_MONITOR
0029 #include <net/ieee80211_radiotap.h>
0030 #endif
0031 
0032 #include <linux/workqueue.h>
0033 #include <linux/mutex.h>
0034 
0035 #include "libipw.h"
0036 
0037 struct ipw2100_priv;
0038 struct ipw2100_tx_packet;
0039 struct ipw2100_rx_packet;
0040 
0041 #define IPW_DL_UNINIT    0x80000000
0042 #define IPW_DL_NONE      0x00000000
0043 #define IPW_DL_ALL       0x7FFFFFFF
0044 
0045 /*
0046  * To use the debug system;
0047  *
0048  * If you are defining a new debug classification, simply add it to the #define
0049  * list here in the form of:
0050  *
0051  * #define IPW_DL_xxxx VALUE
0052  *
0053  * shifting value to the left one bit from the previous entry.  xxxx should be
0054  * the name of the classification (for example, WEP)
0055  *
0056  * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
0057  * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
0058  * to send output to that classification.
0059  *
0060  * To add your debug level to the list of levels seen when you perform
0061  *
0062  * % cat /proc/net/ipw2100/debug_level
0063  *
0064  * you simply need to add your entry to the ipw2100_debug_levels array.
0065  *
0066  * If you do not see debug_level in /proc/net/ipw2100 then you do not have
0067  * CONFIG_IPW2100_DEBUG defined in your kernel configuration
0068  *
0069  */
0070 
0071 #define IPW_DL_ERROR         (1<<0)
0072 #define IPW_DL_WARNING       (1<<1)
0073 #define IPW_DL_INFO          (1<<2)
0074 #define IPW_DL_WX            (1<<3)
0075 #define IPW_DL_HC            (1<<5)
0076 #define IPW_DL_STATE         (1<<6)
0077 
0078 #define IPW_DL_NOTIF         (1<<10)
0079 #define IPW_DL_SCAN          (1<<11)
0080 #define IPW_DL_ASSOC         (1<<12)
0081 #define IPW_DL_DROP          (1<<13)
0082 
0083 #define IPW_DL_IOCTL         (1<<14)
0084 #define IPW_DL_RF_KILL       (1<<17)
0085 
0086 #define IPW_DL_MANAGE        (1<<15)
0087 #define IPW_DL_FW            (1<<16)
0088 
0089 #define IPW_DL_FRAG          (1<<21)
0090 #define IPW_DL_WEP           (1<<22)
0091 #define IPW_DL_TX            (1<<23)
0092 #define IPW_DL_RX            (1<<24)
0093 #define IPW_DL_ISR           (1<<25)
0094 #define IPW_DL_IO            (1<<26)
0095 #define IPW_DL_TRACE         (1<<28)
0096 
0097 #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
0098 #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
0099 #define IPW_DEBUG_INFO(f...)    IPW_DEBUG(IPW_DL_INFO, ## f)
0100 #define IPW_DEBUG_WX(f...)     IPW_DEBUG(IPW_DL_WX, ## f)
0101 #define IPW_DEBUG_SCAN(f...)   IPW_DEBUG(IPW_DL_SCAN, ## f)
0102 #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
0103 #define IPW_DEBUG_TRACE(f...)  IPW_DEBUG(IPW_DL_TRACE, ## f)
0104 #define IPW_DEBUG_RX(f...)     IPW_DEBUG(IPW_DL_RX, ## f)
0105 #define IPW_DEBUG_TX(f...)     IPW_DEBUG(IPW_DL_TX, ## f)
0106 #define IPW_DEBUG_ISR(f...)    IPW_DEBUG(IPW_DL_ISR, ## f)
0107 #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
0108 #define IPW_DEBUG_WEP(f...)    IPW_DEBUG(IPW_DL_WEP, ## f)
0109 #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
0110 #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
0111 #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
0112 #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
0113 #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
0114 #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
0115 #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
0116 #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
0117 #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
0118 
0119 enum {
0120     IPW_HW_STATE_DISABLED = 1,
0121     IPW_HW_STATE_ENABLED = 0
0122 };
0123 
0124 extern const char *port_type_str[];
0125 extern const char *band_str[];
0126 
0127 #define NUMBER_OF_BD_PER_COMMAND_PACKET     1
0128 #define NUMBER_OF_BD_PER_DATA_PACKET        2
0129 
0130 #define IPW_MAX_BDS 6
0131 #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR  2
0132 #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
0133 
0134 #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
0135     (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
0136 
0137 struct bd_status {
0138     union {
0139         struct {
0140             u8 nlf:1, txType:2, intEnabled:1, reserved:4;
0141         } fields;
0142         u8 field;
0143     } info;
0144 } __packed;
0145 
0146 struct ipw2100_bd {
0147     u32 host_addr;
0148     u32 buf_length;
0149     struct bd_status status;
0150     /* number of fragments for frame (should be set only for
0151      * 1st TBD) */
0152     u8 num_fragments;
0153     u8 reserved[6];
0154 } __packed;
0155 
0156 #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
0157 #define IPW_BD_ALIGNMENT(L)    (L*sizeof(struct ipw2100_bd))
0158 
0159 #define IPW_BD_STATUS_TX_FRAME_802_3             0x00
0160 #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
0161 #define IPW_BD_STATUS_TX_FRAME_COMMAND       0x02
0162 #define IPW_BD_STATUS_TX_FRAME_802_11            0x04
0163 #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE    0x08
0164 
0165 struct ipw2100_bd_queue {
0166     /* driver (virtual) pointer to queue */
0167     struct ipw2100_bd *drv;
0168 
0169     /* firmware (physical) pointer to queue */
0170     dma_addr_t nic;
0171 
0172     /* Length of phy memory allocated for BDs */
0173     u32 size;
0174 
0175     /* Number of BDs in queue (and in array) */
0176     u32 entries;
0177 
0178     /* Number of available BDs (invalid for NIC BDs) */
0179     u32 available;
0180 
0181     /* Offset of oldest used BD in array (next one to
0182      * check for completion) */
0183     u32 oldest;
0184 
0185     /* Offset of next available (unused) BD */
0186     u32 next;
0187 };
0188 
0189 #define RX_QUEUE_LENGTH 256
0190 #define TX_QUEUE_LENGTH 256
0191 #define HW_QUEUE_LENGTH 256
0192 
0193 #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
0194 
0195 #define STATUS_TYPE_MASK    0x0000000f
0196 #define COMMAND_STATUS_VAL  0
0197 #define STATUS_CHANGE_VAL   1
0198 #define P80211_DATA_VAL     2
0199 #define P8023_DATA_VAL      3
0200 #define HOST_NOTIFICATION_VAL   4
0201 
0202 #define IPW2100_RSSI_TO_DBM (-98)
0203 
0204 struct ipw2100_status {
0205     u32 frame_size;
0206     u16 status_fields;
0207     u8 flags;
0208 #define IPW_STATUS_FLAG_DECRYPTED   (1<<0)
0209 #define IPW_STATUS_FLAG_WEP_ENCRYPTED   (1<<1)
0210 #define IPW_STATUS_FLAG_CRC_ERROR       (1<<2)
0211     u8 rssi;
0212 } __packed;
0213 
0214 struct ipw2100_status_queue {
0215     /* driver (virtual) pointer to queue */
0216     struct ipw2100_status *drv;
0217 
0218     /* firmware (physical) pointer to queue */
0219     dma_addr_t nic;
0220 
0221     /* Length of phy memory allocated for BDs */
0222     u32 size;
0223 };
0224 
0225 #define HOST_COMMAND_PARAMS_REG_LEN 100
0226 #define CMD_STATUS_PARAMS_REG_LEN   3
0227 
0228 #define IPW_WPA_CAPABILITIES   0x1
0229 #define IPW_WPA_LISTENINTERVAL 0x2
0230 #define IPW_WPA_AP_ADDRESS     0x4
0231 
0232 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
0233 
0234 struct ipw2100_wpa_assoc_frame {
0235     u16 fixed_ie_mask;
0236     struct {
0237         u16 capab_info;
0238         u16 listen_interval;
0239         u8 current_ap[ETH_ALEN];
0240     } fixed_ies;
0241     u32 var_ie_len;
0242     u8 var_ie[IPW_MAX_VAR_IE_LEN];
0243 };
0244 
0245 #define IPW_BSS     1
0246 #define IPW_MONITOR 2
0247 #define IPW_IBSS    3
0248 
0249 /**
0250  * @struct _tx_cmd - HWCommand
0251  * @brief H/W command structure.
0252  */
0253 struct ipw2100_cmd_header {
0254     u32 host_command_reg;
0255     u32 host_command_reg1;
0256     u32 sequence;
0257     u32 host_command_len_reg;
0258     u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
0259     u32 cmd_status_reg;
0260     u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
0261     u32 rxq_base_ptr;
0262     u32 rxq_next_ptr;
0263     u32 rxq_host_ptr;
0264     u32 txq_base_ptr;
0265     u32 txq_next_ptr;
0266     u32 txq_host_ptr;
0267     u32 tx_status_reg;
0268     u32 reserved;
0269     u32 status_change_reg;
0270     u32 reserved1[3];
0271     u32 *ordinal1_ptr;
0272     u32 *ordinal2_ptr;
0273 } __packed;
0274 
0275 struct ipw2100_data_header {
0276     u32 host_command_reg;
0277     u32 host_command_reg1;
0278     u8 encrypted;       // BOOLEAN in win! TRUE if frame is enc by driver
0279     u8 needs_encryption;    // BOOLEAN in win! TRUE if frma need to be enc in NIC
0280     u8 wep_index;       // 0 no key, 1-4 key index, 0xff immediate key
0281     u8 key_size;        // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
0282     u8 key[16];
0283     u8 reserved[10];    // f/w reserved
0284     u8 src_addr[ETH_ALEN];
0285     u8 dst_addr[ETH_ALEN];
0286     u16 fragment_size;
0287 } __packed;
0288 
0289 /* Host command data structure */
0290 struct host_command {
0291     u32 host_command;   // COMMAND ID
0292     u32 host_command1;  // COMMAND ID
0293     u32 host_command_sequence;  // UNIQUE COMMAND NUMBER (ID)
0294     u32 host_command_length;    // LENGTH
0295     u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN];   // COMMAND PARAMETERS
0296 } __packed;
0297 
0298 typedef enum {
0299     POWER_ON_RESET,
0300     EXIT_POWER_DOWN_RESET,
0301     SW_RESET,
0302     EEPROM_RW,
0303     SW_RE_INIT
0304 } ipw2100_reset_event;
0305 
0306 enum {
0307     COMMAND = 0xCAFE,
0308     DATA,
0309     RX
0310 };
0311 
0312 struct ipw2100_tx_packet {
0313     int type;
0314     int index;
0315     union {
0316         struct {    /* COMMAND */
0317             struct ipw2100_cmd_header *cmd;
0318             dma_addr_t cmd_phys;
0319         } c_struct;
0320         struct {    /* DATA */
0321             struct ipw2100_data_header *data;
0322             dma_addr_t data_phys;
0323             struct libipw_txb *txb;
0324         } d_struct;
0325     } info;
0326     int jiffy_start;
0327 
0328     struct list_head list;
0329 };
0330 
0331 struct ipw2100_rx_packet {
0332     struct ipw2100_rx *rxp;
0333     dma_addr_t dma_addr;
0334     int jiffy_start;
0335     struct sk_buff *skb;
0336     struct list_head list;
0337 };
0338 
0339 #define FRAG_DISABLED             (1<<31)
0340 #define RTS_DISABLED              (1<<31)
0341 #define MAX_RTS_THRESHOLD         2304U
0342 #define MIN_RTS_THRESHOLD         1U
0343 #define DEFAULT_RTS_THRESHOLD     1000U
0344 
0345 #define DEFAULT_BEACON_INTERVAL   100U
0346 #define DEFAULT_SHORT_RETRY_LIMIT 7U
0347 #define DEFAULT_LONG_RETRY_LIMIT  4U
0348 
0349 struct ipw2100_ordinals {
0350     u32 table1_addr;
0351     u32 table2_addr;
0352     u32 table1_size;
0353     u32 table2_size;
0354 };
0355 
0356 /* Host Notification header */
0357 struct ipw2100_notification {
0358     u32 hnhdr_subtype;  /* type of host notification */
0359     u32 hnhdr_size;     /* size in bytes of data
0360                    or number of entries, if table.
0361                    Does NOT include header */
0362 } __packed;
0363 
0364 #define MAX_KEY_SIZE    16
0365 #define MAX_KEYS    8
0366 
0367 #define IPW2100_WEP_ENABLE     (1<<1)
0368 #define IPW2100_WEP_DROP_CLEAR (1<<2)
0369 
0370 #define IPW_NONE_CIPHER   (1<<0)
0371 #define IPW_WEP40_CIPHER  (1<<1)
0372 #define IPW_TKIP_CIPHER   (1<<2)
0373 #define IPW_CCMP_CIPHER   (1<<4)
0374 #define IPW_WEP104_CIPHER (1<<5)
0375 #define IPW_CKIP_CIPHER   (1<<6)
0376 
0377 #define IPW_AUTH_OPEN       0
0378 #define IPW_AUTH_SHARED     1
0379 #define IPW_AUTH_LEAP       2
0380 #define IPW_AUTH_LEAP_CISCO_ID  0x80
0381 
0382 struct statistic {
0383     int value;
0384     int hi;
0385     int lo;
0386 };
0387 
0388 #define INIT_STAT(x) do {  \
0389   (x)->value = (x)->hi = 0; \
0390   (x)->lo = 0x7fffffff; \
0391 } while (0)
0392 #define SET_STAT(x,y) do { \
0393   (x)->value = y; \
0394   if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
0395   if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
0396 } while (0)
0397 #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
0398 while (0)
0399 #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
0400 while (0)
0401 
0402 #define IPW2100_ERROR_QUEUE 5
0403 
0404 /* Power management code: enable or disable? */
0405 enum {
0406 #ifdef CONFIG_PM
0407     IPW2100_PM_DISABLED = 0,
0408     PM_STATE_SIZE = 16,
0409 #else
0410     IPW2100_PM_DISABLED = 1,
0411     PM_STATE_SIZE = 0,
0412 #endif
0413 };
0414 
0415 #define STATUS_POWERED          (1<<0)
0416 #define STATUS_CMD_ACTIVE       (1<<1)  /**< host command in progress */
0417 #define STATUS_RUNNING          (1<<2)  /* Card initialized, but not enabled */
0418 #define STATUS_ENABLED          (1<<3)  /* Card enabled -- can scan,Tx,Rx */
0419 #define STATUS_STOPPING         (1<<4)  /* Card is in shutdown phase */
0420 #define STATUS_INITIALIZED      (1<<5)  /* Card is ready for external calls */
0421 #define STATUS_ASSOCIATING      (1<<9)  /* Associated, but no BSSID yet */
0422 #define STATUS_ASSOCIATED       (1<<10) /* Associated and BSSID valid */
0423 #define STATUS_INT_ENABLED      (1<<11)
0424 #define STATUS_RF_KILL_HW       (1<<12)
0425 #define STATUS_RF_KILL_SW       (1<<13)
0426 #define STATUS_RF_KILL_MASK     (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
0427 #define STATUS_EXIT_PENDING     (1<<14)
0428 
0429 #define STATUS_SCAN_PENDING     (1<<23)
0430 #define STATUS_SCANNING         (1<<24)
0431 #define STATUS_SCAN_ABORTING    (1<<25)
0432 #define STATUS_SCAN_COMPLETE    (1<<26)
0433 #define STATUS_WX_EVENT_PENDING (1<<27)
0434 #define STATUS_RESET_PENDING    (1<<29)
0435 #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
0436 
0437 /* Internal NIC states */
0438 #define IPW_STATE_INITIALIZED   (1<<0)
0439 #define IPW_STATE_COUNTRY_FOUND (1<<1)
0440 #define IPW_STATE_ASSOCIATED    (1<<2)
0441 #define IPW_STATE_ASSN_LOST (1<<3)
0442 #define IPW_STATE_ASSN_CHANGED  (1<<4)
0443 #define IPW_STATE_SCAN_COMPLETE (1<<5)
0444 #define IPW_STATE_ENTERED_PSP   (1<<6)
0445 #define IPW_STATE_LEFT_PSP  (1<<7)
0446 #define IPW_STATE_RF_KILL       (1<<8)
0447 #define IPW_STATE_DISABLED  (1<<9)
0448 #define IPW_STATE_POWER_DOWN    (1<<10)
0449 #define IPW_STATE_SCANNING      (1<<11)
0450 
0451 #define CFG_STATIC_CHANNEL      (1<<0)  /* Restrict assoc. to single channel */
0452 #define CFG_STATIC_ESSID        (1<<1)  /* Restrict assoc. to single SSID */
0453 #define CFG_STATIC_BSSID        (1<<2)  /* Restrict assoc. to single BSSID */
0454 #define CFG_CUSTOM_MAC          (1<<3)
0455 #define CFG_LONG_PREAMBLE       (1<<4)
0456 #define CFG_ASSOCIATE           (1<<6)
0457 #define CFG_FIXED_RATE          (1<<7)
0458 #define CFG_ADHOC_CREATE        (1<<8)
0459 #define CFG_PASSIVE_SCAN        (1<<10)
0460 #ifdef CONFIG_IPW2100_MONITOR
0461 #define CFG_CRC_CHECK           (1<<11)
0462 #endif
0463 
0464 #define CAP_SHARED_KEY          (1<<0)  /* Off = OPEN */
0465 #define CAP_PRIVACY_ON          (1<<1)  /* Off = No privacy */
0466 
0467 struct ipw2100_priv {
0468     void __iomem *ioaddr;
0469 
0470     int stop_hang_check;    /* Set 1 when shutting down to kill hang_check */
0471     int stop_rf_kill;   /* Set 1 when shutting down to kill rf_kill */
0472 
0473     struct libipw_device *ieee;
0474     unsigned long status;
0475     unsigned long config;
0476     unsigned long capability;
0477 
0478     /* Statistics */
0479     int resets;
0480     time64_t reset_backoff;
0481 
0482     /* Context */
0483     u8 essid[IW_ESSID_MAX_SIZE];
0484     u8 essid_len;
0485     u8 bssid[ETH_ALEN];
0486     u8 channel;
0487     int last_mode;
0488 
0489     time64_t connect_start;
0490     time64_t last_reset;
0491 
0492     u32 channel_mask;
0493     u32 fatal_error;
0494     u32 fatal_errors[IPW2100_ERROR_QUEUE];
0495     u32 fatal_index;
0496     int eeprom_version;
0497     int firmware_version;
0498     unsigned long hw_features;
0499     int hangs;
0500     u32 last_rtc;
0501     int dump_raw;       /* 1 to dump raw bytes in /sys/.../memory */
0502     u8 *snapshot[0x30];
0503 
0504     u8 mandatory_bssid_mac[ETH_ALEN];
0505     u8 mac_addr[ETH_ALEN];
0506 
0507     int power_mode;
0508 
0509     int messages_sent;
0510 
0511     int short_retry_limit;
0512     int long_retry_limit;
0513 
0514     u32 rts_threshold;
0515     u32 frag_threshold;
0516 
0517     int in_isr;
0518 
0519     u32 tx_rates;
0520     int tx_power;
0521     u32 beacon_interval;
0522 
0523     char nick[IW_ESSID_MAX_SIZE + 1];
0524 
0525     struct ipw2100_status_queue status_queue;
0526 
0527     struct statistic txq_stat;
0528     struct statistic rxq_stat;
0529     struct ipw2100_bd_queue rx_queue;
0530     struct ipw2100_bd_queue tx_queue;
0531     struct ipw2100_rx_packet *rx_buffers;
0532 
0533     struct statistic fw_pend_stat;
0534     struct list_head fw_pend_list;
0535 
0536     struct statistic msg_free_stat;
0537     struct statistic msg_pend_stat;
0538     struct list_head msg_free_list;
0539     struct list_head msg_pend_list;
0540     struct ipw2100_tx_packet *msg_buffers;
0541 
0542     struct statistic tx_free_stat;
0543     struct statistic tx_pend_stat;
0544     struct list_head tx_free_list;
0545     struct list_head tx_pend_list;
0546     struct ipw2100_tx_packet *tx_buffers;
0547 
0548     struct ipw2100_ordinals ordinals;
0549 
0550     struct pci_dev *pci_dev;
0551 
0552     struct proc_dir_entry *dir_dev;
0553 
0554     struct net_device *net_dev;
0555     struct iw_statistics wstats;
0556 
0557     struct iw_public_data wireless_data;
0558 
0559     struct tasklet_struct irq_tasklet;
0560 
0561     struct delayed_work reset_work;
0562     struct delayed_work security_work;
0563     struct delayed_work wx_event_work;
0564     struct delayed_work hang_check;
0565     struct delayed_work rf_kill;
0566     struct delayed_work scan_event;
0567 
0568     int user_requested_scan;
0569 
0570     /* Track time in suspend, using CLOCK_BOOTTIME */
0571     time64_t suspend_at;
0572     time64_t suspend_time;
0573 
0574     u32 interrupts;
0575     int tx_interrupts;
0576     int rx_interrupts;
0577     int inta_other;
0578 
0579     spinlock_t low_lock;
0580     struct mutex action_mutex;
0581     struct mutex adapter_mutex;
0582 
0583     wait_queue_head_t wait_command_queue;
0584 };
0585 
0586 /*********************************************************
0587  * Host Command -> From Driver to FW
0588  *********************************************************/
0589 
0590 /**
0591  * Host command identifiers
0592  */
0593 #define HOST_COMPLETE           2
0594 #define SYSTEM_CONFIG           6
0595 #define SSID                    8
0596 #define MANDATORY_BSSID         9
0597 #define AUTHENTICATION_TYPE    10
0598 #define ADAPTER_ADDRESS        11
0599 #define PORT_TYPE              12
0600 #define INTERNATIONAL_MODE     13
0601 #define CHANNEL                14
0602 #define RTS_THRESHOLD          15
0603 #define FRAG_THRESHOLD         16
0604 #define POWER_MODE             17
0605 #define TX_RATES               18
0606 #define BASIC_TX_RATES         19
0607 #define WEP_KEY_INFO           20
0608 #define WEP_KEY_INDEX          25
0609 #define WEP_FLAGS              26
0610 #define ADD_MULTICAST          27
0611 #define CLEAR_ALL_MULTICAST    28
0612 #define BEACON_INTERVAL        29
0613 #define ATIM_WINDOW            30
0614 #define CLEAR_STATISTICS       31
0615 #define SEND               33
0616 #define TX_POWER_INDEX         36
0617 #define BROADCAST_SCAN         43
0618 #define CARD_DISABLE           44
0619 #define PREFERRED_BSSID        45
0620 #define SET_SCAN_OPTIONS       46
0621 #define SCAN_DWELL_TIME        47
0622 #define SWEEP_TABLE            48
0623 #define AP_OR_STATION_TABLE    49
0624 #define GROUP_ORDINALS         50
0625 #define SHORT_RETRY_LIMIT      51
0626 #define LONG_RETRY_LIMIT       52
0627 
0628 #define HOST_PRE_POWER_DOWN    58
0629 #define CARD_DISABLE_PHY_OFF   61
0630 #define MSDU_TX_RATES          62
0631 
0632 /* Rogue AP Detection */
0633 #define SET_STATION_STAT_BITS      64
0634 #define CLEAR_STATIONS_STAT_BITS   65
0635 #define LEAP_ROGUE_MODE            66   //TODO tbw replaced by CFG_LEAP_ROGUE_AP
0636 #define SET_SECURITY_INFORMATION   67
0637 #define DISASSOCIATION_BSSID       68
0638 #define SET_WPA_IE                 69
0639 
0640 /* system configuration bit mask: */
0641 #define IPW_CFG_MONITOR               0x00004
0642 #define IPW_CFG_PREAMBLE_AUTO        0x00010
0643 #define IPW_CFG_IBSS_AUTO_START     0x00020
0644 #define IPW_CFG_LOOPBACK            0x00100
0645 #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
0646 #define IPW_CFG_BT_SIDEBAND_SIGNAL  0x02000
0647 #define IPW_CFG_802_1x_ENABLE       0x04000
0648 #define IPW_CFG_BSS_MASK        0x08000
0649 #define IPW_CFG_IBSS_MASK       0x10000
0650 
0651 #define IPW_SCAN_NOASSOCIATE (1<<0)
0652 #define IPW_SCAN_MIXED_CELL (1<<1)
0653 /* RESERVED (1<<2) */
0654 #define IPW_SCAN_PASSIVE (1<<3)
0655 
0656 #define IPW_NIC_FATAL_ERROR 0x2A7F0
0657 #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
0658 #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
0659 #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
0660 #define IPW2100_ERR_MSG_TIMEOUT   (0x11 << 24)
0661 #define IPW2100_ERR_FW_LOAD       (0x12 << 24)
0662 
0663 #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND            0x200
0664 #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND    IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
0665 
0666 #define IPW_MEM_HOST_SHARED_RX_BD_BASE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
0667 #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE              (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
0668 #define IPW_MEM_HOST_SHARED_RX_BD_SIZE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
0669 #define IPW_MEM_HOST_SHARED_RX_READ_INDEX               (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
0670 
0671 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
0672 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
0673 #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
0674 
0675 #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
0676     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
0677 
0678 #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
0679     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
0680 
0681 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
0682 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
0683 
0684 #define IPW2100_INTA_TX_TRANSFER               (0x00000001) // Bit 0 (LSB)
0685 #define IPW2100_INTA_RX_TRANSFER               (0x00000002) // Bit 1
0686 #define IPW2100_INTA_TX_COMPLETE           (0x00000004) // Bit 2
0687 #define IPW2100_INTA_EVENT_INTERRUPT           (0x00000008) // Bit 3
0688 #define IPW2100_INTA_STATUS_CHANGE             (0x00000010) // Bit 4
0689 #define IPW2100_INTA_BEACON_PERIOD_EXPIRED     (0x00000020) // Bit 5
0690 #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE  (0x00010000) // Bit 16
0691 #define IPW2100_INTA_FW_INIT_DONE              (0x01000000) // Bit 24
0692 #define IPW2100_INTA_FW_CALIBRATION_CALC       (0x02000000) // Bit 25
0693 #define IPW2100_INTA_FATAL_ERROR               (0x40000000) // Bit 30
0694 #define IPW2100_INTA_PARITY_ERROR              (0x80000000) // Bit 31 (MSB)
0695 
0696 #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET              (0x00000001)
0697 #define IPW_AUX_HOST_RESET_REG_FORCE_NMI                    (0x00000002)
0698 #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI   (0x00000004)
0699 #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI               (0x00000008)
0700 #define IPW_AUX_HOST_RESET_REG_SW_RESET                     (0x00000080)
0701 #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED              (0x00000100)
0702 #define IPW_AUX_HOST_RESET_REG_STOP_MASTER                  (0x00000200)
0703 
0704 #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY           (0x00000001)    // Bit 0 (LSB)
0705 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY   (0x00000002)    // Bit 1
0706 #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE             (0x00000004)    // Bit 2
0707 #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG           (0x000007c0)    // Bits 6-10
0708 #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE              (0x00000200)    // Bit 9
0709 #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE       (0x00000400)    // Bit 10
0710 #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE              (0x20000000)    // Bit 29
0711 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK   (0x40000000)    // Bit 30
0712 #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK     (0x80000000)    // Bit 31 (MSB)
0713 
0714 #define IPW_BIT_GPIO_GPIO1_MASK         0x0000000C
0715 #define IPW_BIT_GPIO_GPIO3_MASK         0x000000C0
0716 #define IPW_BIT_GPIO_GPIO1_ENABLE       0x00000008
0717 #define IPW_BIT_GPIO_RF_KILL            0x00010000
0718 
0719 #define IPW_BIT_GPIO_LED_OFF            0x00002000  // Bit 13 = 1
0720 
0721 #define IPW_REG_DOMAIN_0_OFFSET     0x0000
0722 #define IPW_REG_DOMAIN_1_OFFSET     IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
0723 
0724 #define IPW_REG_INTA            IPW_REG_DOMAIN_0_OFFSET + 0x0008
0725 #define IPW_REG_INTA_MASK       IPW_REG_DOMAIN_0_OFFSET + 0x000C
0726 #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
0727 #define IPW_REG_INDIRECT_ACCESS_DATA    IPW_REG_DOMAIN_0_OFFSET + 0x0014
0728 #define IPW_REG_AUTOINCREMENT_ADDRESS   IPW_REG_DOMAIN_0_OFFSET + 0x0018
0729 #define IPW_REG_AUTOINCREMENT_DATA  IPW_REG_DOMAIN_0_OFFSET + 0x001C
0730 #define IPW_REG_RESET_REG       IPW_REG_DOMAIN_0_OFFSET + 0x0020
0731 #define IPW_REG_GP_CNTRL        IPW_REG_DOMAIN_0_OFFSET + 0x0024
0732 #define IPW_REG_GPIO            IPW_REG_DOMAIN_0_OFFSET + 0x0030
0733 #define IPW_REG_FW_TYPE                 IPW_REG_DOMAIN_1_OFFSET + 0x0188
0734 #define IPW_REG_FW_VERSION      IPW_REG_DOMAIN_1_OFFSET + 0x018C
0735 #define IPW_REG_FW_COMPATIBILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
0736 
0737 #define IPW_REG_INDIRECT_ADDR_MASK  0x00FFFFFC
0738 
0739 #define IPW_INTERRUPT_MASK      0xC1010013
0740 
0741 #define IPW2100_CONTROL_REG             0x220000
0742 #define IPW2100_CONTROL_PHY_OFF         0x8
0743 
0744 #define IPW2100_COMMAND         0x00300004
0745 #define IPW2100_COMMAND_PHY_ON      0x0
0746 #define IPW2100_COMMAND_PHY_OFF     0x1
0747 
0748 /* in DEBUG_AREA, values of memory always 0xd55555d5 */
0749 #define IPW_REG_DOA_DEBUG_AREA_START    IPW_REG_DOMAIN_0_OFFSET + 0x0090
0750 #define IPW_REG_DOA_DEBUG_AREA_END      IPW_REG_DOMAIN_0_OFFSET + 0x00FF
0751 #define IPW_DATA_DOA_DEBUG_VALUE        0xd55555d5
0752 
0753 #define IPW_INTERNAL_REGISTER_HALT_AND_RESET    0x003000e0
0754 
0755 #define IPW_WAIT_CLOCK_STABILIZATION_DELAY      50  // micro seconds
0756 #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY       10  // micro seconds
0757 #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10  // micro seconds
0758 
0759 // BD ring queue read/write difference
0760 #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
0761 
0762 #define IPW_CACHE_LINE_LENGTH_DEFAULT           0x80
0763 
0764 #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT      100 // 100 milli
0765 #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT        100 // 100 milli
0766 
0767 #define IPW_HEADER_802_11_SIZE       sizeof(struct libipw_hdr_3addr)
0768 #define IPW_MAX_80211_PAYLOAD_SIZE              2304U
0769 #define IPW_MAX_802_11_PAYLOAD_LENGTH       2312
0770 #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH  1536
0771 #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH  60
0772 #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
0773     (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
0774         sizeof(struct ethhdr))
0775 
0776 #define IPW_802_11_FCS_LENGTH 4
0777 #define IPW_RX_NIC_BUFFER_LENGTH \
0778         (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
0779         IPW_802_11_FCS_LENGTH)
0780 
0781 #define IPW_802_11_PAYLOAD_OFFSET \
0782         (sizeof(struct libipw_hdr_3addr) + \
0783          sizeof(struct libipw_snap_hdr))
0784 
0785 struct ipw2100_rx {
0786     union {
0787         unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
0788         struct libipw_hdr_4addr header;
0789         u32 status;
0790         struct ipw2100_notification notification;
0791         struct ipw2100_cmd_header command;
0792     } rx_data;
0793 } __packed;
0794 
0795 /* Bit 0-7 are for 802.11b tx rates - .  Bit 5-7 are reserved */
0796 #define TX_RATE_1_MBIT              0x0001
0797 #define TX_RATE_2_MBIT              0x0002
0798 #define TX_RATE_5_5_MBIT            0x0004
0799 #define TX_RATE_11_MBIT             0x0008
0800 #define TX_RATE_MASK                0x000F
0801 #define DEFAULT_TX_RATES            0x000F
0802 
0803 #define IPW_POWER_MODE_CAM           0x00   //(always on)
0804 #define IPW_POWER_INDEX_1            0x01
0805 #define IPW_POWER_INDEX_2            0x02
0806 #define IPW_POWER_INDEX_3            0x03
0807 #define IPW_POWER_INDEX_4            0x04
0808 #define IPW_POWER_INDEX_5            0x05
0809 #define IPW_POWER_AUTO               0x06
0810 #define IPW_POWER_MASK               0x0F
0811 #define IPW_POWER_ENABLED            0x10
0812 #define IPW_POWER_LEVEL(x)           ((x) & IPW_POWER_MASK)
0813 
0814 #define IPW_TX_POWER_AUTO            0
0815 #define IPW_TX_POWER_ENHANCED        1
0816 
0817 #define IPW_TX_POWER_DEFAULT         32
0818 #define IPW_TX_POWER_MIN             0
0819 #define IPW_TX_POWER_MAX             16
0820 #define IPW_TX_POWER_MIN_DBM         (-12)
0821 #define IPW_TX_POWER_MAX_DBM         16
0822 
0823 #define FW_SCAN_DONOT_ASSOCIATE     0x0001  // Dont Attempt to Associate after Scan
0824 #define FW_SCAN_PASSIVE             0x0008  // Force PASSSIVE Scan
0825 
0826 #define REG_MIN_CHANNEL             0
0827 #define REG_MAX_CHANNEL             14
0828 
0829 #define REG_CHANNEL_MASK            0x00003FFF
0830 #define IPW_IBSS_11B_DEFAULT_MASK   0x87ff
0831 
0832 #define DIVERSITY_EITHER            0   // Use both antennas
0833 #define DIVERSITY_ANTENNA_A         1   // Use antenna A
0834 #define DIVERSITY_ANTENNA_B         2   // Use antenna B
0835 
0836 #define HOST_COMMAND_WAIT 0
0837 #define HOST_COMMAND_NO_WAIT 1
0838 
0839 #define LOCK_NONE 0
0840 #define LOCK_DRIVER 1
0841 #define LOCK_FW 2
0842 
0843 #define TYPE_SWEEP_ORD                  0x000D
0844 #define TYPE_IBSS_STTN_ORD              0x000E
0845 #define TYPE_BSS_AP_ORD                 0x000F
0846 #define TYPE_RAW_BEACON_ENTRY           0x0010
0847 #define TYPE_CALIBRATION_DATA           0x0011
0848 #define TYPE_ROGUE_AP_DATA              0x0012
0849 #define TYPE_ASSOCIATION_REQUEST    0x0013
0850 #define TYPE_REASSOCIATION_REQUEST  0x0014
0851 
0852 #define HW_FEATURE_RFKILL 0x0001
0853 #define RF_KILLSWITCH_OFF 1
0854 #define RF_KILLSWITCH_ON  0
0855 
0856 #define IPW_COMMAND_POOL_SIZE        40
0857 
0858 #define IPW_START_ORD_TAB_1         1
0859 #define IPW_START_ORD_TAB_2         1000
0860 
0861 #define IPW_ORD_TAB_1_ENTRY_SIZE        sizeof(u32)
0862 
0863 #define IS_ORDINAL_TABLE_ONE(mgr,id) \
0864     ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
0865 #define IS_ORDINAL_TABLE_TWO(mgr,id) \
0866     ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
0867 
0868 #define BSS_ID_LENGTH               6
0869 
0870 // Fixed size data: Ordinal Table 1
0871 typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
0872 // Transmit statistics
0873     IPW_ORD_STAT_TX_HOST_REQUESTS = 1,  // # of requested Host Tx's (MSDU)
0874     IPW_ORD_STAT_TX_HOST_COMPLETE,  // # of successful Host Tx's (MSDU)
0875     IPW_ORD_STAT_TX_DIR_DATA,   // # of successful Directed Tx's (MSDU)
0876 
0877     IPW_ORD_STAT_TX_DIR_DATA1 = 4,  // # of successful Directed Tx's (MSDU) @ 1MB
0878     IPW_ORD_STAT_TX_DIR_DATA2,  // # of successful Directed Tx's (MSDU) @ 2MB
0879     IPW_ORD_STAT_TX_DIR_DATA5_5,    // # of successful Directed Tx's (MSDU) @ 5_5MB
0880     IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
0881     IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
0882 
0883     IPW_ORD_STAT_TX_NODIR_DATA1 = 13,   // # of successful Non_Directed Tx's (MSDU) @ 1MB
0884     IPW_ORD_STAT_TX_NODIR_DATA2,    // # of successful Non_Directed Tx's (MSDU) @ 2MB
0885     IPW_ORD_STAT_TX_NODIR_DATA5_5,  // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
0886     IPW_ORD_STAT_TX_NODIR_DATA11,   // # of successful Non_Directed Tx's (MSDU) @ 11MB
0887 
0888     IPW_ORD_STAT_NULL_DATA = 21,    // # of successful NULL data Tx's
0889     IPW_ORD_STAT_TX_RTS,    // # of successful Tx RTS
0890     IPW_ORD_STAT_TX_CTS,    // # of successful Tx CTS
0891     IPW_ORD_STAT_TX_ACK,    // # of successful Tx ACK
0892     IPW_ORD_STAT_TX_ASSN,   // # of successful Association Tx's
0893     IPW_ORD_STAT_TX_ASSN_RESP,  // # of successful Association response Tx's
0894     IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
0895     IPW_ORD_STAT_TX_REASSN_RESP,    // # of successful Reassociation response Tx's
0896     IPW_ORD_STAT_TX_PROBE,  // # of probes successfully transmitted
0897     IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
0898     IPW_ORD_STAT_TX_BEACON, // # of tx beacon
0899     IPW_ORD_STAT_TX_ATIM,   // # of Tx ATIM
0900     IPW_ORD_STAT_TX_DISASSN,    // # of successful Disassociation TX
0901     IPW_ORD_STAT_TX_AUTH,   // # of successful Authentication Tx
0902     IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
0903 
0904     IPW_ORD_STAT_TX_TOTAL_BYTES = 41,   // Total successful Tx data bytes
0905     IPW_ORD_STAT_TX_RETRIES,    // # of Tx retries
0906     IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
0907     IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
0908     IPW_ORD_STAT_TX_RETRY5_5,   // # of Tx retries at 5.5MBPS
0909     IPW_ORD_STAT_TX_RETRY11,    // # of Tx retries at 11MBPS
0910 
0911     IPW_ORD_STAT_TX_FAILURES = 51,  // # of Tx Failures
0912     IPW_ORD_STAT_TX_ABORT_AT_HOP,   //NS // # of Tx's aborted at hop time
0913     IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,   // # of times max tries in a hop failed
0914     IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
0915     IPW_ORD_STAT_TX_ABORT_STX,  //NS // # of times backoff aborted
0916     IPW_ORD_STAT_TX_DISASSN_FAIL,   // # of times disassociation failed
0917     IPW_ORD_STAT_TX_ERR_CTS,    // # of missed/bad CTS frames
0918     IPW_ORD_STAT_TX_BPDU,   //NS // # of spanning tree BPDUs sent
0919     IPW_ORD_STAT_TX_ERR_ACK,    // # of tx err due to acks
0920 
0921     // Receive statistics
0922     IPW_ORD_STAT_RX_HOST = 61,  // # of packets passed to host
0923     IPW_ORD_STAT_RX_DIR_DATA,   // # of directed packets
0924     IPW_ORD_STAT_RX_DIR_DATA1,  // # of directed packets at 1MB
0925     IPW_ORD_STAT_RX_DIR_DATA2,  // # of directed packets at 2MB
0926     IPW_ORD_STAT_RX_DIR_DATA5_5,    // # of directed packets at 5.5MB
0927     IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
0928     IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
0929 
0930     IPW_ORD_STAT_RX_NODIR_DATA = 71,    // # of nondirected packets
0931     IPW_ORD_STAT_RX_NODIR_DATA1,    // # of nondirected packets at 1MB
0932     IPW_ORD_STAT_RX_NODIR_DATA2,    // # of nondirected packets at 2MB
0933     IPW_ORD_STAT_RX_NODIR_DATA5_5,  // # of nondirected packets at 5.5MB
0934     IPW_ORD_STAT_RX_NODIR_DATA11,   // # of nondirected packets at 11MB
0935 
0936     IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
0937     IPW_ORD_STAT_RX_POLL,   //NS // # of poll rx
0938     IPW_ORD_STAT_RX_RTS,    // # of Rx RTS
0939     IPW_ORD_STAT_RX_CTS,    // # of Rx CTS
0940     IPW_ORD_STAT_RX_ACK,    // # of Rx ACK
0941     IPW_ORD_STAT_RX_CFEND,  // # of Rx CF End
0942     IPW_ORD_STAT_RX_CFEND_ACK,  // # of Rx CF End + CF Ack
0943     IPW_ORD_STAT_RX_ASSN,   // # of Association Rx's
0944     IPW_ORD_STAT_RX_ASSN_RESP,  // # of Association response Rx's
0945     IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
0946     IPW_ORD_STAT_RX_REASSN_RESP,    // # of Reassociation response Rx's
0947     IPW_ORD_STAT_RX_PROBE,  // # of probe Rx's
0948     IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
0949     IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
0950     IPW_ORD_STAT_RX_ATIM,   // # of Rx ATIM
0951     IPW_ORD_STAT_RX_DISASSN,    // # of disassociation Rx
0952     IPW_ORD_STAT_RX_AUTH,   // # of authentication Rx
0953     IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
0954 
0955     IPW_ORD_STAT_RX_TOTAL_BYTES = 101,  // Total rx data bytes received
0956     IPW_ORD_STAT_RX_ERR_CRC,    // # of packets with Rx CRC error
0957     IPW_ORD_STAT_RX_ERR_CRC1,   // # of Rx CRC errors at 1MB
0958     IPW_ORD_STAT_RX_ERR_CRC2,   // # of Rx CRC errors at 2MB
0959     IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
0960     IPW_ORD_STAT_RX_ERR_CRC11,  // # of Rx CRC errors at 11MB
0961 
0962     IPW_ORD_STAT_RX_DUPLICATE1 = 112,   // # of duplicate rx packets at 1MB
0963     IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
0964     IPW_ORD_STAT_RX_DUPLICATE5_5,   // # of duplicate rx packets at 5.5MB
0965     IPW_ORD_STAT_RX_DUPLICATE11,    // # of duplicate rx packets at 11MB
0966     IPW_ORD_STAT_RX_DUPLICATE = 119,    // # of duplicate rx packets
0967 
0968     IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent  db
0969     IPW_ORD_PERS_DB_SIZE,   // # size of fw permanent  db
0970     IPW_ORD_PERS_DB_ADDR,   // # address of fw permanent  db
0971     IPW_ORD_STAT_RX_INVALID_PROTOCOL,   // # of rx frames with invalid protocol
0972     IPW_ORD_SYS_BOOT_TIME,  // # Boot time
0973     IPW_ORD_STAT_RX_NO_BUFFER,  // # of rx frames rejected due to no buffer
0974     IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
0975     IPW_ORD_STAT_RX_ABORT_AT_HOP,   //NS // # of rx frames aborted due to hop
0976     IPW_ORD_STAT_RX_MISSING_FRAG,   // # of rx frames dropped due to missing fragment
0977     IPW_ORD_STAT_RX_ORPHAN_FRAG,    // # of rx frames dropped due to non-sequential fragment
0978     IPW_ORD_STAT_RX_ORPHAN_FRAME,   // # of rx frames dropped due to unmatched 1st frame
0979     IPW_ORD_STAT_RX_FRAG_AGEOUT,    // # of rx frames dropped due to uncompleted frame
0980     IPW_ORD_STAT_RX_BAD_SSID,   //NS // Bad SSID (unused)
0981     IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
0982 
0983 // PSP Statistics
0984     IPW_ORD_STAT_PSP_SUSPENSION = 137,  // # of times adapter suspended
0985     IPW_ORD_STAT_PSP_BCN_TIMEOUT,   // # of beacon timeout
0986     IPW_ORD_STAT_PSP_POLL_TIMEOUT,  // # of poll response timeouts
0987     IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,    // # of timeouts waiting for last broadcast/muticast pkt
0988     IPW_ORD_STAT_PSP_RX_DTIMS,  // # of PSP DTIMs received
0989     IPW_ORD_STAT_PSP_RX_TIMS,   // # of PSP TIMs received
0990     IPW_ORD_STAT_PSP_STATION_ID,    // PSP Station ID
0991 
0992 // Association and roaming
0993     IPW_ORD_LAST_ASSN_TIME = 147,   // RTC time of last association
0994     IPW_ORD_STAT_PERCENT_MISSED_BCNS,   // current calculation of % missed beacons
0995     IPW_ORD_STAT_PERCENT_RETRIES,   // current calculation of % missed tx retries
0996     IPW_ORD_ASSOCIATED_AP_PTR,  // If associated, this is ptr to the associated
0997     // AP table entry. set to 0 if not associated
0998     IPW_ORD_AVAILABLE_AP_CNT,   // # of AP's described in the AP table
0999     IPW_ORD_AP_LIST_PTR,    // Ptr to list of available APs
1000     IPW_ORD_STAT_AP_ASSNS,  // # of associations
1001     IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1002     IPW_ORD_STAT_ASSN_RESP_FAIL,    // # of failuresdue to response fail
1003     IPW_ORD_STAT_FULL_SCANS,    // # of full scans
1004 
1005     IPW_ORD_CARD_DISABLED,  // # Card Disabled
1006     IPW_ORD_STAT_ROAM_INHIBIT,  // # of times roaming was inhibited due to ongoing activity
1007     IPW_FILLER_40,
1008     IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1009     IPW_ORD_STAT_ASSN_CAUSE1,   // # of reassociations due to no tx from AP in last N
1010     // hops or no prob_ responses in last 3 minutes
1011     IPW_ORD_STAT_ASSN_CAUSE2,   // # of reassociations due to poor tx/rx quality
1012     IPW_ORD_STAT_ASSN_CAUSE3,   // # of reassociations due to tx/rx quality with excessive
1013     // load at the AP
1014     IPW_ORD_STAT_ASSN_CAUSE4,   // # of reassociations due to AP RSSI level fell below
1015     // eligible group
1016     IPW_ORD_STAT_ASSN_CAUSE5,   // # of reassociations due to load leveling
1017     IPW_ORD_STAT_ASSN_CAUSE6,   //NS // # of reassociations due to dropped by Ap
1018     IPW_FILLER_41,
1019     IPW_FILLER_42,
1020     IPW_FILLER_43,
1021     IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1022     IPW_ORD_STAT_AUTH_RESP_FAIL,    // # of times authentication response failed
1023     IPW_ORD_STATION_TABLE_CNT,  // # of entries in association table
1024 
1025 // Other statistics
1026     IPW_ORD_RSSI_AVG_CURR = 173,    // Current avg RSSI
1027     IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1028     IPW_ORD_STEST_RESULTS_CUM,  //NS // Cummulative self test results word
1029     IPW_ORD_SELF_TEST_STATUS,   //NS //
1030     IPW_ORD_POWER_MGMT_MODE,    // Power mode - 0=CAM, 1=PSP
1031     IPW_ORD_POWER_MGMT_INDEX,   //NS //
1032     IPW_ORD_COUNTRY_CODE,   // IEEE country code as recv'd from beacon
1033     IPW_ORD_COUNTRY_CHANNELS,   // channels supported by country
1034 // IPW_ORD_COUNTRY_CHANNELS:
1035 // For 11b the lower 2-byte are used for channels from 1-14
1036 //   and the higher 2-byte are not used.
1037     IPW_ORD_RESET_CNT,  // # of adapter resets (warm)
1038     IPW_ORD_BEACON_INTERVAL,    // Beacon interval
1039 
1040     IPW_ORD_PRINCETON_VERSION = 184,    //NS // Princeton Version
1041     IPW_ORD_ANTENNA_DIVERSITY,  // TRUE if antenna diversity is disabled
1042     IPW_ORD_CCA_RSSI,   //NS // CCA RSSI value (factory programmed)
1043     IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1044     IPW_ORD_DTIM_PERIOD,    // # of beacon intervals between DTIMs
1045     IPW_ORD_OUR_FREQ,   // current radio freq lower digits - channel ID
1046 
1047     IPW_ORD_RTC_TIME = 190, // current RTC time
1048     IPW_ORD_PORT_TYPE,  // operating mode
1049     IPW_ORD_CURRENT_TX_RATE,    // current tx rate
1050     IPW_ORD_SUPPORTED_RATES,    // Bitmap of supported tx rates
1051     IPW_ORD_ATIM_WINDOW,    // current ATIM Window
1052     IPW_ORD_BASIC_RATES,    // bitmap of basic tx rates
1053     IPW_ORD_NIC_HIGHEST_RATE,   // bitmap of basic tx rates
1054     IPW_ORD_AP_HIGHEST_RATE,    // bitmap of basic tx rates
1055     IPW_ORD_CAPABILITIES,   // Management frame capability field
1056     IPW_ORD_AUTH_TYPE,  // Type of authentication
1057     IPW_ORD_RADIO_TYPE, // Adapter card platform type
1058     IPW_ORD_RTS_THRESHOLD = 201,    // Min length of packet after which RTS handshaking is used
1059     IPW_ORD_INT_MODE,   // International mode
1060     IPW_ORD_FRAGMENTATION_THRESHOLD,    // protocol frag threshold
1061     IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1062     IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE,  // EEPROM size in SRAM
1063     IPW_ORD_EEPROM_SKU_CAPABILITY,  // EEPROM SKU Capability    206 =
1064     IPW_ORD_EEPROM_IBSS_11B_CHANNELS,   // EEPROM IBSS 11b channel set
1065 
1066     IPW_ORD_MAC_VERSION = 209,  // MAC Version
1067     IPW_ORD_MAC_REVISION,   // MAC Revision
1068     IPW_ORD_RADIO_VERSION,  // Radio Version
1069     IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1070     IPW_ORD_UCODE_VERSION,  // Ucode Version
1071     IPW_ORD_HW_RF_SWITCH_STATE = 214,   // HW RF Kill Switch State
1072 } ORDINALTABLE1;
1073 
1074 // ordinal table 2
1075 // Variable length data:
1076 #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL   1001
1077 
1078 typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1079     IPW_ORD_STAT_BASE = 1000,   // contains number of variable ORDs
1080     IPW_ORD_STAT_ADAPTER_MAC = 1001,    // 6 bytes: our adapter MAC address
1081     IPW_ORD_STAT_PREFERRED_BSSID = 1002,    // 6 bytes: BSSID of the preferred AP
1082     IPW_ORD_STAT_MANDATORY_BSSID = 1003,    // 6 bytes: BSSID of the mandatory AP
1083     IPW_FILL_1,     //NS //
1084     IPW_ORD_STAT_COUNTRY_TEXT = 1005,   // 36 bytes: Country name text, First two bytes are Country code
1085     IPW_ORD_STAT_ASSN_SSID = 1006,  // 32 bytes: ESSID String
1086     IPW_ORD_STATION_TABLE = 1007,   // ? bytes: Station/AP table (via Direct SSID Scans)
1087     IPW_ORD_STAT_SWEEP_TABLE = 1008,    // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1088     IPW_ORD_STAT_ROAM_LOG = 1009,   // ? bytes: Roaming log
1089     IPW_ORD_STAT_RATE_LOG = 1010,   //NS // 0 bytes: Rate log
1090     IPW_ORD_STAT_FIFO = 1011,   //NS // 0 bytes: Fifo buffer data structures
1091     IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1092     IPW_ORD_STAT_FW_DATE = 1013,    // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1093     IPW_ORD_STAT_ASSN_AP_BSSID = 1014,  // 6 bytes: MAC address of associated AP
1094     IPW_ORD_STAT_DEBUG = 1015,  //NS // ? bytes:
1095     IPW_ORD_STAT_NIC_BPA_NUM = 1016,    // 11 bytes: NIC BPA number in ASCII
1096     IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1097     IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1098 } ORDINALTABLE2;        // NS - means Not Supported by FW
1099 
1100 #define IPW_LAST_VARIABLE_LENGTH_ORDINAL   1018
1101 
1102 #ifndef WIRELESS_SPY
1103 #define WIRELESS_SPY        // enable iwspy support
1104 #endif
1105 
1106 #define IPW_HOST_FW_SHARED_AREA0    0x0002f200
1107 #define IPW_HOST_FW_SHARED_AREA0_END    0x0002f510  // 0x310 bytes
1108 
1109 #define IPW_HOST_FW_SHARED_AREA1    0x0002f610
1110 #define IPW_HOST_FW_SHARED_AREA1_END    0x0002f630  // 0x20 bytes
1111 
1112 #define IPW_HOST_FW_SHARED_AREA2    0x0002fa00
1113 #define IPW_HOST_FW_SHARED_AREA2_END    0x0002fa20  // 0x20 bytes
1114 
1115 #define IPW_HOST_FW_SHARED_AREA3    0x0002fc00
1116 #define IPW_HOST_FW_SHARED_AREA3_END    0x0002fc10  // 0x10 bytes
1117 
1118 #define IPW_HOST_FW_INTERRUPT_AREA  0x0002ff80
1119 #define IPW_HOST_FW_INTERRUPT_AREA_END  0x00030000  // 0x80 bytes
1120 
1121 struct ipw2100_fw_chunk {
1122     unsigned char *buf;
1123     long len;
1124     long pos;
1125     struct list_head list;
1126 };
1127 
1128 struct ipw2100_fw_chunk_set {
1129     const void *data;
1130     unsigned long size;
1131 };
1132 
1133 struct ipw2100_fw {
1134     int version;
1135     struct ipw2100_fw_chunk_set fw;
1136     struct ipw2100_fw_chunk_set uc;
1137     const struct firmware *fw_entry;
1138 };
1139 
1140 #define MAX_FW_VERSION_LEN 14
1141 
1142 #endif              /* _IPW2100_H */